From nobody Wed Nov 5 15:40:36 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1496849508411402.8382411191777; Wed, 7 Jun 2017 08:31:48 -0700 (PDT) Received: from localhost ([::1]:44612 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dIcvy-0000jv-0k for importer@patchew.org; Wed, 07 Jun 2017 11:31:46 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40066) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dIcty-0007o3-1N for qemu-devel@nongnu.org; Wed, 07 Jun 2017 11:29:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dIctx-00030w-8D for qemu-devel@nongnu.org; Wed, 07 Jun 2017 11:29:42 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:37229) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dIctv-0002y6-7w; Wed, 07 Jun 2017 11:29:39 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1dIctm-0004hr-Bd; Wed, 07 Jun 2017 16:29:30 +0100 From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Wed, 7 Jun 2017 16:29:29 +0100 Message-Id: <1496849369-30282-1-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PATCH] arm_gicv3: Fix ICC_BPR1 reset value when EL3 not implemented X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , patches@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 If EL3 is not implemented (ie only one security state) then the one and only ICC_BPR1 register behaves like the Non-secure ICC_BPR1 in an EL3-present configuration. In particular, its reset value is GIC_MIN_BPR_NS, not GIC_MIN_BPR. Correct the erroneous reset value; this fixes a problem where we might hit the assert added in commit a89ff39ee901. Reported-by: Alex Benn=C3=A9e Signed-off-by: Peter Maydell Reviewed-by: Alex Benn=C3=A9e Tested-by: Alex Benn=C3=A9e --- hw/intc/arm_gicv3_cpuif.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/hw/intc/arm_gicv3_cpuif.c b/hw/intc/arm_gicv3_cpuif.c index 09d8ba0..5cbafaf 100644 --- a/hw/intc/arm_gicv3_cpuif.c +++ b/hw/intc/arm_gicv3_cpuif.c @@ -2039,11 +2039,7 @@ static void icc_reset(CPUARMState *env, const ARMCPR= egInfo *ri) cs->icc_pmr_el1 =3D 0; cs->icc_bpr[GICV3_G0] =3D GIC_MIN_BPR; cs->icc_bpr[GICV3_G1] =3D GIC_MIN_BPR; - if (arm_feature(env, ARM_FEATURE_EL3)) { - cs->icc_bpr[GICV3_G1NS] =3D GIC_MIN_BPR_NS; - } else { - cs->icc_bpr[GICV3_G1NS] =3D GIC_MIN_BPR; - } + cs->icc_bpr[GICV3_G1NS] =3D GIC_MIN_BPR_NS; memset(cs->icc_apr, 0, sizeof(cs->icc_apr)); memset(cs->icc_igrpen, 0, sizeof(cs->icc_igrpen)); cs->icc_ctlr_el3 =3D ICC_CTLR_EL3_NDS | ICC_CTLR_EL3_A3V | --=20 2.7.4