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Dropped the tmp421 patch and the following patch that depended on it; no other changes. thanks -- PMM The following changes since commit 43771d5d92312504305c19abe29ec5bfabd55f01: Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2017-05-31' into staging (2017-06-01 16:39:16 +0100) are available in the git repository at: git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20170602 for you to fetch changes up to c7637c04be257968e6df30de961a6a23a0ac3dd8: hw/arm/virt: fdt: generate distance-map when needed (2017-06-02 11:51:49 +0100) ---------------------------------------------------------------- target-arm queue: * virt: numa: provide ACPI distance info when needed * aspeed: fix i2c controller bugs * M profile: support MPU * gicv3: fix mishandling of BPR1, VBPR1 * load_uboot_image: don't assume a full header read * libvixl: Correct build failures on NetBSD ---------------------------------------------------------------- Andrew Jones (3): load_uboot_image: don't assume a full header read hw/arm/virt-acpi-build: build SLIT when needed hw/arm/virt: fdt: generate distance-map when needed Cédric Le Goater (4): aspeed/i2c: improve command handling aspeed/i2c: handle LAST command under the RX command aspeed/i2c: introduce a state machine aspeed: add some I2C devices to the Aspeed machines Kamil Rytarowski (1): libvixl: Correct build failures on NetBSD Michael Davidsaver (4): armv7m: Improve "-d mmu" tracing for PMSAv7 MPU armv7m: Implement M profile default memory map armv7m: Classify faults as MemManage or BusFault arm: add MPU support to M profile CPUs Peter Maydell (12): hw/intc/arm_gicv3_cpuif: Fix reset value for VMCR_EL2.VBPR1 hw/intc/arm_gicv3_cpuif: Don't let BPR be set below its minimum hw/intc/arm_gicv3_cpuif: Fix priority masking for NS BPR1 arm: Use the mmu_idx we're passed in arm_cpu_do_unaligned_access() arm: Add support for M profile CPUs having different MMU index semantics arm: Use different ARMMMUIdx values for M profile arm: Clean up handling of no-MPU PMSA CPUs arm: Don't clear ARM_FEATURE_PMSA for no-mpu configs arm: Don't let no-MPU PMSA cores write to SCTLR.M arm: Remove unnecessary check on cpu->pmsav7_dregion arm: All M profile cores are PMSA arm: Implement HFNMIENA support for M profile MPU Wei Huang (1): target/arm: clear PMUVER field of AA64DFR0 when vPMU=off disas/libvixl/Makefile.objs | 3 + target/arm/cpu.h | 118 ++++++++++++++-- target/arm/translate.h | 2 +- hw/arm/aspeed.c | 27 ++++ hw/arm/virt-acpi-build.c | 4 + hw/arm/virt.c | 21 +++ hw/core/loader.c | 3 +- hw/i2c/aspeed_i2c.c | 65 +++++++-- hw/intc/arm_gicv3_cpuif.c | 50 ++++++- hw/intc/armv7m_nvic.c | 104 ++++++++++++++ target/arm/cpu.c | 28 +++- target/arm/helper.c | 338 ++++++++++++++++++++++++++++++-------------- target/arm/machine.c | 7 +- target/arm/op_helper.c | 3 +- target/arm/translate-a64.c | 18 ++- target/arm/translate.c | 14 +- 16 files changed, 648 insertions(+), 157 deletions(-)
v3->v4: Windows headers define an INT type which clashed with an enum value name in arm_gicv3_its.c... The following changes since commit eae587e8e3694b1aceab23239493fb4c7e1a80f5: Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2021-09-13' into staging (2021-09-13 11:00:30 +0100) are available in the Git repository at: https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210913-3 for you to fetch changes up to 28e987a7e7edaa3ca7feeac65edca26145df8814: hw/arm/mps2.c: Mark internal-only I2C buses as 'full' (2021-09-13 21:01:08 +0100) ---------------------------------------------------------------- target-arm queue: * mark MPS2/MPS3 board-internal i2c buses as 'full' so that command line user-created devices are not plugged into them * Take an exception if PSTATE.IL is set * Support an emulated ITS in the virt board * Add support for kudo-bmc board * Probe for KVM_CAP_ARM_VM_IPA_SIZE when creating scratch VM * cadence_uart: Fix clock handling issues that prevented u-boot from running ---------------------------------------------------------------- Bin Meng (6): hw/misc: zynq_slcr: Correctly compute output clocks in the reset exit phase hw/char: cadence_uart: Disable transmit when input clock is disabled hw/char: cadence_uart: Move clock/reset check to uart_can_receive() hw/char: cadence_uart: Convert to memop_with_attrs() ops hw/char: cadence_uart: Ignore access when unclocked or in reset for uart_{read, write}() hw/char: cadence_uart: Log a guest error when device is unclocked or in reset Chris Rauer (1): hw/arm: Add support for kudo-bmc board. Marc Zyngier (1): hw/arm/virt: KVM: Probe for KVM_CAP_ARM_VM_IPA_SIZE when creating scratch VM Peter Maydell (5): target/arm: Take an exception if PSTATE.IL is set qdev: Support marking individual buses as 'full' hw/arm/mps2-tz.c: Add extra data parameter to MakeDevFn hw/arm/mps2-tz.c: Mark internal-only I2C buses as 'full' hw/arm/mps2.c: Mark internal-only I2C buses as 'full' Richard Henderson (1): target/arm: Merge disas_a64_insn into aarch64_tr_translate_insn Shashi Mallela (9): hw/intc: GICv3 ITS initial framework hw/intc: GICv3 ITS register definitions added hw/intc: GICv3 ITS command queue framework hw/intc: GICv3 ITS Command processing hw/intc: GICv3 ITS Feature enablement hw/intc: GICv3 redistributor ITS processing tests/data/acpi/virt: Add IORT files for ITS hw/arm/virt: add ITS support in virt GIC tests/data/acpi/virt: Update IORT files for ITS docs/system/arm/nuvoton.rst | 1 + hw/intc/gicv3_internal.h | 188 ++++- include/hw/arm/virt.h | 2 + include/hw/intc/arm_gicv3_common.h | 13 + include/hw/intc/arm_gicv3_its_common.h | 32 +- include/hw/qdev-core.h | 24 + target/arm/cpu.h | 1 + target/arm/kvm_arm.h | 4 +- target/arm/syndrome.h | 5 + target/arm/translate.h | 2 + hw/arm/mps2-tz.c | 92 ++- hw/arm/mps2.c | 12 +- hw/arm/npcm7xx_boards.c | 34 + hw/arm/virt.c | 29 +- hw/char/cadence_uart.c | 61 +- hw/intc/arm_gicv3.c | 14 + hw/intc/arm_gicv3_common.c | 13 + hw/intc/arm_gicv3_cpuif.c | 7 +- hw/intc/arm_gicv3_dist.c | 5 +- hw/intc/arm_gicv3_its.c | 1322 ++++++++++++++++++++++++++++++++ hw/intc/arm_gicv3_its_common.c | 7 +- hw/intc/arm_gicv3_its_kvm.c | 2 +- hw/intc/arm_gicv3_redist.c | 153 +++- hw/misc/zynq_slcr.c | 31 +- softmmu/qdev-monitor.c | 7 +- target/arm/helper-a64.c | 1 + target/arm/helper.c | 8 + target/arm/kvm.c | 7 +- target/arm/translate-a64.c | 255 +++--- target/arm/translate.c | 21 + hw/intc/meson.build | 1 + tests/data/acpi/virt/IORT | Bin 0 -> 124 bytes tests/data/acpi/virt/IORT.memhp | Bin 0 -> 124 bytes tests/data/acpi/virt/IORT.numamem | Bin 0 -> 124 bytes tests/data/acpi/virt/IORT.pxb | Bin 0 -> 124 bytes 35 files changed, 2144 insertions(+), 210 deletions(-) create mode 100644 hw/intc/arm_gicv3_its.c create mode 100644 tests/data/acpi/virt/IORT create mode 100644 tests/data/acpi/virt/IORT.memhp create mode 100644 tests/data/acpi/virt/IORT.numamem create mode 100644 tests/data/acpi/virt/IORT.pxb