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X-Received-From: 2607:f8b0:400e:c00::241 X-Mailman-Approved-At: Mon, 22 May 2017 10:39:13 -0400 Subject: [Qemu-devel] [PATCH risu v2] ppc64: Fix patterns for rotate doubleword instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, joserz@linux.vnet.ibm.com, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The patterns for the following instructions are fixed: * Rotate Left Doubleword then Clear Right (rldcr[.]) * Rotate Left Doubleword Immediate then Clear Right (rldicr[.]) * Rotate Left Doubleword Immediate then Mask Insert (rldimi[.]) The first instruction has a typo. For the other two instructions, the extended opcodes are incorrect and the shift field 'sha' is absent. Also, the shift field 'sh' should be used in place of the register field 'rb'. Signed-off-by: Sandipan Das Reviewed-by: Nikunj A Dadhania --- ppc64.risu | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/ppc64.risu b/ppc64.risu index 28df9da..dd304e2 100644 --- a/ppc64.risu +++ b/ppc64.risu @@ -1451,7 +1451,7 @@ RLDCLd PPC64LE 011110 rs:5 ra:5 rb:5 mb:6 10001 \ !constraints { $rs !=3D 1 && $ra !=3D 1 && $rb !=3D 1 && $rs !=3D 13 && $r= a !=3D 13 && $rb !=3D 13; } =20 # format:MDS book:I page:103 PPC SR rldcr Rotate Left Dword then Clear Rig= ht -RLCDR PPC64LE 011110 rs:5 ra:5 rb:5 mb:6 10010 \ +RLDCR PPC64LE 011110 rs:5 ra:5 rb:5 mb:6 10010 \ !constraints { $rs !=3D 1 && $ra !=3D 1 && $rb !=3D 1 && $rs !=3D 13 && $r= a !=3D 13 && $rb !=3D 13; } # format:MDS book:I page:103 PPC SR rldcr Rotate Left Dword then Clear Rig= ht RLDCRd PPC64LE 011110 rs:5 ra:5 rb:5 mb:6 10011 \ @@ -1472,17 +1472,17 @@ RLDICLd PPC64LE 011110 rs:5 ra:5 sh:5 mb:6 000 sha:= 1 1 \ !constraints { $rs !=3D 1 && $ra !=3D 1 && $rs !=3D 13 && $ra !=3D 13; } =20 # format:MD book:I page:105 PPC SR rldicr[.] Rotate Left Dword Immediate t= hen Clear Right -RLDICR PPC64LE 011110 rs:5 ra:5 rb:5 me:6 00010 \ +RLDICR PPC64LE 011110 rs:5 ra:5 sh:5 me:6 001 sha:1 0 \ !constraints { $rs !=3D 1 && $ra !=3D 1 && $rb !=3D 1 && $rs !=3D 13 && $r= a !=3D 13 && $rb !=3D 13; } # format:MD book:I page:105 PPC SR rldicr[.] Rotate Left Dword Immediate t= hen Clear Right -RLDICRd PPC64LE 011110 rs:5 ra:5 rb:5 me:6 00011 \ +RLDICRd PPC64LE 011110 rs:5 ra:5 sh:5 me:6 001 sha:1 1 \ !constraints { $rs !=3D 1 && $ra !=3D 1 && $rb !=3D 1 && $rs !=3D 13 && $r= a !=3D 13 && $rb !=3D 13; } =20 # format:MD book:I page:105 PPC SR rldimi[.] Rotate Left Dword Immediate t= hen Mask Insert -RLDIMI PPC64LE 011110 rs:5 ra:5 rb:5 me:6 00110 \ +RLDIMI PPC64LE 011110 rs:5 ra:5 sh:5 me:6 011 sha:1 0 \ !constraints { $rs !=3D 1 && $ra !=3D 1 && $rb !=3D 1 && $rs !=3D 13 && $r= a !=3D 13 && $rb !=3D 13; } # format:MD book:I page:105 PPC SR rldimi[.] Rotate Left Dword Immediate t= hen Mask Insert -RLDIMId PPC64LE 011110 rs:5 ra:5 rb:5 me:6 00111 \ +RLDIMId PPC64LE 011110 rs:5 ra:5 sh:5 me:6 011 sha:1 1 \ !constraints { $rs !=3D 1 && $ra !=3D 1 && $rb !=3D 1 && $rs !=3D 13 && $r= a !=3D 13 && $rb !=3D 13; } =20 # format:M book:I page:102 v:P1 SR rlwimi[.] Rotate Left Word Immediate th= en Mask Insert --=20 2.7.4