From nobody Mon May 6 04:21:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1494897414734117.68033584933187; Mon, 15 May 2017 18:16:54 -0700 (PDT) Received: from localhost ([::1]:39436 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dAR6a-0002Ot-O1 for importer@patchew.org; Mon, 15 May 2017 21:16:52 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36643) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dAR5R-0001vU-CP for qemu-devel@nongnu.org; Mon, 15 May 2017 21:15:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dAR5O-0006gh-4e for qemu-devel@nongnu.org; Mon, 15 May 2017 21:15:41 -0400 Received: from mga14.intel.com ([192.55.52.115]:40296) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dAR5N-0006gQ-Pk for qemu-devel@nongnu.org; Mon, 15 May 2017 21:15:38 -0400 Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 15 May 2017 18:15:23 -0700 Received: from xps7800.sc.intel.com ([10.3.52.155]) by fmsmga002.fm.intel.com with ESMTP; 15 May 2017 18:15:23 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.38,346,1491289200"; d="scan'208";a="1169614895" From: Anthony Xu To: qemu-devel@nongnu.org Date: Mon, 15 May 2017 18:21:23 -0700 Message-Id: <1494897683-16395-1-git-send-email-anthony.xu@intel.com> X-Mailer: git-send-email 1.8.3.1 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 192.55.52.115 Subject: [Qemu-devel] [PATCH] SMM: disable smram region if smm is disabled X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: pbonzini@redhat.com, Anthony Xu Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" when smm is disabled, smram is not used, so disable it Signed-off-by: Anthony Xu --- hw/pci-host/piix.c | 45 +++++++++++++++-------------- hw/pci-host/q35.c | 83 +++++++++++++++++++++++++++++---------------------= ---- kvm-all.c | 3 +- target/i386/kvm.c | 2 +- 4 files changed, 70 insertions(+), 63 deletions(-) diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c index bf4221d..ce43f87 100644 --- a/hw/pci-host/piix.c +++ b/hw/pci-host/piix.c @@ -142,10 +142,12 @@ static void i440fx_update_memory_mappings(PCII440FXSt= ate *d) pam_update(&d->pam_regions[i], i, pd->config[I440FX_PAM + ((i + 1) / 2)]); } - memory_region_set_enabled(&d->smram_region, - !(pd->config[I440FX_SMRAM] & SMRAM_D_OPEN)); - memory_region_set_enabled(&d->smram, - pd->config[I440FX_SMRAM] & SMRAM_G_SMRAME); + if (pc_machine_is_smm_enabled(PC_MACHINE(current_machine))) { + memory_region_set_enabled(&d->smram_region, + !(pd->config[I440FX_SMRAM] & SMRAM_D_OPEN)); + memory_region_set_enabled(&d->smram, + pd->config[I440FX_SMRAM] & SMRAM_G_SMRAME); + } memory_region_transaction_commit(); } =20 @@ -355,23 +357,24 @@ PCIBus *i440fx_init(const char *host_type, const char= *pci_type, pc_pci_as_mapping_init(OBJECT(f), f->system_memory, f->pci_address_space); =20 - /* if *disabled* show SMRAM to all CPUs */ - memory_region_init_alias(&f->smram_region, OBJECT(d), "smram-region", - f->pci_address_space, 0xa0000, 0x20000); - memory_region_add_subregion_overlap(f->system_memory, 0xa0000, - &f->smram_region, 1); - memory_region_set_enabled(&f->smram_region, true); - - /* smram, as seen by SMM CPUs */ - memory_region_init(&f->smram, OBJECT(d), "smram", 1ull << 32); - memory_region_set_enabled(&f->smram, true); - memory_region_init_alias(&f->low_smram, OBJECT(d), "smram-low", - f->ram_memory, 0xa0000, 0x20000); - memory_region_set_enabled(&f->low_smram, true); - memory_region_add_subregion(&f->smram, 0xa0000, &f->low_smram); - object_property_add_const_link(qdev_get_machine(), "smram", - OBJECT(&f->smram), &error_abort); - + if (pc_machine_is_smm_enabled(PC_MACHINE(current_machine))) { + /* if *disabled* show SMRAM to all CPUs */ + memory_region_init_alias(&f->smram_region, OBJECT(d), "smram-regio= n", + f->pci_address_space, 0xa0000, 0x20000); + memory_region_add_subregion_overlap(f->system_memory, 0xa0000, + &f->smram_region, 1); + memory_region_set_enabled(&f->smram_region, true); + + /* smram, as seen by SMM CPUs */ + memory_region_init(&f->smram, OBJECT(d), "smram", 1ull << 32); + memory_region_set_enabled(&f->smram, true); + memory_region_init_alias(&f->low_smram, OBJECT(d), "smram-low", + f->ram_memory, 0xa0000, 0x20000); + memory_region_set_enabled(&f->low_smram, true); + memory_region_add_subregion(&f->smram, 0xa0000, &f->low_smram); + object_property_add_const_link(qdev_get_machine(), "smram", + OBJECT(&f->smram), &error_abort); + } init_pam(dev, f->ram_memory, f->system_memory, f->pci_address_space, &f->pam_regions[0], PAM_BIOS_BASE, PAM_BIOS_SIZE); for (i =3D 0; i < 12; ++i) { diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index 344f77b..a10d79e 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -324,6 +324,9 @@ static void mch_update_pam(MCHPCIState *mch) /* SMRAM */ static void mch_update_smram(MCHPCIState *mch) { + if (!pc_machine_is_smm_enabled(PC_MACHINE(current_machine))) { + return; + } PCIDevice *pd =3D PCI_DEVICE(mch); bool h_smrame =3D (pd->config[MCH_HOST_BRIDGE_ESMRAMC] & MCH_HOST_BRID= GE_ESMRAMC_H_SMRAME); uint32_t tseg_size; @@ -469,46 +472,48 @@ static void mch_realize(PCIDevice *d, Error **errp) pc_pci_as_mapping_init(OBJECT(mch), mch->system_memory, mch->pci_address_space); =20 - /* if *disabled* show SMRAM to all CPUs */ - memory_region_init_alias(&mch->smram_region, OBJECT(mch), "smram-regio= n", - mch->pci_address_space, 0xa0000, 0x20000); - memory_region_add_subregion_overlap(mch->system_memory, 0xa0000, - &mch->smram_region, 1); - memory_region_set_enabled(&mch->smram_region, true); - - memory_region_init_alias(&mch->open_high_smram, OBJECT(mch), "smram-op= en-high", - mch->ram_memory, 0xa0000, 0x20000); - memory_region_add_subregion_overlap(mch->system_memory, 0xfeda0000, - &mch->open_high_smram, 1); - memory_region_set_enabled(&mch->open_high_smram, false); - - /* smram, as seen by SMM CPUs */ - memory_region_init(&mch->smram, OBJECT(mch), "smram", 1ull << 32); - memory_region_set_enabled(&mch->smram, true); - memory_region_init_alias(&mch->low_smram, OBJECT(mch), "smram-low", - mch->ram_memory, 0xa0000, 0x20000); - memory_region_set_enabled(&mch->low_smram, true); - memory_region_add_subregion(&mch->smram, 0xa0000, &mch->low_smram); - memory_region_init_alias(&mch->high_smram, OBJECT(mch), "smram-high", - mch->ram_memory, 0xa0000, 0x20000); - memory_region_set_enabled(&mch->high_smram, true); - memory_region_add_subregion(&mch->smram, 0xfeda0000, &mch->high_smram); - - memory_region_init_io(&mch->tseg_blackhole, OBJECT(mch), - &tseg_blackhole_ops, NULL, - "tseg-blackhole", 0); - memory_region_set_enabled(&mch->tseg_blackhole, false); - memory_region_add_subregion_overlap(mch->system_memory, - mch->below_4g_mem_size, - &mch->tseg_blackhole, 1); + if (pc_machine_is_smm_enabled(PC_MACHINE(current_machine))) { + /* if *disabled* show SMRAM to all CPUs */ + memory_region_init_alias(&mch->smram_region, OBJECT(mch), + "smram-region", mch->pci_address_space, 0xa0000, 0x20000); + memory_region_add_subregion_overlap(mch->system_memory, 0xa0000, + &mch->smram_region, 1); + memory_region_set_enabled(&mch->smram_region, true); =20 - memory_region_init_alias(&mch->tseg_window, OBJECT(mch), "tseg-window", - mch->ram_memory, mch->below_4g_mem_size, 0); - memory_region_set_enabled(&mch->tseg_window, false); - memory_region_add_subregion(&mch->smram, mch->below_4g_mem_size, - &mch->tseg_window); - object_property_add_const_link(qdev_get_machine(), "smram", - OBJECT(&mch->smram), &error_abort); + memory_region_init_alias(&mch->open_high_smram, OBJECT(mch), + "smram-open-high", mch->ram_memory, 0xa0000, 0x20000); + memory_region_add_subregion_overlap(mch->system_memory, 0xfeda0000, + &mch->open_high_smram, 1); + memory_region_set_enabled(&mch->open_high_smram, false); + + /* smram, as seen by SMM CPUs */ + memory_region_init(&mch->smram, OBJECT(mch), "smram", 1ull << 32); + memory_region_set_enabled(&mch->smram, true); + memory_region_init_alias(&mch->low_smram, OBJECT(mch), "smram-low", + mch->ram_memory, 0xa0000, 0x20000); + memory_region_set_enabled(&mch->low_smram, true); + memory_region_add_subregion(&mch->smram, 0xa0000, &mch->low_smram); + memory_region_init_alias(&mch->high_smram, OBJECT(mch), "smram-hig= h", + mch->ram_memory, 0xa0000, 0x20000); + memory_region_set_enabled(&mch->high_smram, true); + memory_region_add_subregion(&mch->smram, 0xfeda0000, &mch->high_sm= ram); + + memory_region_init_io(&mch->tseg_blackhole, OBJECT(mch), + &tseg_blackhole_ops, NULL, + "tseg-blackhole", 0); + memory_region_set_enabled(&mch->tseg_blackhole, false); + memory_region_add_subregion_overlap(mch->system_memory, + mch->below_4g_mem_size, + &mch->tseg_blackhole, 1); + + memory_region_init_alias(&mch->tseg_window, OBJECT(mch), "tseg-win= dow", + mch->ram_memory, mch->below_4g_mem_size, 0); + memory_region_set_enabled(&mch->tseg_window, false); + memory_region_add_subregion(&mch->smram, mch->below_4g_mem_size, + &mch->tseg_window); + object_property_add_const_link(qdev_get_machine(), "smram", + OBJECT(&mch->smram), &error_abort); + } =20 init_pam(DEVICE(mch), mch->ram_memory, mch->system_memory, mch->pci_address_space, &mch->pam_regions[0], diff --git a/kvm-all.c b/kvm-all.c index 90b8573..1250fff 100644 --- a/kvm-all.c +++ b/kvm-all.c @@ -1583,6 +1583,7 @@ static int kvm_init(MachineState *ms) const char *kvm_type; =20 s =3D KVM_STATE(ms->accelerator); + kvm_state =3D s; =20 /* * On systems where the kernel can support different base page @@ -1755,8 +1756,6 @@ static int kvm_init(MachineState *ms) kvm_irqchip_create(ms, s); } =20 - kvm_state =3D s; - if (kvm_eventfds_allowed) { s->memory_listener.listener.eventfd_add =3D kvm_mem_ioeventfd_add; s->memory_listener.listener.eventfd_del =3D kvm_mem_ioeventfd_del; diff --git a/target/i386/kvm.c b/target/i386/kvm.c index 55865db..65716b6 100644 --- a/target/i386/kvm.c +++ b/target/i386/kvm.c @@ -1254,7 +1254,7 @@ int kvm_arch_init(MachineState *ms, KVMState *s) } } =20 - if (kvm_check_extension(s, KVM_CAP_X86_SMM)) { + if (pc_machine_is_smm_enabled(PC_MACHINE(ms))) { smram_machine_done.notify =3D register_smram_listener; qemu_add_machine_init_done_notifier(&smram_machine_done); } --=20 1.8.3.1