From nobody Mon Feb 9 17:25:06 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1494848568938596.5508343571178; Mon, 15 May 2017 04:42:48 -0700 (PDT) Received: from localhost ([::1]:36110 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dAEOl-0006NL-90 for importer@patchew.org; Mon, 15 May 2017 07:42:47 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41814) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dAEMF-0004Xo-JJ for qemu-devel@nongnu.org; Mon, 15 May 2017 07:40:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dAEME-0002aP-Im for qemu-devel@nongnu.org; Mon, 15 May 2017 07:40:11 -0400 Received: from 10.mo69.mail-out.ovh.net ([46.105.73.241]:43950) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dAEME-0002Zk-9T for qemu-devel@nongnu.org; Mon, 15 May 2017 07:40:10 -0400 Received: from player699.ha.ovh.net (b9.ovh.net [213.186.33.59]) by mo69.mail-out.ovh.net (Postfix) with ESMTP id 3B3601FC04 for ; Mon, 15 May 2017 13:40:09 +0200 (CEST) Received: from bahia.lan (gar31-1-82-66-74-139.fbx.proxad.net [82.66.74.139]) (Authenticated sender: groug@kaod.org) by player699.ha.ovh.net (Postfix) with ESMTPA id DEDC5240084; Mon, 15 May 2017 13:40:04 +0200 (CEST) From: Greg Kurz To: qemu-ppc@nongnu.org, qemu-devel@nongnu.org Date: Mon, 15 May 2017 13:40:04 +0200 Message-ID: <149484840466.20089.893964776019028654.stgit@bahia.lan> In-Reply-To: <149484833874.20089.4164801378197848306.stgit@bahia.lan> References: <149484833874.20089.4164801378197848306.stgit@bahia.lan> User-Agent: StGit/0.17.1-20-gc0b1b-dirty MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Ovh-Tracer-Id: 10635531996790102411 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeeljedrudefgdegfecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 46.105.73.241 Subject: [Qemu-devel] [PATCH 6/6] spapr: fix migration of ICP objects from/to older QEMU X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Gibson , Cedric Le Goater , Bharata B Rao Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Commit 5bc8d26de20c ("spapr: allocate the ICPState object from under sPAPRCPUCore") moved ICP objects from the machine to CPU cores. This is an improvement since we no longer allocate ICP objects that will never be used. But it has the side-effect of breaking migration of older machine types from older QEMU versions. This patch introduces a compat flag in the sPAPR machine class so that all pseries machine up to 2.9 go on with the previous behavior of pre-allocating ICP objects. While here, we also ensure that object_property_add_child() errors cause QEMU to abort for newer machines. Signed-off-by: Greg Kurz --- hw/ppc/spapr.c | 36 ++++++++++++++++++++++++++++++++++++ hw/ppc/spapr_cpu_core.c | 28 ++++++++++++++++++++-------- include/hw/ppc/spapr.h | 2 ++ 3 files changed, 58 insertions(+), 8 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index c53989bb10b1..ab3683bcd677 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -126,6 +126,7 @@ error: static void xics_system_init(MachineState *machine, int nr_irqs, Error **e= rrp) { sPAPRMachineState *spapr =3D SPAPR_MACHINE(machine); + sPAPRMachineClass *smc =3D SPAPR_MACHINE_GET_CLASS(spapr); Error *local_err =3D NULL; =20 if (kvm_enabled()) { @@ -151,6 +152,38 @@ static void xics_system_init(MachineState *machine, in= t nr_irqs, Error **errp) &local_err); } =20 + if (!spapr->ics) { + goto out; + } + + if (smc->must_pre_allocate_icps) { + int smt =3D kvmppc_smt_threads(); + int nr_servers =3D DIV_ROUND_UP(max_cpus * smt, smp_threads); + int i; + + spapr->legacy_icps =3D g_malloc0(nr_servers * sizeof(ICPState)); + + for (i =3D 0; i < nr_servers; i++) { + void* obj =3D &spapr->legacy_icps[i]; + + object_initialize(obj, sizeof(ICPState), spapr->icp_type); + object_property_add_child(OBJECT(spapr), "icp[*]", obj, + &error_abort); + object_unref(obj); + object_property_add_const_link(obj, "xics", OBJECT(spapr), + &error_abort); + object_property_set_bool(obj, true, "realized", &local_err); + if (local_err) { + while (i--) { + object_unparent(obj); + } + g_free(spapr->legacy_icps); + break; + } + } + } + +out: error_propagate(errp, local_err); } =20 @@ -3256,8 +3289,11 @@ static void spapr_machine_2_9_instance_options(Machi= neState *machine) =20 static void spapr_machine_2_9_class_options(MachineClass *mc) { + sPAPRMachineClass *smc =3D SPAPR_MACHINE_CLASS(mc); + spapr_machine_2_10_class_options(mc); SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_9); + smc->must_pre_allocate_icps =3D true; } =20 DEFINE_SPAPR_MACHINE(2_9, "2.9", false); diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 63d160f7e010..5476647efa06 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -119,6 +119,7 @@ static void spapr_cpu_core_unrealizefn(DeviceState *dev= , Error **errp) size_t size =3D object_type_get_instance_size(typename); CPUCore *cc =3D CPU_CORE(dev); int i; + sPAPRMachineState *spapr =3D SPAPR_MACHINE(qdev_get_machine()); =20 for (i =3D 0; i < cc->nr_threads; i++) { void *obj =3D sc->threads + i * size; @@ -127,7 +128,9 @@ static void spapr_cpu_core_unrealizefn(DeviceState *dev= , Error **errp) PowerPCCPU *cpu =3D POWERPC_CPU(cs); =20 spapr_cpu_destroy(cpu); - object_unparent(cpu->intc); + if (!spapr->legacy_icps) { + object_unparent(cpu->intc); + } cpu_remove_sync(cs); object_unparent(obj); } @@ -142,12 +145,19 @@ static void spapr_cpu_core_realize_child(Object *chil= d, Error **errp) PowerPCCPU *cpu =3D POWERPC_CPU(cs); Object *obj; =20 - obj =3D object_new(spapr->icp_type); - object_property_add_child(OBJECT(cpu), "icp", obj, NULL); - object_property_add_const_link(obj, "xics", OBJECT(spapr), &error_abor= t); - object_property_set_bool(obj, true, "realized", &local_err); - if (local_err) { - goto error; + if (spapr->legacy_icps) { + int index =3D cpu->parent_obj.cpu_index; + + obj =3D OBJECT(&spapr->legacy_icps[index]); + } else { + obj =3D object_new(spapr->icp_type); + object_property_add_child(OBJECT(cpu), "icp", obj, &error_abort); + object_property_add_const_link(obj, "xics", OBJECT(spapr), + &error_abort); + object_property_set_bool(obj, true, "realized", &local_err); + if (local_err) { + goto error; + } } =20 object_property_set_bool(child, true, "realized", &local_err); @@ -164,7 +174,9 @@ static void spapr_cpu_core_realize_child(Object *child,= Error **errp) return; =20 error: - object_unparent(obj); + if (!spapr->legacy_icps) { + object_unparent(obj); + } error_propagate(errp, local_err); } =20 diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 5802f888c39d..72cd5af2679b 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -53,6 +53,7 @@ struct sPAPRMachineClass { bool dr_lmb_enabled; /* enable dynamic-reconfig/hotplug of LMBs = */ bool use_ohci_by_default; /* use USB-OHCI instead of XHCI */ const char *tcg_default_cpu; /* which (TCG) CPU to simulate by default= */ + bool must_pre_allocate_icps; /* only for pseries-2.9 and older */ void (*phb_placement)(sPAPRMachineState *spapr, uint32_t index, uint64_t *buid, hwaddr *pio,=20 hwaddr *mmio32, hwaddr *mmio64, @@ -109,6 +110,7 @@ struct sPAPRMachineState { MemoryHotplugState hotplug_memory; =20 const char *icp_type; + ICPState *legacy_icps; }; =20 #define H_SUCCESS 0