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Wed, 10 May 2017 16:53:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d8YbY-00085a-KW for qemu-devel@nongnu.org; Wed, 10 May 2017 16:53:08 -0400 Received: from chuckie.co.uk ([82.165.15.123]:57056 helo=s16892447.onlinehome-server.info) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d8YbY-00081B-D7 for qemu-devel@nongnu.org; Wed, 10 May 2017 16:53:04 -0400 Received: from host109-151-159-236.range109-151.btcentralplus.com ([109.151.159.236] helo=kentang.home) by s16892447.onlinehome-server.info with esmtpsa (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.76) (envelope-from ) id 1d8YbP-0003Hi-HX; Wed, 10 May 2017 21:52:56 +0100 From: Mark Cave-Ayland To: qemu-devel@nongnu.org, kraxel@redhat.com Date: Wed, 10 May 2017 21:52:30 +0100 Message-Id: <1494449551-20227-2-git-send-email-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1494449551-20227-1-git-send-email-mark.cave-ayland@ilande.co.uk> References: <1494449551-20227-1-git-send-email-mark.cave-ayland@ilande.co.uk> X-SA-Exim-Connect-IP: 109.151.159.236 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk X-SA-Exim-Version: 4.2.1 (built Sun, 08 Jan 2012 02:45:44 +0000) X-SA-Exim-Scanned: Yes (on s16892447.onlinehome-server.info) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 82.165.15.123 Subject: [Qemu-devel] [PATCH 1/2] cg3: make display updates thread safe X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Mark Cave-Ayland --- hw/display/cg3.c | 41 +++++++++++++++++++++-------------------- 1 file changed, 21 insertions(+), 20 deletions(-) diff --git a/hw/display/cg3.c b/hw/display/cg3.c index 7ef8a96..1de15a1 100644 --- a/hw/display/cg3.c +++ b/hw/display/cg3.c @@ -94,7 +94,8 @@ static void cg3_update_display(void *opaque) uint32_t dval; int x, y, y_start; unsigned int width, height; - ram_addr_t page, page_min, page_max; + ram_addr_t page; + DirtyBitmapSnapshot *snap =3D NULL; =20 if (surface_bits_per_pixel(surface) !=3D 32) { return; @@ -103,29 +104,32 @@ static void cg3_update_display(void *opaque) height =3D s->height; =20 y_start =3D -1; - page_min =3D -1; - page_max =3D 0; - page =3D 0; pix =3D memory_region_get_ram_ptr(&s->vram_mem); data =3D (uint32_t *)surface_data(surface); =20 - memory_region_sync_dirty_bitmap(&s->vram_mem); + if (!s->full_update) { + memory_region_sync_dirty_bitmap(&s->vram_mem); + snap =3D memory_region_snapshot_and_clear_dirty(&s->vram_mem, 0x0, + memory_region_size(&s->vram_= mem), + DIRTY_MEMORY_VGA); + } + for (y =3D 0; y < height; y++) { - int update =3D s->full_update; + int update; =20 page =3D (ram_addr_t)y * width; - update |=3D memory_region_get_dirty(&s->vram_mem, page, width, - DIRTY_MEMORY_VGA); + + if (s->full_update) { + update =3D 1; + } else { + update =3D memory_region_snapshot_get_dirty(&s->vram_mem, snap= , page, + width); + } + if (update) { if (y_start < 0) { y_start =3D y; } - if (page < page_min) { - page_min =3D page; - } - if (page > page_max) { - page_max =3D page; - } =20 for (x =3D 0; x < width; x++) { dval =3D *pix++; @@ -134,7 +138,7 @@ static void cg3_update_display(void *opaque) } } else { if (y_start >=3D 0) { - dpy_gfx_update(s->con, 0, y_start, s->width, y - y_start); + dpy_gfx_update(s->con, 0, y_start, width, y - y_start); y_start =3D -1; } pix +=3D width; @@ -143,17 +147,14 @@ static void cg3_update_display(void *opaque) } s->full_update =3D 0; if (y_start >=3D 0) { - dpy_gfx_update(s->con, 0, y_start, s->width, y - y_start); - } - if (page_max >=3D page_min) { - memory_region_reset_dirty(&s->vram_mem, - page_min, page_max - page_min, DIRTY_MEMORY_= VGA); + dpy_gfx_update(s->con, 0, y_start, width, y - y_start); } /* vsync interrupt? */ if (s->regs[0] & CG3_CR_ENABLE_INTS) { s->regs[1] |=3D CG3_SR_PENDING_INT; qemu_irq_raise(s->irq); } + g_free(snap); } =20 static void cg3_invalidate_display(void *opaque) --=20 1.7.10.4