From nobody Sun May 5 17:00:06 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1493816362920749.2943900582213; Wed, 3 May 2017 05:59:22 -0700 (PDT) Received: from localhost ([::1]:36575 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d5tsG-0000tb-O5 for importer@patchew.org; Wed, 03 May 2017 08:59:20 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39167) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d5tqV-0007vS-KK for qemu-devel@nongnu.org; Wed, 03 May 2017 08:57:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d5tqU-0000Z2-Ml for qemu-devel@nongnu.org; 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Wed, 03 May 2017 12:57:26 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 01/24] tests: add CPUs to numa node mapping test X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Andrew Jones , Eduardo Habkost , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Shannon Zhao , Paolo Bonzini , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Igor Mammedov Reviewed-by: David Gibson Reviewed-by: Eduardo Habkost --- tests/Makefile.include | 5 +++ tests/numa-test.c | 106 +++++++++++++++++++++++++++++++++++++++++++++= ++++ 2 files changed, 111 insertions(+) create mode 100644 tests/numa-test.c diff --git a/tests/Makefile.include b/tests/Makefile.include index 31931c0..16ff8f3 100644 --- a/tests/Makefile.include +++ b/tests/Makefile.include @@ -260,6 +260,7 @@ check-qtest-i386-y +=3D tests/test-filter-mirror$(EXESU= F) check-qtest-i386-y +=3D tests/test-filter-redirector$(EXESUF) check-qtest-i386-y +=3D tests/postcopy-test$(EXESUF) check-qtest-i386-y +=3D tests/test-x86-cpuid-compat$(EXESUF) +check-qtest-i386-y +=3D tests/numa-test$(EXESUF) check-qtest-x86_64-y +=3D $(check-qtest-i386-y) gcov-files-i386-y +=3D i386-softmmu/hw/timer/mc146818rtc.c gcov-files-x86_64-y =3D $(subst i386-softmmu/,x86_64-softmmu/,$(gcov-files= -i386-y)) @@ -300,6 +301,7 @@ check-qtest-ppc64-y +=3D tests/test-netfilter$(EXESUF) check-qtest-ppc64-y +=3D tests/test-filter-mirror$(EXESUF) check-qtest-ppc64-y +=3D tests/test-filter-redirector$(EXESUF) check-qtest-ppc64-y +=3D tests/display-vga-test$(EXESUF) +check-qtest-ppc64-y +=3D tests/numa-test$(EXESUF) check-qtest-ppc64-$(CONFIG_EVENTFD) +=3D tests/ivshmem-test$(EXESUF) =20 check-qtest-sh4-y =3D tests/endianness-test$(EXESUF) @@ -324,6 +326,8 @@ gcov-files-arm-y +=3D arm-softmmu/hw/block/virtio-blk.c check-qtest-arm-y +=3D tests/test-arm-mptimer$(EXESUF) gcov-files-arm-y +=3D hw/timer/arm_mptimer.c =20 +check-qtest-aarch64-y =3D tests/numa-test$(EXESUF) + check-qtest-microblazeel-y =3D $(check-qtest-microblaze-y) =20 check-qtest-xtensaeb-y =3D $(check-qtest-xtensa-y) @@ -753,6 +757,7 @@ tests/vhost-user-bridge$(EXESUF): tests/vhost-user-brid= ge.o contrib/libvhost-use tests/test-uuid$(EXESUF): tests/test-uuid.o $(test-util-obj-y) tests/test-arm-mptimer$(EXESUF): tests/test-arm-mptimer.o tests/test-qapi-util$(EXESUF): tests/test-qapi-util.o $(test-util-obj-y) +tests/numa-test$(EXESUF): tests/numa-test.o =20 tests/migration/stress$(EXESUF): tests/migration/stress.o $(call quiet-command, $(LINKPROG) -static -O3 $(PTHREAD_LIB) -o $@ $< ,"L= INK","$(TARGET_DIR)$@") diff --git a/tests/numa-test.c b/tests/numa-test.c new file mode 100644 index 0000000..f5da0c8 --- /dev/null +++ b/tests/numa-test.c @@ -0,0 +1,106 @@ +/* + * NUMA configuration test cases + * + * Copyright (c) 2017 Red Hat Inc. + * Authors: + * Igor Mammedov + * + * This work is licensed under the terms of the GNU GPL, version 2 or late= r. + * See the COPYING file in the top-level directory. + */ + +#include "qemu/osdep.h" +#include "libqtest.h" + +static char *make_cli(const char *generic_cli, const char *test_cli) +{ + return g_strdup_printf("%s %s", generic_cli ? generic_cli : "", test_c= li); +} + +static char *hmp_info_numa(void) +{ + QDict *resp; + char *s; + + resp =3D qmp("{ 'execute': 'human-monitor-command', 'arguments': " + "{ 'command-line': 'info numa '} }"); + g_assert(resp); + g_assert(qdict_haskey(resp, "return")); + s =3D g_strdup(qdict_get_str(resp, "return")); + g_assert(s); + QDECREF(resp); + return s; +} + +static void test_mon_explicit(const void *data) +{ + char *s; + char *cli; + + cli =3D make_cli(data, "-smp 8 " + "-numa node,nodeid=3D0,cpus=3D0-3 " + "-numa node,nodeid=3D1,cpus=3D4-7 "); + qtest_start(cli); + + s =3D hmp_info_numa(); + g_assert(strstr(s, "node 0 cpus: 0 1 2 3")); + g_assert(strstr(s, "node 1 cpus: 4 5 6 7")); + g_free(s); + + qtest_end(); + g_free(cli); +} + +static void test_mon_default(const void *data) +{ + char *s; + char *cli; + + cli =3D make_cli(data, "-smp 8 -numa node -numa node"); + qtest_start(cli); + + s =3D hmp_info_numa(); + g_assert(strstr(s, "node 0 cpus: 0 2 4 6")); + g_assert(strstr(s, "node 1 cpus: 1 3 5 7")); + g_free(s); + + qtest_end(); + g_free(cli); +} + +static void test_mon_partial(const void *data) +{ + char *s; + char *cli; + + cli =3D make_cli(data, "-smp 8 " + "-numa node,nodeid=3D0,cpus=3D0-1 " + "-numa node,nodeid=3D1,cpus=3D4-5 "); + qtest_start(cli); + + s =3D hmp_info_numa(); + g_assert(strstr(s, "node 0 cpus: 0 1 2 3 6 7")); + g_assert(strstr(s, "node 1 cpus: 4 5")); + g_free(s); + + qtest_end(); + g_free(cli); +} + +int main(int argc, char **argv) +{ + const char *args =3D NULL; + const char *arch =3D qtest_get_arch(); + + if (strcmp(arch, "aarch64") =3D=3D 0) { + args =3D "-machine virt"; + } + + g_test_init(&argc, &argv, NULL); + + qtest_add_data_func("/numa/mon/default", args, test_mon_default); + qtest_add_data_func("/numa/mon/cpus/explicit", args, test_mon_explicit= ); + qtest_add_data_func("/numa/mon/cpus/partial", args, test_mon_partial); + + return g_test_run(); +} --=20 2.7.4 From nobody Sun May 5 17:00:06 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1493816528368701.5047236606111; Wed, 3 May 2017 06:02:08 -0700 (PDT) Received: from localhost ([::1]:36600 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d5tux-0003B6-1a for importer@patchew.org; Wed, 03 May 2017 09:02:07 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39213) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d5tqY-0007xx-Aa for qemu-devel@nongnu.org; Wed, 03 May 2017 08:57:37 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d5tqX-0000aC-5o for qemu-devel@nongnu.org; Wed, 03 May 2017 08:57:34 -0400 Received: from mx1.redhat.com ([209.132.183.28]:52726) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d5tqU-0000YY-A6; Wed, 03 May 2017 08:57:30 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 2112F61D0F; Wed, 3 May 2017 12:57:29 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id F1824182D8; Wed, 3 May 2017 12:57:26 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 2112F61D0F Authentication-Results: ext-mx10.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx10.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 2112F61D0F From: Igor Mammedov To: qemu-devel@nongnu.org Date: Wed, 3 May 2017 14:56:56 +0200 Message-Id: <1493816238-33120-3-git-send-email-imammedo@redhat.com> In-Reply-To: <1493816238-33120-1-git-send-email-imammedo@redhat.com> References: <1493816238-33120-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Wed, 03 May 2017 12:57:29 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 02/24] hw/arm/virt: extract mp-affinity calculation in separate function X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Andrew Jones , Eduardo Habkost , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Shannon Zhao , Paolo Bonzini , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Igor Mammedov Reviewed-by: Andrew Jones --- v2: (Drew) - s/virt_idx2mp_affinity/virt_cpu_mp_affinity/ - add arm_cpu_mp_affinity() to reduce code duplication --- target/arm/cpu.h | 2 ++ hw/arm/virt.c | 43 ++++++++++++++++++++++++++----------------- target/arm/cpu.c | 12 +++++++++--- 3 files changed, 37 insertions(+), 20 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 1055bfe..048faed 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -710,6 +710,8 @@ static inline ARMCPU *arm_env_get_cpu(CPUARMState *env) return container_of(env, ARMCPU, env); } =20 +uint64_t arm_cpu_mp_affinity(int idx, uint8_t clustersz); + #define ENV_GET_CPU(e) CPU(arm_env_get_cpu(e)) =20 #define ENV_OFFSET offsetof(ARMCPU, env) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 5f62a03..61ae437 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1194,6 +1194,29 @@ void virt_machine_done(Notifier *notifier, void *dat= a) virt_build_smbios(vms); } =20 +static uint64_t virt_cpu_mp_affinity(VirtMachineState *vms, int idx) +{ + uint8_t clustersz =3D ARM_DEFAULT_CPUS_PER_CLUSTER; + VirtMachineClass *vmc =3D VIRT_MACHINE_GET_CLASS(vms); + + if (!vmc->disallow_affinity_adjustment) { + /* Adjust MPIDR like 64-bit KVM hosts, which incorporate the + * GIC's target-list limitations. 32-bit KVM hosts currently + * always create clusters of 4 CPUs, but that is expected to + * change when they gain support for gicv3. When KVM is enabled + * it will override the changes we make here, therefore our + * purposes are to make TCG consistent (with 64-bit KVM hosts) + * and to improve SGI efficiency. + */ + if (vms->gic_version =3D=3D 3) { + clustersz =3D GICV3_TARGETLIST_BITS; + } else { + clustersz =3D GIC_TARGETLIST_BITS; + } + } + return arm_cpu_mp_affinity(idx, clustersz); +} + static void machvirt_init(MachineState *machine) { VirtMachineState *vms =3D VIRT_MACHINE(machine); @@ -1210,7 +1233,6 @@ static void machvirt_init(MachineState *machine) CPUClass *cc; Error *err =3D NULL; bool firmware_loaded =3D bios_name || drive_get(IF_PFLASH, 0, 0); - uint8_t clustersz; =20 if (!cpu_model) { cpu_model =3D "cortex-a15"; @@ -1263,10 +1285,8 @@ static void machvirt_init(MachineState *machine) */ if (vms->gic_version =3D=3D 3) { virt_max_cpus =3D vms->memmap[VIRT_GIC_REDIST].size / 0x20000; - clustersz =3D GICV3_TARGETLIST_BITS; } else { virt_max_cpus =3D GIC_NCPU; - clustersz =3D GIC_TARGETLIST_BITS; } =20 if (max_cpus > virt_max_cpus) { @@ -1326,20 +1346,9 @@ static void machvirt_init(MachineState *machine) =20 for (n =3D 0; n < smp_cpus; n++) { Object *cpuobj =3D object_new(typename); - if (!vmc->disallow_affinity_adjustment) { - /* Adjust MPIDR like 64-bit KVM hosts, which incorporate the - * GIC's target-list limitations. 32-bit KVM hosts currently - * always create clusters of 4 CPUs, but that is expected to - * change when they gain support for gicv3. When KVM is enabled - * it will override the changes we make here, therefore our - * purposes are to make TCG consistent (with 64-bit KVM hosts) - * and to improve SGI efficiency. - */ - uint8_t aff1 =3D n / clustersz; - uint8_t aff0 =3D n % clustersz; - object_property_set_int(cpuobj, (aff1 << ARM_AFF1_SHIFT) | aff= 0, - "mp-affinity", NULL); - } + + object_property_set_int(cpuobj, virt_cpu_mp_affinity(vms, n), + "mp-affinity", NULL); =20 if (!vms->secure) { object_property_set_bool(cpuobj, false, "has_el3", NULL); diff --git a/target/arm/cpu.c b/target/arm/cpu.c index b357aee..ee1406d 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -458,6 +458,13 @@ static void arm_disas_set_info(CPUState *cpu, disassem= ble_info *info) } } =20 +uint64_t arm_cpu_mp_affinity(int idx, uint8_t clustersz) +{ + uint32_t Aff1 =3D idx / clustersz; + uint32_t Aff0 =3D idx % clustersz; + return (Aff1 << ARM_AFF1_SHIFT) | Aff0; +} + static void arm_cpu_initfn(Object *obj) { CPUState *cs =3D CPU(obj); @@ -709,9 +716,8 @@ static void arm_cpu_realizefn(DeviceState *dev, Error *= *errp) * so these bits always RAZ. */ if (cpu->mp_affinity =3D=3D ARM64_AFFINITY_INVALID) { - uint32_t Aff1 =3D cs->cpu_index / ARM_DEFAULT_CPUS_PER_CLUSTER; - uint32_t Aff0 =3D cs->cpu_index % ARM_DEFAULT_CPUS_PER_CLUSTER; - cpu->mp_affinity =3D (Aff1 << ARM_AFF1_SHIFT) | Aff0; + cpu->mp_affinity =3D arm_cpu_mp_affinity(cs->cpu_index, + ARM_DEFAULT_CPUS_PER_CLUSTE= R); } =20 if (cpu->reset_hivecs) { --=20 2.7.4 From nobody Sun May 5 17:00:06 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1493816523876557.3865524139544; Wed, 3 May 2017 06:02:03 -0700 (PDT) Received: from localhost ([::1]:36599 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d5tus-00036j-L9 for importer@patchew.org; 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Wed, 3 May 2017 12:57:29 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 866AE80C07 Authentication-Results: ext-mx02.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx02.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 866AE80C07 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Wed, 3 May 2017 14:56:57 +0200 Message-Id: <1493816238-33120-4-git-send-email-imammedo@redhat.com> In-Reply-To: <1493816238-33120-1-git-send-email-imammedo@redhat.com> References: <1493816238-33120-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Wed, 03 May 2017 12:57:31 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 03/24] hw/arm/virt: use machine->possible_cpus for storing possible topology info X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Andrew Jones , Eduardo Habkost , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Shannon Zhao , Paolo Bonzini , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" for now precalculate and store mp_afinity in possible_cpus as ARM cpus don't have socket/core/thread-id properties yet. In follow patches possible_cpus will be used for storing and setting NUMA node mapping and replace legacy bitmap based numa_info[node_id].node_cpu/numa_get_node_for_cpu() For the lack of better idea, this patch cannibalizes possible_cpus.cpus[x].props.thread_id so that *_cpu_index_to_props() callback could return addressable by props CPU which will be used by machine_set_cpu_numa_node() in follow up patches to assign a CPU to node. But cannibalizing is fine for now as that thread_id isn't exposed to users (no hotpluggable_cpus callback support for ARM yet) and it will be used only internally until 'device_add cpu' is supported where we can decide on which properties to use. Signed-off-by: Igor Mammedov Reviewed-by: Andrew Jones --- v2: (Drew) - discarding result of possible_cpu_arch_ids() makes call not obvious and is confusing. Instead assign possible_cpu_arch_ids() result to local var and use it instead of direct access to machine->possible_cpus field, as it's done in pc.c --- hw/arm/virt.c | 40 +++++++++++++++++++++++++++++++++++++--- 1 file changed, 37 insertions(+), 3 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 61ae437..e2c5626 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1221,6 +1221,8 @@ static void machvirt_init(MachineState *machine) { VirtMachineState *vms =3D VIRT_MACHINE(machine); VirtMachineClass *vmc =3D VIRT_MACHINE_GET_CLASS(machine); + MachineClass *mc =3D MACHINE_GET_CLASS(machine); + const CPUArchIdList *possible_cpus; qemu_irq pic[NUM_IRQS]; MemoryRegion *sysmem =3D get_system_memory(); MemoryRegion *secure_sysmem =3D NULL; @@ -1344,10 +1346,16 @@ static void machvirt_init(MachineState *machine) exit(1); } =20 - for (n =3D 0; n < smp_cpus; n++) { - Object *cpuobj =3D object_new(typename); + possible_cpus =3D mc->possible_cpu_arch_ids(machine); + for (n =3D 0; n < possible_cpus->len; n++) { + Object *cpuobj; =20 - object_property_set_int(cpuobj, virt_cpu_mp_affinity(vms, n), + if (n >=3D smp_cpus) { + break; + } + + cpuobj =3D object_new(typename); + object_property_set_int(cpuobj, possible_cpus->cpus[n].arch_id, "mp-affinity", NULL); =20 if (!vms->secure) { @@ -1527,6 +1535,31 @@ static void virt_set_gic_version(Object *obj, const = char *value, Error **errp) } } =20 +static const CPUArchIdList *virt_possible_cpu_arch_ids(MachineState *ms) +{ + int n; + VirtMachineState *vms =3D VIRT_MACHINE(ms); + + if (ms->possible_cpus) { + assert(ms->possible_cpus->len =3D=3D max_cpus); + return ms->possible_cpus; + } + + ms->possible_cpus =3D g_malloc0(sizeof(CPUArchIdList) + + sizeof(CPUArchId) * max_cpus); + ms->possible_cpus->len =3D max_cpus; + for (n =3D 0; n < ms->possible_cpus->len; n++) { + ms->possible_cpus->cpus[n].arch_id =3D + virt_cpu_mp_affinity(vms, n); + ms->possible_cpus->cpus[n].props.has_thread_id =3D true; + ms->possible_cpus->cpus[n].props.thread_id =3D n; + + /* TODO: add 'has_node/node' here to describe + to which node core belongs */ + } + return ms->possible_cpus; +} + static void virt_machine_class_init(ObjectClass *oc, void *data) { MachineClass *mc =3D MACHINE_CLASS(oc); @@ -1543,6 +1576,7 @@ static void virt_machine_class_init(ObjectClass *oc, = void *data) mc->pci_allow_0_address =3D true; /* We know we will never create a pre-ARMv7 CPU which needs 1K pages */ mc->minimum_page_bits =3D 12; + mc->possible_cpu_arch_ids =3D virt_possible_cpu_arch_ids; } =20 static const TypeInfo virt_machine_info =3D { --=20 2.7.4 From nobody Sun May 5 17:00:06 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1493816408496919.7612594247234; Wed, 3 May 2017 06:00:08 -0700 (PDT) Received: from localhost ([::1]:36580 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d5tsz-0001Vb-FN for importer@patchew.org; Wed, 03 May 2017 09:00:05 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39295) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d5tqd-00082y-AG for qemu-devel@nongnu.org; Wed, 03 May 2017 08:57:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d5tqc-0000dX-JT for qemu-devel@nongnu.org; Wed, 03 May 2017 08:57:39 -0400 Received: from mx1.redhat.com ([209.132.183.28]:51364) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d5tqZ-0000bK-6i; Wed, 03 May 2017 08:57:35 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 02D888124D; Wed, 3 May 2017 12:57:34 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id D124517C5A; Wed, 3 May 2017 12:57:31 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 02D888124D Authentication-Results: ext-mx01.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx01.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 02D888124D From: Igor Mammedov To: qemu-devel@nongnu.org Date: Wed, 3 May 2017 14:56:58 +0200 Message-Id: <1493816238-33120-5-git-send-email-imammedo@redhat.com> In-Reply-To: <1493816238-33120-1-git-send-email-imammedo@redhat.com> References: <1493816238-33120-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Wed, 03 May 2017 12:57:34 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 04/24] hw/arm/virt: explicitly allocate cpu_index for cpus X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Andrew Jones , Eduardo Habkost , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Shannon Zhao , Paolo Bonzini , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Currently cpu_index is implicitly auto assigned during cpu.realize() time cpu_exec_realizefn()->cpu_list_add(). It happens to match index in possible_cpus so take control over it and make board initialize cpu_index to possible_cpus index explicitly. It will at least document that board is in control of it and when '-device cpu' support comes it will keep cpu_index stable regardless of order cpus are created so it won't break migration. Within this series it will be used for internal conversion from storing cpu_index based NUMA node bitmaps to property based mapping with possible_cpus, And will allow map cpu_index to a CPU entry in possible_cpus array. Signed-off-by: Igor Mammedov Reviewed-by: Andrew Jones --- hw/arm/virt.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index e2c5626..acc748e 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1349,6 +1349,7 @@ static void machvirt_init(MachineState *machine) possible_cpus =3D mc->possible_cpu_arch_ids(machine); for (n =3D 0; n < possible_cpus->len; n++) { Object *cpuobj; + CPUState *cs; =20 if (n >=3D smp_cpus) { break; @@ -1358,6 +1359,9 @@ static void machvirt_init(MachineState *machine) object_property_set_int(cpuobj, possible_cpus->cpus[n].arch_id, "mp-affinity", NULL); =20 + cs =3D CPU(cpuobj); + cs->cpu_index =3D n; + if (!vms->secure) { object_property_set_bool(cpuobj, false, "has_el3", NULL); } --=20 2.7.4 From nobody Sun May 5 17:00:06 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1493816709351365.268177864039; Wed, 3 May 2017 06:05:09 -0700 (PDT) Received: from localhost ([::1]:36614 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d5txq-0005sX-1F for importer@patchew.org; Wed, 03 May 2017 09:05:06 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39364) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d5tqh-000869-4X for qemu-devel@nongnu.org; Wed, 03 May 2017 08:57:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d5tqf-0000h5-JN for qemu-devel@nongnu.org; Wed, 03 May 2017 08:57:43 -0400 Received: from mx1.redhat.com ([209.132.183.28]:45146) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d5tqb-0000c9-Kw; Wed, 03 May 2017 08:57:37 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 714F68046A; Wed, 3 May 2017 12:57:36 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 4EF0117C5A; Wed, 3 May 2017 12:57:34 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 714F68046A Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 714F68046A From: Igor Mammedov To: qemu-devel@nongnu.org Date: Wed, 3 May 2017 14:56:59 +0200 Message-Id: <1493816238-33120-6-git-send-email-imammedo@redhat.com> In-Reply-To: <1493816238-33120-1-git-send-email-imammedo@redhat.com> References: <1493816238-33120-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Wed, 03 May 2017 12:57:36 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 05/24] numa: move source of default CPUs to NUMA node mapping into boards X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Andrew Jones , Eduardo Habkost , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Shannon Zhao , Paolo Bonzini , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Originally CPU threads were by default assigned in round-robin fashion. However it was causing issues in guest since CPU threads from the same socket/core could be placed on different NUMA nodes. Commit fb43b73b (pc: fix default VCPU to NUMA node mapping) fixed it by grouping threads within a socket on the same node introducing cpu_index_to_socket_id() callback and commit 20bb648d (spapr: Fix default NUMA node allocation for threads) reused callback to fix similar issues for SPAPR machine even though socket doesn't make much sense there. As result QEMU ended up having 3 default distribution rules used by 3 targets /virt-arm, spapr, pc/. In effort of moving NUMA mapping for CPUs into possible_cpus, generalize default mapping in numa.c by making boards decide on default mapping and let them explicitly tell generic numa code to which node a CPU thread belongs to by replacing cpu_index_to_socket_id() with @cpu_index_to_instance_props() which provides default node_id assigned by board to specified cpu_index. Signed-off-by: Igor Mammedov Reviewed-by: Eduardo Habkost --- Patch only moves source of default mapping to possible_cpus[] and leaves the rest of NUMA handling to numa_info[node_id].node_cpu bitmaps. It's up to follow up patches to replace bitmaps with possible_cpus[] internally. v3: - drop duplicate ';' (Drew) v2: - use cpu_index instead of core_id directly in spapr_cpu_index_to_props() (David Gibson) - ammend comment message s/board/numa init code/ (David Gibson) --- include/hw/boards.h | 8 ++++++-- include/sysemu/numa.h | 2 +- hw/arm/virt.c | 20 ++++++++++++++++++-- hw/i386/pc.c | 23 +++++++++++++++++------ hw/ppc/spapr.c | 27 ++++++++++++++++++++------- numa.c | 15 +++++++++------ vl.c | 2 +- 7 files changed, 72 insertions(+), 25 deletions(-) diff --git a/include/hw/boards.h b/include/hw/boards.h index 31d9c72..5d6af21 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -74,7 +74,10 @@ typedef struct { * of HotplugHandler object, which handles hotplug operation * for a given @dev. It may return NULL if @dev doesn't require * any actions to be performed by hotplug handler. - * @cpu_index_to_socket_id: + * @cpu_index_to_instance_props: + * used to provide @cpu_index to socket/core/thread number mapping, all= owing + * legacy code to perform maping from cpu_index to topology properties + * Returns: tuple of socket/core/thread ids given cpu_index belongs to. * used to provide @cpu_index to socket number mapping, allowing * a machine to group CPU threads belonging to the same socket/package * Returns: socket number given cpu_index belongs to. @@ -139,7 +142,8 @@ struct MachineClass { =20 HotplugHandler *(*get_hotplug_handler)(MachineState *machine, DeviceState *dev); - unsigned (*cpu_index_to_socket_id)(unsigned cpu_index); + CpuInstanceProperties (*cpu_index_to_instance_props)(MachineState *mac= hine, + unsigned cpu_inde= x); const CPUArchIdList *(*possible_cpu_arch_ids)(MachineState *machine); }; =20 diff --git a/include/sysemu/numa.h b/include/sysemu/numa.h index 8f09dcf..46ea6c7 100644 --- a/include/sysemu/numa.h +++ b/include/sysemu/numa.h @@ -24,7 +24,7 @@ typedef struct node_info { } NodeInfo; =20 extern NodeInfo numa_info[MAX_NODES]; -void parse_numa_opts(MachineClass *mc); +void parse_numa_opts(MachineState *ms); void numa_post_machine_init(void); void query_numa_node_mem(uint64_t node_mem[]); extern QemuOptsList qemu_numa_opts; diff --git a/hw/arm/virt.c b/hw/arm/virt.c index acc748e..3e19b5f 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1539,6 +1539,16 @@ static void virt_set_gic_version(Object *obj, const = char *value, Error **errp) } } =20 +static CpuInstanceProperties +virt_cpu_index_to_props(MachineState *ms, unsigned cpu_index) +{ + MachineClass *mc =3D MACHINE_GET_CLASS(ms); + const CPUArchIdList *possible_cpus =3D mc->possible_cpu_arch_ids(ms); + + assert(cpu_index < possible_cpus->len); + return possible_cpus->cpus[cpu_index].props;; +} + static const CPUArchIdList *virt_possible_cpu_arch_ids(MachineState *ms) { int n; @@ -1558,8 +1568,13 @@ static const CPUArchIdList *virt_possible_cpu_arch_i= ds(MachineState *ms) ms->possible_cpus->cpus[n].props.has_thread_id =3D true; ms->possible_cpus->cpus[n].props.thread_id =3D n; =20 - /* TODO: add 'has_node/node' here to describe - to which node core belongs */ + /* default distribution of CPUs over NUMA nodes */ + if (nb_numa_nodes) { + /* preset values but do not enable them i.e. 'has_node_id =3D = false', + * numa init code will enable them later if manual mapping was= n't + * present on CLI */ + ms->possible_cpus->cpus[n].props.node_id =3D n % nb_numa_nodes; + } } return ms->possible_cpus; } @@ -1581,6 +1596,7 @@ static void virt_machine_class_init(ObjectClass *oc, = void *data) /* We know we will never create a pre-ARMv7 CPU which needs 1K pages */ mc->minimum_page_bits =3D 12; mc->possible_cpu_arch_ids =3D virt_possible_cpu_arch_ids; + mc->cpu_index_to_instance_props =3D virt_cpu_index_to_props; } =20 static const TypeInfo virt_machine_info =3D { diff --git a/hw/i386/pc.c b/hw/i386/pc.c index f3b372a..9cec0c1 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -2243,12 +2243,14 @@ static void pc_machine_reset(void) } } =20 -static unsigned pc_cpu_index_to_socket_id(unsigned cpu_index) +static CpuInstanceProperties +pc_cpu_index_to_props(MachineState *ms, unsigned cpu_index) { - X86CPUTopoInfo topo; - x86_topo_ids_from_idx(smp_cores, smp_threads, cpu_index, - &topo); - return topo.pkg_id; + MachineClass *mc =3D MACHINE_GET_CLASS(ms); + const CPUArchIdList *possible_cpus =3D mc->possible_cpu_arch_ids(ms); + + assert(cpu_index < possible_cpus->len); + return possible_cpus->cpus[cpu_index].props;; } =20 static const CPUArchIdList *pc_possible_cpu_arch_ids(MachineState *ms) @@ -2280,6 +2282,15 @@ static const CPUArchIdList *pc_possible_cpu_arch_ids= (MachineState *ms) ms->possible_cpus->cpus[i].props.core_id =3D topo.core_id; ms->possible_cpus->cpus[i].props.has_thread_id =3D true; ms->possible_cpus->cpus[i].props.thread_id =3D topo.smt_id; + + /* default distribution of CPUs over NUMA nodes */ + if (nb_numa_nodes) { + /* preset values but do not enable them i.e. 'has_node_id =3D = false', + * numa init code will enable them later if manual mapping was= n't + * present on CLI */ + ms->possible_cpus->cpus[i].props.node_id =3D + topo.pkg_id % nb_numa_nodes; + } } return ms->possible_cpus; } @@ -2322,7 +2333,7 @@ static void pc_machine_class_init(ObjectClass *oc, vo= id *data) pcmc->acpi_data_size =3D 0x20000 + 0x8000; pcmc->save_tsc_khz =3D true; mc->get_hotplug_handler =3D pc_get_hotpug_handler; - mc->cpu_index_to_socket_id =3D pc_cpu_index_to_socket_id; + mc->cpu_index_to_instance_props =3D pc_cpu_index_to_props; mc->possible_cpu_arch_ids =3D pc_possible_cpu_arch_ids; mc->has_hotpluggable_cpus =3D true; mc->default_boot_order =3D "cad"; diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 80d12d0..33405a0 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -2981,11 +2981,17 @@ static HotplugHandler *spapr_get_hotplug_handler(Ma= chineState *machine, return NULL; } =20 -static unsigned spapr_cpu_index_to_socket_id(unsigned cpu_index) +static CpuInstanceProperties +spapr_cpu_index_to_props(MachineState *machine, unsigned cpu_index) { - /* Allocate to NUMA nodes on a "socket" basis (not that concept of - * socket means much for the paravirtualized PAPR platform) */ - return cpu_index / smp_threads / smp_cores; + CPUArchId *core_slot; + MachineClass *mc =3D MACHINE_GET_CLASS(machine); + + /* make sure possible_cpu are intialized */ + mc->possible_cpu_arch_ids(machine); + core_slot =3D spapr_find_cpu_slot(machine, cpu_index, NULL); + assert(core_slot); + return core_slot->props; } =20 static const CPUArchIdList *spapr_possible_cpu_arch_ids(MachineState *mach= ine) @@ -3012,8 +3018,15 @@ static const CPUArchIdList *spapr_possible_cpu_arch_= ids(MachineState *machine) machine->possible_cpus->cpus[i].arch_id =3D core_id; machine->possible_cpus->cpus[i].props.has_core_id =3D true; machine->possible_cpus->cpus[i].props.core_id =3D core_id; - /* TODO: add 'has_node/node' here to describe - to which node core belongs */ + + /* default distribution of CPUs over NUMA nodes */ + if (nb_numa_nodes) { + /* preset values but do not enable them i.e. 'has_node_id =3D = false', + * numa init code will enable them later if manual mapping was= n't + * present on CLI */ + machine->possible_cpus->cpus[i].props.node_id =3D + core_id / smp_threads / smp_cores % nb_numa_nodes; + } } return machine->possible_cpus; } @@ -3138,7 +3151,7 @@ static void spapr_machine_class_init(ObjectClass *oc,= void *data) hc->pre_plug =3D spapr_machine_device_pre_plug; hc->plug =3D spapr_machine_device_plug; hc->unplug =3D spapr_machine_device_unplug; - mc->cpu_index_to_socket_id =3D spapr_cpu_index_to_socket_id; + mc->cpu_index_to_instance_props =3D spapr_cpu_index_to_props; mc->possible_cpu_arch_ids =3D spapr_possible_cpu_arch_ids; hc->unplug_request =3D spapr_machine_device_unplug_request; =20 diff --git a/numa.c b/numa.c index 6fc2393..ab1661d 100644 --- a/numa.c +++ b/numa.c @@ -294,9 +294,10 @@ static void validate_numa_cpus(void) g_free(seen_cpus); } =20 -void parse_numa_opts(MachineClass *mc) +void parse_numa_opts(MachineState *ms) { int i; + MachineClass *mc =3D MACHINE_GET_CLASS(ms); =20 for (i =3D 0; i < MAX_NODES; i++) { numa_info[i].node_cpu =3D bitmap_new(max_cpus); @@ -378,14 +379,16 @@ void parse_numa_opts(MachineClass *mc) * rule grouping VCPUs by socket so that VCPUs from the same socket * would be on the same node. */ + if (!mc->cpu_index_to_instance_props) { + error_report("default CPUs to NUMA node mapping isn't supporte= d"); + exit(1); + } if (i =3D=3D nb_numa_nodes) { for (i =3D 0; i < max_cpus; i++) { - unsigned node_id =3D i % nb_numa_nodes; - if (mc->cpu_index_to_socket_id) { - node_id =3D mc->cpu_index_to_socket_id(i) % nb_numa_no= des; - } + CpuInstanceProperties props; + props =3D mc->cpu_index_to_instance_props(ms, i); =20 - set_bit(i, numa_info[node_id].node_cpu); + set_bit(i, numa_info[props.node_id].node_cpu); } } =20 diff --git a/vl.c b/vl.c index f46e070..c63f4d5 100644 --- a/vl.c +++ b/vl.c @@ -4506,7 +4506,7 @@ int main(int argc, char **argv, char **envp) default_drive(default_floppy, snapshot, IF_FLOPPY, 0, FD_OPTS); default_drive(default_sdcard, snapshot, IF_SD, 0, SD_OPTS); =20 - parse_numa_opts(machine_class); + parse_numa_opts(current_machine); =20 if (qemu_opts_foreach(qemu_find_opts("mon"), mon_init_func, NULL, NULL)) { --=20 2.7.4 From nobody Sun May 5 17:00:06 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 149381671303036.51854015131778; Wed, 3 May 2017 06:05:13 -0700 (PDT) Received: from localhost ([::1]:36615 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d5txt-0005vK-5i for importer@patchew.org; Wed, 03 May 2017 09:05:09 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39417) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d5tql-00088P-AE for qemu-devel@nongnu.org; Wed, 03 May 2017 08:57:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d5tqk-0000kb-9m for qemu-devel@nongnu.org; Wed, 03 May 2017 08:57:47 -0400 Received: from mx1.redhat.com ([209.132.183.28]:56652) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d5tqd-0000eR-Vm; Wed, 03 May 2017 08:57:40 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id CDB593D942; Wed, 3 May 2017 12:57:38 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id B64A9182E1; Wed, 3 May 2017 12:57:36 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com CDB593D942 Authentication-Results: ext-mx06.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx06.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com CDB593D942 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Wed, 3 May 2017 14:57:00 +0200 Message-Id: <1493816238-33120-7-git-send-email-imammedo@redhat.com> In-Reply-To: <1493816238-33120-1-git-send-email-imammedo@redhat.com> References: <1493816238-33120-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Wed, 03 May 2017 12:57:39 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 06/24] spapr: add node-id property to sPAPR core X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Andrew Jones , Eduardo Habkost , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Shannon Zhao , Paolo Bonzini , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" it will allow switching from cpu_index to core based numa mapping in follow up patches. Signed-off-by: Igor Mammedov Reviewed-by: David Gibson --- include/hw/ppc/spapr_cpu_core.h | 1 + include/qom/cpu.h | 2 ++ hw/ppc/spapr.c | 17 +++++++++++++++++ hw/ppc/spapr_cpu_core.c | 11 ++++++++--- 4 files changed, 28 insertions(+), 3 deletions(-) diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_cor= e.h index 3c35665..93051e9 100644 --- a/include/hw/ppc/spapr_cpu_core.h +++ b/include/hw/ppc/spapr_cpu_core.h @@ -27,6 +27,7 @@ typedef struct sPAPRCPUCore { =20 /*< public >*/ void *threads; + int node_id; } sPAPRCPUCore; =20 typedef struct sPAPRCPUCoreClass { diff --git a/include/qom/cpu.h b/include/qom/cpu.h index 5d10359..55214ce 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -258,6 +258,8 @@ typedef void (*run_on_cpu_func)(CPUState *cpu, run_on_c= pu_data data); =20 struct qemu_work_item; =20 +#define CPU_UNSET_NUMA_NODE_ID -1 + /** * CPUState: * @cpu_index: CPU index (informative). diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 33405a0..7f58ee4 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -2824,9 +2824,11 @@ static void spapr_core_pre_plug(HotplugHandler *hotp= lug_dev, DeviceState *dev, MachineClass *mc =3D MACHINE_GET_CLASS(hotplug_dev); Error *local_err =3D NULL; CPUCore *cc =3D CPU_CORE(dev); + sPAPRCPUCore *sc =3D SPAPR_CPU_CORE(dev); char *base_core_type =3D spapr_get_cpu_core_type(machine->cpu_model); const char *type =3D object_get_typename(OBJECT(dev)); CPUArchId *core_slot; + int node_id; int index; =20 if (dev->hotplugged && !mc->has_hotpluggable_cpus) { @@ -2861,6 +2863,21 @@ static void spapr_core_pre_plug(HotplugHandler *hotp= lug_dev, DeviceState *dev, goto out; } =20 + node_id =3D numa_get_node_for_cpu(cc->core_id); + if (node_id =3D=3D nb_numa_nodes) { + /* by default CPUState::numa_node was 0 if it's not set via CLI + * keep it this way for now but in future we probably should + * refuse to start up with incomplete numa mapping */ + node_id =3D 0; + } + if (sc->node_id =3D=3D CPU_UNSET_NUMA_NODE_ID) { + sc->node_id =3D node_id; + } else if (sc->node_id !=3D node_id) { + error_setg(&local_err, "node-id %d must match numa node specified" + "with -numa option for cpu-index %d", sc->node_id, cc->core_id= ); + goto out; + } + out: g_free(base_core_type); error_propagate(errp, local_err); diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 4389ef4..9de7a56 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -176,7 +176,6 @@ static void spapr_cpu_core_realize(DeviceState *dev, Er= ror **errp) const char *typename =3D object_class_get_name(scc->cpu_class); size_t size =3D object_type_get_instance_size(typename); Error *local_err =3D NULL; - int core_node_id =3D numa_get_node_for_cpu(cc->core_id);; void *obj; int i, j; =20 @@ -194,10 +193,10 @@ static void spapr_cpu_core_realize(DeviceState *dev, = Error **errp) =20 /* Set NUMA node for the added CPUs */ node_id =3D numa_get_node_for_cpu(cs->cpu_index); - if (node_id !=3D core_node_id) { + if (node_id !=3D sc->node_id) { error_setg(&local_err, "Invalid node-id=3D%d of thread[cpu-ind= ex: %d]" " on CPU[core-id: %d, node-id: %d], node-id must be the sa= me", - node_id, cs->cpu_index, cc->core_id, core_node_id); + node_id, cs->cpu_index, cc->core_id, sc->node_id); goto err; } if (node_id < nb_numa_nodes) { @@ -263,6 +262,11 @@ static const char *spapr_core_models[] =3D { "POWER9_v1.0", }; =20 +static Property spapr_cpu_core_properties[] =3D { + DEFINE_PROP_INT32("node-id", sPAPRCPUCore, node_id, CPU_UNSET_NUMA_NOD= E_ID), + DEFINE_PROP_END_OF_LIST() +}; + void spapr_cpu_core_class_init(ObjectClass *oc, void *data) { DeviceClass *dc =3D DEVICE_CLASS(oc); @@ -270,6 +274,7 @@ void spapr_cpu_core_class_init(ObjectClass *oc, void *d= ata) =20 dc->realize =3D spapr_cpu_core_realize; dc->unrealize =3D spapr_cpu_core_unrealizefn; + dc->props =3D spapr_cpu_core_properties; scc->cpu_class =3D cpu_class_by_name(TYPE_POWERPC_CPU, data); g_assert(scc->cpu_class); } --=20 2.7.4 From nobody Sun May 5 17:00:06 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1493816519618789.7245737956763; Wed, 3 May 2017 06:01:59 -0700 (PDT) Received: from localhost ([::1]:36598 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d5tum-00031Q-4H for importer@patchew.org; Wed, 03 May 2017 09:01:56 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39420) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d5tql-00088i-EB for qemu-devel@nongnu.org; Wed, 03 May 2017 08:57:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d5tqk-0000kq-J7 for qemu-devel@nongnu.org; Wed, 03 May 2017 08:57:47 -0400 Received: from mx1.redhat.com ([209.132.183.28]:39700) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d5tqg-0000hD-FC; Wed, 03 May 2017 08:57:42 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 4F80CC04B328; Wed, 3 May 2017 12:57:41 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 25E6517C5A; Wed, 3 May 2017 12:57:38 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 4F80CC04B328 Authentication-Results: ext-mx07.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx07.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 4F80CC04B328 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Wed, 3 May 2017 14:57:01 +0200 Message-Id: <1493816238-33120-8-git-send-email-imammedo@redhat.com> In-Reply-To: <1493816238-33120-1-git-send-email-imammedo@redhat.com> References: <1493816238-33120-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.31]); Wed, 03 May 2017 12:57:41 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 07/24] pc: add node-id property to CPU X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Andrew Jones , Eduardo Habkost , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Shannon Zhao , Paolo Bonzini , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" it will allow switching from cpu_index to property based numa mapping in follow up patches. Signed-off-by: Igor Mammedov --- hw/i386/pc.c | 17 +++++++++++++++++ target/i386/cpu.c | 1 + 2 files changed, 18 insertions(+) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 9cec0c1..4a4fb1c 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1893,6 +1893,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_d= ev, DeviceState *dev, Error **errp) { int idx; + int node_id; CPUState *cs; CPUArchId *cpu_slot; X86CPUTopoInfo topo; @@ -1982,6 +1983,22 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_= dev, =20 cs =3D CPU(cpu); cs->cpu_index =3D idx; + + node_id =3D numa_get_node_for_cpu(cs->cpu_index); + if (node_id =3D=3D nb_numa_nodes) { + /* by default CPUState::numa_node was 0 if it's not set via CLI + * keep it this way for now but in future we probably should + * refuse to start up with incomplete numa mapping */ + node_id =3D 0; + } + if (cs->numa_node =3D=3D CPU_UNSET_NUMA_NODE_ID) { + cs->numa_node =3D node_id; + } else if (cs->numa_node !=3D node_id) { + error_setg(errp, "node-id %d must match numa node specified" + "with -numa option for cpu-index %d", + cs->numa_node, cs->cpu_index); + return; + } } =20 static void pc_machine_device_pre_plug_cb(HotplugHandler *hotplug_dev, diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 13c0985..007a5bd 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -3982,6 +3982,7 @@ static Property x86_cpu_properties[] =3D { DEFINE_PROP_INT32("core-id", X86CPU, core_id, -1), DEFINE_PROP_INT32("socket-id", X86CPU, socket_id, -1), #endif + DEFINE_PROP_INT32("node-id", CPUState, numa_node, CPU_UNSET_NUMA_NODE_= ID), DEFINE_PROP_BOOL("pmu", X86CPU, enable_pmu, false), { .name =3D "hv-spinlocks", .info =3D &qdev_prop_spinlocks }, DEFINE_PROP_BOOL("hv-relaxed", X86CPU, hyperv_relaxed_timing, false), --=20 2.7.4 From nobody Sun May 5 17:00:06 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1493816875617692.9731925989518; Wed, 3 May 2017 06:07:55 -0700 (PDT) Received: from localhost ([::1]:36641 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d5u0W-0008Gi-MS for importer@patchew.org; Wed, 03 May 2017 09:07:52 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39453) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d5tqm-00089z-Ci for qemu-devel@nongnu.org; Wed, 03 May 2017 08:57:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d5tql-0000lJ-Fd for qemu-devel@nongnu.org; Wed, 03 May 2017 08:57:48 -0400 Received: from mx1.redhat.com ([209.132.183.28]:52958) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d5tqi-0000il-WC; Wed, 03 May 2017 08:57:45 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id BCC6661BAE; Wed, 3 May 2017 12:57:43 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 9D0D917C5A; Wed, 3 May 2017 12:57:41 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com BCC6661BAE Authentication-Results: ext-mx10.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx10.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com BCC6661BAE From: Igor Mammedov To: qemu-devel@nongnu.org Date: Wed, 3 May 2017 14:57:02 +0200 Message-Id: <1493816238-33120-9-git-send-email-imammedo@redhat.com> In-Reply-To: <1493816238-33120-1-git-send-email-imammedo@redhat.com> References: <1493816238-33120-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Wed, 03 May 2017 12:57:44 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 08/24] virt-arm: add node-id property to CPU X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Andrew Jones , Eduardo Habkost , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Shannon Zhao , Paolo Bonzini , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" it will allow switching from cpu_index to property based numa mapping in follow up patches. Signed-off-by: Igor Mammedov Reviewed-by: Andrew Jones =20 --- hw/arm/virt.c | 15 +++++++++++++++ target/arm/cpu.c | 1 + 2 files changed, 16 insertions(+) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 3e19b5f..05a2822 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1350,6 +1350,7 @@ static void machvirt_init(MachineState *machine) for (n =3D 0; n < possible_cpus->len; n++) { Object *cpuobj; CPUState *cs; + int node_id; =20 if (n >=3D smp_cpus) { break; @@ -1362,6 +1363,20 @@ static void machvirt_init(MachineState *machine) cs =3D CPU(cpuobj); cs->cpu_index =3D n; =20 + node_id =3D numa_get_node_for_cpu(cs->cpu_index); + if (node_id =3D=3D nb_numa_nodes) { + /* by default CPUState::numa_node was 0 if it's not set via CLI + * keep it this way for now but in future we probably should + * refuse to start up with incomplete numa mapping */ + node_id =3D 0; + } + if (cs->numa_node =3D=3D CPU_UNSET_NUMA_NODE_ID) { + cs->numa_node =3D node_id; + } else { + /* CPU isn't device_add compatible yet, this shouldn't happen = */ + error_setg(&error_abort, "user set node-id not implemented"); + } + if (!vms->secure) { object_property_set_bool(cpuobj, false, "has_el3", NULL); } diff --git a/target/arm/cpu.c b/target/arm/cpu.c index ee1406d..c185eb1 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1573,6 +1573,7 @@ static Property arm_cpu_properties[] =3D { DEFINE_PROP_UINT32("midr", ARMCPU, midr, 0), DEFINE_PROP_UINT64("mp-affinity", ARMCPU, mp_affinity, ARM64_AFFINITY_INVALID), + DEFINE_PROP_INT32("node-id", CPUState, numa_node, CPU_UNSET_NUMA_NODE_= ID), DEFINE_PROP_END_OF_LIST() }; =20 --=20 2.7.4 From nobody Sun May 5 17:00:06 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1493816643282128.78110863294694; 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Wed, 3 May 2017 12:57:47 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 0D8DE182D8; Wed, 3 May 2017 12:57:43 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 92976C054C52 Authentication-Results: ext-mx08.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx08.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 92976C054C52 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Wed, 3 May 2017 14:57:03 +0200 Message-Id: <1493816238-33120-10-git-send-email-imammedo@redhat.com> In-Reply-To: <1493816238-33120-1-git-send-email-imammedo@redhat.com> References: <1493816238-33120-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Wed, 03 May 2017 12:57:47 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 09/24] numa: add check that board supports cpu_index to node mapping X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Andrew Jones , Eduardo Habkost , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Shannon Zhao , Paolo Bonzini , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Default node mapping initialization already checks that board supports cpu_index to node mapping and refuses to start if it's not supported. Do the same for explicitly provided mapping "-numa node,cpus=3D..." Signed-off-by: Igor Mammedov Reviewed-by: Andrew Jones Reviewed-by: David Gibson --- numa.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/numa.c b/numa.c index ab1661d..b517870 100644 --- a/numa.c +++ b/numa.c @@ -140,10 +140,12 @@ uint32_t numa_get_node(ram_addr_t addr, Error **errp) return -1; } =20 -static void numa_node_parse(NumaNodeOptions *node, QemuOpts *opts, Error *= *errp) +static void numa_node_parse(MachineState *ms, NumaNodeOptions *node, + QemuOpts *opts, Error **errp) { uint16_t nodenr; uint16List *cpus =3D NULL; + MachineClass *mc =3D MACHINE_GET_CLASS(ms); =20 if (node->has_nodeid) { nodenr =3D node->nodeid; @@ -162,6 +164,10 @@ static void numa_node_parse(NumaNodeOptions *node, Qem= uOpts *opts, Error **errp) return; } =20 + if (!mc->cpu_index_to_instance_props) { + error_report("CPUs to NUMA node mapping isn't supported"); + exit(1); + } for (cpus =3D node->cpus; cpus; cpus =3D cpus->next) { if (cpus->value >=3D max_cpus) { error_setg(errp, @@ -215,6 +221,7 @@ static void numa_node_parse(NumaNodeOptions *node, Qemu= Opts *opts, Error **errp) static int parse_numa(void *opaque, QemuOpts *opts, Error **errp) { NumaOptions *object =3D NULL; + MachineState *ms =3D opaque; Error *err =3D NULL; =20 { @@ -229,7 +236,7 @@ static int parse_numa(void *opaque, QemuOpts *opts, Err= or **errp) =20 switch (object->type) { case NUMA_OPTIONS_TYPE_NODE: - numa_node_parse(&object->u.node, opts, &err); + numa_node_parse(ms, &object->u.node, opts, &err); if (err) { goto end; } @@ -303,7 +310,7 @@ void parse_numa_opts(MachineState *ms) numa_info[i].node_cpu =3D bitmap_new(max_cpus); } =20 - if (qemu_opts_foreach(qemu_find_opts("numa"), parse_numa, NULL, NULL))= { + if (qemu_opts_foreach(qemu_find_opts("numa"), parse_numa, ms, NULL)) { exit(1); } =20 --=20 2.7.4 From nobody Sun May 5 17:00:06 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1493817207017470.53157915158124; Wed, 3 May 2017 06:13:27 -0700 (PDT) Received: from localhost ([::1]:36676 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d5u5s-0004rb-6x for importer@patchew.org; Wed, 03 May 2017 09:13:24 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39610) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d5tr0-0008Lq-Eo for qemu-devel@nongnu.org; Wed, 03 May 2017 08:58:04 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d5tqu-0000vQ-1S for qemu-devel@nongnu.org; Wed, 03 May 2017 08:57:57 -0400 Received: from mx1.redhat.com ([209.132.183.28]:41028) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d5tqp-0000oy-Gz; Wed, 03 May 2017 08:57:51 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 4B8D56409A; Wed, 3 May 2017 12:57:50 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id DEACB182C6; Wed, 3 May 2017 12:57:47 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 4B8D56409A Authentication-Results: ext-mx09.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx09.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 4B8D56409A From: Igor Mammedov To: qemu-devel@nongnu.org Date: Wed, 3 May 2017 14:57:04 +0200 Message-Id: <1493816238-33120-11-git-send-email-imammedo@redhat.com> In-Reply-To: <1493816238-33120-1-git-send-email-imammedo@redhat.com> References: <1493816238-33120-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Wed, 03 May 2017 12:57:50 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 10/24] numa: mirror cpu to node mapping in MachineState::possible_cpus X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Andrew Jones , Eduardo Habkost , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Shannon Zhao , Paolo Bonzini , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Introduce machine_set_cpu_numa_node() helper that stores node mapping for CPU in MachineState::possible_cpus. CPU and node it belongs to is specified by 'props' argument. Patch doesn't remove old way of storing mapping in numa_info[X].node_cpu as removing it at the same time makes patch rather big. Instead it just mirrors mapping in possible_cpus and follow up per target patches will switch to possible_cpus and numa_info[X].node_cpu will be removed once there isn't any users left. Signed-off-by: Igor Mammedov Reviewed-by: David Gibson Reviewed-by: Andrew Jones =20 --- include/hw/boards.h | 2 ++ hw/core/machine.c | 68 +++++++++++++++++++++++++++++++++++++++++++++++++= ++++ numa.c | 8 +++++++ 3 files changed, 78 insertions(+) diff --git a/include/hw/boards.h b/include/hw/boards.h index 5d6af21..1f518a1 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -42,6 +42,8 @@ bool machine_dump_guest_core(MachineState *machine); bool machine_mem_merge(MachineState *machine); void machine_register_compat_props(MachineState *machine); HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine= ); +void machine_set_cpu_numa_node(MachineState *machine, + CpuInstanceProperties *props, Error **errp); =20 /** * CPUArchId: diff --git a/hw/core/machine.c b/hw/core/machine.c index ada9eea..a63f17b 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -388,6 +388,74 @@ HotpluggableCPUList *machine_query_hotpluggable_cpus(M= achineState *machine) return head; } =20 +void machine_set_cpu_numa_node(MachineState *machine, + CpuInstanceProperties *props, Error **errp) +{ + MachineClass *mc =3D MACHINE_GET_CLASS(machine); + bool match =3D false; + int i; + + if (!mc->possible_cpu_arch_ids) { + error_setg(errp, "mapping of CPUs to NUMA node is not supported"); + return; + } + + /* force board to initialize possible_cpus if it hasn't been done yet = */ + mc->possible_cpu_arch_ids(machine); + + for (i =3D 0; i < machine->possible_cpus->len; i++) { + CPUArchId *slot =3D &machine->possible_cpus->cpus[i]; + + /* reject unsupported by board properties */ + if (props->has_thread_id && !slot->props.has_thread_id) { + error_setg(errp, "thread-id is not supported"); + return; + } + + if (props->has_core_id && !slot->props.has_core_id) { + error_setg(errp, "core-id is not supported"); + return; + } + + if (props->has_socket_id && !slot->props.has_socket_id) { + error_setg(errp, "socket-id is not supported"); + return; + } + + /* skip slots with explicit mismatch */ + if (props->has_thread_id && props->thread_id !=3D slot->props.thre= ad_id) { + continue; + } + + if (props->has_core_id && props->core_id !=3D slot->props.core_id)= { + continue; + } + + if (props->has_socket_id && props->socket_id !=3D slot->props.sock= et_id) { + continue; + } + + /* reject assignment if slot is already assigned, for compatibility + * of legacy cpu_index mapping with SPAPR core based mapping do not + * error out if cpu thread and matched core have the same node-id = */ + if (slot->props.has_node_id && + slot->props.node_id !=3D props->node_id) { + error_setg(errp, "CPU is already assigned to node-id: %" PRId6= 4, + slot->props.node_id); + return; + } + + /* assign slot to node as it's matched '-numa cpu' key */ + match =3D true; + slot->props.node_id =3D props->node_id; + slot->props.has_node_id =3D props->has_node_id; + } + + if (!match) { + error_setg(errp, "no match found"); + } +} + static void machine_class_init(ObjectClass *oc, void *data) { MachineClass *mc =3D MACHINE_CLASS(oc); diff --git a/numa.c b/numa.c index b517870..5ff1212 100644 --- a/numa.c +++ b/numa.c @@ -169,6 +169,7 @@ static void numa_node_parse(MachineState *ms, NumaNodeO= ptions *node, exit(1); } for (cpus =3D node->cpus; cpus; cpus =3D cpus->next) { + CpuInstanceProperties props; if (cpus->value >=3D max_cpus) { error_setg(errp, "CPU index (%" PRIu16 ")" @@ -177,6 +178,10 @@ static void numa_node_parse(MachineState *ms, NumaNode= Options *node, return; } bitmap_set(numa_info[nodenr].node_cpu, cpus->value, 1); + props =3D mc->cpu_index_to_instance_props(ms, cpus->value); + props.node_id =3D nodenr; + props.has_node_id =3D true; + machine_set_cpu_numa_node(ms, &props, &error_fatal); } =20 if (node->has_mem && node->has_memdev) { @@ -393,9 +398,12 @@ void parse_numa_opts(MachineState *ms) if (i =3D=3D nb_numa_nodes) { for (i =3D 0; i < max_cpus; i++) { CpuInstanceProperties props; + /* fetch default mapping from board and enable it */ props =3D mc->cpu_index_to_instance_props(ms, i); + props.has_node_id =3D true; =20 set_bit(i, numa_info[props.node_id].node_cpu); + machine_set_cpu_numa_node(ms, &props, &error_fatal); } } =20 --=20 2.7.4 From nobody Sun May 5 17:00:06 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; 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Wed, 03 May 2017 08:58:02 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 7BB5A8124A; Wed, 3 May 2017 12:57:54 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 98135182C9; Wed, 3 May 2017 12:57:50 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 7BB5A8124A Authentication-Results: ext-mx01.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx01.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 7BB5A8124A From: Igor Mammedov To: qemu-devel@nongnu.org Date: Wed, 3 May 2017 14:57:05 +0200 Message-Id: <1493816238-33120-12-git-send-email-imammedo@redhat.com> In-Reply-To: <1493816238-33120-1-git-send-email-imammedo@redhat.com> References: <1493816238-33120-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Wed, 03 May 2017 12:57:54 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 11/24] numa: do default mapping based on possible_cpus instead of node_cpu bitmaps X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Andrew Jones , Eduardo Habkost , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Shannon Zhao , Paolo Bonzini , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Igor Mammedov Reviewed-by: David Gibson Reviewed-by: Andrew Jones =20 --- numa.c | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/numa.c b/numa.c index 5ff1212..c7e3e0a 100644 --- a/numa.c +++ b/numa.c @@ -309,6 +309,7 @@ static void validate_numa_cpus(void) void parse_numa_opts(MachineState *ms) { int i; + const CPUArchIdList *possible_cpus; MachineClass *mc =3D MACHINE_GET_CLASS(ms); =20 for (i =3D 0; i < MAX_NODES; i++) { @@ -379,11 +380,6 @@ void parse_numa_opts(MachineState *ms) =20 numa_set_mem_ranges(); =20 - for (i =3D 0; i < nb_numa_nodes; i++) { - if (!bitmap_empty(numa_info[i].node_cpu, max_cpus)) { - break; - } - } /* Historically VCPUs were assigned in round-robin order to NUMA * nodes. However it causes issues with guest not handling it nice * in case where cores/threads from a multicore CPU appear on @@ -391,11 +387,20 @@ void parse_numa_opts(MachineState *ms) * rule grouping VCPUs by socket so that VCPUs from the same socket * would be on the same node. */ - if (!mc->cpu_index_to_instance_props) { + if (!mc->cpu_index_to_instance_props || !mc->possible_cpu_arch_ids= ) { error_report("default CPUs to NUMA node mapping isn't supporte= d"); exit(1); } - if (i =3D=3D nb_numa_nodes) { + + possible_cpus =3D mc->possible_cpu_arch_ids(ms); + for (i =3D 0; i < possible_cpus->len; i++) { + if (possible_cpus->cpus[i].props.has_node_id) { + break; + } + } + + /* no CPUs are assigned to NUMA nodes */ + if (i =3D=3D possible_cpus->len) { for (i =3D 0; i < max_cpus; i++) { CpuInstanceProperties props; /* fetch default mapping from board and enable it */ --=20 2.7.4 From nobody Sun May 5 17:00:06 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; 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Wed, 03 May 2017 08:58:04 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 020DDC04B92C; Wed, 3 May 2017 12:57:57 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id C8459182C6; Wed, 3 May 2017 12:57:54 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 020DDC04B92C Authentication-Results: ext-mx07.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx07.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 020DDC04B92C From: Igor Mammedov To: qemu-devel@nongnu.org Date: Wed, 3 May 2017 14:57:06 +0200 Message-Id: <1493816238-33120-13-git-send-email-imammedo@redhat.com> In-Reply-To: <1493816238-33120-1-git-send-email-imammedo@redhat.com> References: <1493816238-33120-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.31]); Wed, 03 May 2017 12:57:57 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 12/24] numa: add numa_[has_]node_id() wrappers X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Andrew Jones , Eduardo Habkost , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Shannon Zhao , Paolo Bonzini , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" wrappers should make access to [has]node_id fields more readable Signed-off-by: Igor Mammedov Reviewed-by: Andrew Jones Reviewed-by: David Gibson --- follow up patches will use this wrappers v2: - add wrappers (Drew) --- include/sysemu/numa.h | 10 ++++++++++ numa.c | 2 +- 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/include/sysemu/numa.h b/include/sysemu/numa.h index 46ea6c7..98d01e6 100644 --- a/include/sysemu/numa.h +++ b/include/sysemu/numa.h @@ -35,4 +35,14 @@ uint32_t numa_get_node(ram_addr_t addr, Error **errp); /* on success returns node index in numa_info, * on failure returns nb_numa_nodes */ int numa_get_node_for_cpu(int idx); + +static inline bool numa_has_node_id(const CPUArchIdList *possible_cpus, in= t idx) +{ + return possible_cpus->cpus[idx].props.has_node_id; +} + +static inline int numa_node_id(const CPUArchIdList *possible_cpus, int idx) +{ + return possible_cpus->cpus[idx].props.node_id; +} #endif diff --git a/numa.c b/numa.c index c7e3e0a..872ee0d 100644 --- a/numa.c +++ b/numa.c @@ -394,7 +394,7 @@ void parse_numa_opts(MachineState *ms) =20 possible_cpus =3D mc->possible_cpu_arch_ids(ms); for (i =3D 0; i < possible_cpus->len; i++) { - if (possible_cpus->cpus[i].props.has_node_id) { + if (numa_has_node_id(possible_cpus, i)) { break; } } --=20 2.7.4 From nobody Sun May 5 17:00:06 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Wed, 03 May 2017 08:58:05 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 2281D80C08; Wed, 3 May 2017 12:58:00 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 4EB2B17C5A; Wed, 3 May 2017 12:57:57 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 2281D80C08 Authentication-Results: ext-mx02.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx02.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 2281D80C08 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Wed, 3 May 2017 14:57:07 +0200 Message-Id: <1493816238-33120-14-git-send-email-imammedo@redhat.com> In-Reply-To: <1493816238-33120-1-git-send-email-imammedo@redhat.com> References: <1493816238-33120-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Wed, 03 May 2017 12:58:00 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 13/24] pc: get numa node mapping from possible_cpus instead of numa_get_node_for_cpu() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Andrew Jones , Eduardo Habkost , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Shannon Zhao , Paolo Bonzini , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Igor Mammedov Reviewed-by: Andrew Jones =20 --- v2: use numa_[has_]node_id() wrappers (Drew) --- hw/acpi/cpu.c | 7 +++---- hw/i386/acpi-build.c | 11 ++++------- hw/i386/pc.c | 18 ++++++++++-------- 3 files changed, 17 insertions(+), 19 deletions(-) diff --git a/hw/acpi/cpu.c b/hw/acpi/cpu.c index 8c719d3..2002198 100644 --- a/hw/acpi/cpu.c +++ b/hw/acpi/cpu.c @@ -503,7 +503,6 @@ void build_cpus_aml(Aml *table, MachineState *machine, = CPUHotplugFeatures opts, =20 /* build Processor object for each processor */ for (i =3D 0; i < arch_ids->len; i++) { - int j; Aml *dev; Aml *uid =3D aml_int(i); GArray *madt_buf =3D g_array_new(0, 1, 1); @@ -557,9 +556,9 @@ void build_cpus_aml(Aml *table, MachineState *machine, = CPUHotplugFeatures opts, * as a result _PXM is required for all CPUs which might * be hot-plugged. For simplicity, add it for all CPUs. */ - j =3D numa_get_node_for_cpu(i); - if (j < nb_numa_nodes) { - aml_append(dev, aml_name_decl("_PXM", aml_int(j))); + if (numa_has_node_id(arch_ids, i)) { + aml_append(dev, + aml_name_decl("_PXM", aml_int(numa_node_id(arch_ids, i= )))); } =20 aml_append(cpus_dev, dev); diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 2073108..a66a968 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -2306,7 +2306,8 @@ build_srat(GArray *table_data, BIOSLinker *linker, Ma= chineState *machine) srat->reserved1 =3D cpu_to_le32(1); =20 for (i =3D 0; i < apic_ids->len; i++) { - int j =3D numa_get_node_for_cpu(i); + int node_id =3D numa_has_node_id(apic_ids, i) ? + numa_node_id(apic_ids, i) : 0; uint32_t apic_id =3D apic_ids->cpus[i].arch_id; =20 if (apic_id < 255) { @@ -2316,9 +2317,7 @@ build_srat(GArray *table_data, BIOSLinker *linker, Ma= chineState *machine) core->type =3D ACPI_SRAT_PROCESSOR_APIC; core->length =3D sizeof(*core); core->local_apic_id =3D apic_id; - if (j < nb_numa_nodes) { - core->proximity_lo =3D j; - } + core->proximity_lo =3D node_id; memset(core->proximity_hi, 0, 3); core->local_sapic_eid =3D 0; core->flags =3D cpu_to_le32(1); @@ -2329,9 +2328,7 @@ build_srat(GArray *table_data, BIOSLinker *linker, Ma= chineState *machine) core->type =3D ACPI_SRAT_PROCESSOR_x2APIC; core->length =3D sizeof(*core); core->x2apic_id =3D cpu_to_le32(apic_id); - if (j < nb_numa_nodes) { - core->proximity_domain =3D cpu_to_le32(j); - } + core->proximity_domain =3D cpu_to_le32(node_id); core->flags =3D cpu_to_le32(1); } } diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 4a4fb1c..aeecf4b 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -747,7 +747,9 @@ static FWCfgState *bochs_bios_init(AddressSpace *as, PC= MachineState *pcms) { FWCfgState *fw_cfg; uint64_t *numa_fw_cfg; - int i, j; + int i; + const CPUArchIdList *cpus; + MachineClass *mc =3D MACHINE_GET_CLASS(pcms); =20 fw_cfg =3D fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4, as); fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus); @@ -782,12 +784,12 @@ static FWCfgState *bochs_bios_init(AddressSpace *as, = PCMachineState *pcms) */ numa_fw_cfg =3D g_new0(uint64_t, 1 + pcms->apic_id_limit + nb_numa_nod= es); numa_fw_cfg[0] =3D cpu_to_le64(nb_numa_nodes); - for (i =3D 0; i < max_cpus; i++) { - unsigned int apic_id =3D x86_cpu_apic_id_from_index(i); + cpus =3D mc->possible_cpu_arch_ids(MACHINE(pcms)); + for (i =3D 0; i < cpus->len; i++) { + unsigned int apic_id =3D cpus->cpus[i].arch_id; assert(apic_id < pcms->apic_id_limit); - j =3D numa_get_node_for_cpu(i); - if (j < nb_numa_nodes) { - numa_fw_cfg[apic_id + 1] =3D cpu_to_le64(j); + if (numa_has_node_id(cpus, i)) { + numa_fw_cfg[apic_id + 1] =3D cpu_to_le64(numa_node_id(cpus, i)= ); } } for (i =3D 0; i < nb_numa_nodes; i++) { @@ -1984,8 +1986,8 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_d= ev, cs =3D CPU(cpu); cs->cpu_index =3D idx; =20 - node_id =3D numa_get_node_for_cpu(cs->cpu_index); - if (node_id =3D=3D nb_numa_nodes) { + node_id =3D cpu_slot->props.node_id; + if (!cpu_slot->props.has_node_id) { /* by default CPUState::numa_node was 0 if it's not set via CLI * keep it this way for now but in future we probably should * refuse to start up with incomplete numa mapping */ --=20 2.7.4 From nobody Sun May 5 17:00:06 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1493816756294261.07530424887034; Wed, 3 May 2017 06:05:56 -0700 (PDT) Received: from localhost ([::1]:36623 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d5tyX-0006V7-UQ for importer@patchew.org; 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Wed, 3 May 2017 12:58:00 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 8C96620264 Authentication-Results: ext-mx05.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx05.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 8C96620264 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Wed, 3 May 2017 14:57:08 +0200 Message-Id: <1493816238-33120-15-git-send-email-imammedo@redhat.com> In-Reply-To: <1493816238-33120-1-git-send-email-imammedo@redhat.com> References: <1493816238-33120-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.29]); Wed, 03 May 2017 12:58:02 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 14/24] spapr: get numa node mapping from possible_cpus instead of numa_get_node_for_cpu() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Andrew Jones , Eduardo Habkost , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Shannon Zhao , Paolo Bonzini , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" it's safe to remove thread node_id !=3D core node_id error branch as machine_set_cpu_numa_node() also does mismatch check and is called even before any CPU is created. Signed-off-by: Igor Mammedov Acked-by: David Gibson --- hw/ppc/spapr.c | 4 ++-- hw/ppc/spapr_cpu_core.c | 14 ++------------ 2 files changed, 4 insertions(+), 14 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 7f58ee4..bcb91e7 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -2863,8 +2863,8 @@ static void spapr_core_pre_plug(HotplugHandler *hotpl= ug_dev, DeviceState *dev, goto out; } =20 - node_id =3D numa_get_node_for_cpu(cc->core_id); - if (node_id =3D=3D nb_numa_nodes) { + node_id =3D core_slot->props.node_id; + if (!core_slot->props.has_node_id) { /* by default CPUState::numa_node was 0 if it's not set via CLI * keep it this way for now but in future we probably should * refuse to start up with incomplete numa mapping */ diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 9de7a56..a17ea07 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -181,7 +181,6 @@ static void spapr_cpu_core_realize(DeviceState *dev, Er= ror **errp) =20 sc->threads =3D g_malloc0(size * cc->nr_threads); for (i =3D 0; i < cc->nr_threads; i++) { - int node_id; char id[32]; CPUState *cs; =20 @@ -191,17 +190,8 @@ static void spapr_cpu_core_realize(DeviceState *dev, E= rror **errp) cs =3D CPU(obj); cs->cpu_index =3D cc->core_id + i; =20 - /* Set NUMA node for the added CPUs */ - node_id =3D numa_get_node_for_cpu(cs->cpu_index); - if (node_id !=3D sc->node_id) { - error_setg(&local_err, "Invalid node-id=3D%d of thread[cpu-ind= ex: %d]" - " on CPU[core-id: %d, node-id: %d], node-id must be the sa= me", - node_id, cs->cpu_index, cc->core_id, sc->node_id); - goto err; - } - if (node_id < nb_numa_nodes) { - cs->numa_node =3D node_id; - } + /* Set NUMA node for the threads belonged to core */ + cs->numa_node =3D sc->node_id; =20 snprintf(id, sizeof(id), "thread[%d]", i); object_property_add_child(OBJECT(sc), id, obj, &local_err); --=20 2.7.4 From nobody Sun May 5 17:00:06 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1493817687314970.1941920592791; Wed, 3 May 2017 06:21:27 -0700 (PDT) Received: from localhost ([::1]:36779 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d5uDd-00039E-9x for importer@patchew.org; Wed, 03 May 2017 09:21:25 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39812) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d5trB-00007E-3j for qemu-devel@nongnu.org; Wed, 03 May 2017 08:58:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d5tr8-00014c-5y for qemu-devel@nongnu.org; Wed, 03 May 2017 08:58:13 -0400 Received: from mx1.redhat.com ([209.132.183.28]:43582) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d5tr5-00011o-Mh; Wed, 03 May 2017 08:58:07 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 86F6380F95; Wed, 3 May 2017 12:58:06 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id D720017C5A; Wed, 3 May 2017 12:58:02 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 86F6380F95 Authentication-Results: ext-mx03.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx03.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 86F6380F95 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Wed, 3 May 2017 14:57:09 +0200 Message-Id: <1493816238-33120-16-git-send-email-imammedo@redhat.com> In-Reply-To: <1493816238-33120-1-git-send-email-imammedo@redhat.com> References: <1493816238-33120-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Wed, 03 May 2017 12:58:06 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 15/24] virt-arm: get numa node mapping from possible_cpus instead of numa_get_node_for_cpu() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Andrew Jones , Eduardo Habkost , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Shannon Zhao , Paolo Bonzini , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Igor Mammedov Reviewed-by: Andrew Jones =20 --- v2: use numa_[has_]node_id() wrappers (Drew) --- hw/arm/virt-acpi-build.c | 19 +++++++------------ hw/arm/virt.c | 13 +++++++------ 2 files changed, 14 insertions(+), 18 deletions(-) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 0835e59..2404bb1 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -486,30 +486,25 @@ build_srat(GArray *table_data, BIOSLinker *linker, Vi= rtMachineState *vms) AcpiSystemResourceAffinityTable *srat; AcpiSratProcessorGiccAffinity *core; AcpiSratMemoryAffinity *numamem; - int i, j, srat_start; + int i, srat_start; uint64_t mem_base; - uint32_t *cpu_node =3D g_malloc0(vms->smp_cpus * sizeof(uint32_t)); - - for (i =3D 0; i < vms->smp_cpus; i++) { - j =3D numa_get_node_for_cpu(i); - if (j < nb_numa_nodes) { - cpu_node[i] =3D j; - } - } + MachineClass *mc =3D MACHINE_GET_CLASS(vms); + const CPUArchIdList *cpu_list =3D mc->possible_cpu_arch_ids(MACHINE(vm= s)); =20 srat_start =3D table_data->len; srat =3D acpi_data_push(table_data, sizeof(*srat)); srat->reserved1 =3D cpu_to_le32(1); =20 - for (i =3D 0; i < vms->smp_cpus; ++i) { + for (i =3D 0; i < cpu_list->len; ++i) { + int node_id =3D numa_has_node_id(cpu_list, i) ? + numa_node_id(cpu_list, i) : 0; core =3D acpi_data_push(table_data, sizeof(*core)); core->type =3D ACPI_SRAT_PROCESSOR_GICC; core->length =3D sizeof(*core); - core->proximity =3D cpu_to_le32(cpu_node[i]); + core->proximity =3D cpu_to_le32(node_id); core->acpi_processor_uid =3D cpu_to_le32(i); core->flags =3D cpu_to_le32(1); } - g_free(cpu_node); =20 mem_base =3D vms->memmap[VIRT_MEM].base; for (i =3D 0; i < nb_numa_nodes; ++i) { diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 05a2822..233e8a7 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -338,7 +338,7 @@ static void fdt_add_cpu_nodes(const VirtMachineState *v= ms) { int cpu; int addr_cells =3D 1; - unsigned int i; + const MachineState *ms =3D MACHINE(vms); =20 /* * From Documentation/devicetree/bindings/arm/cpus.txt @@ -369,6 +369,7 @@ static void fdt_add_cpu_nodes(const VirtMachineState *v= ms) for (cpu =3D vms->smp_cpus - 1; cpu >=3D 0; cpu--) { char *nodename =3D g_strdup_printf("/cpus/cpu@%d", cpu); ARMCPU *armcpu =3D ARM_CPU(qemu_get_cpu(cpu)); + CPUState *cs =3D CPU(armcpu); =20 qemu_fdt_add_subnode(vms->fdt, nodename); qemu_fdt_setprop_string(vms->fdt, nodename, "device_type", "cpu"); @@ -389,9 +390,9 @@ static void fdt_add_cpu_nodes(const VirtMachineState *v= ms) armcpu->mp_affinity); } =20 - i =3D numa_get_node_for_cpu(cpu); - if (i < nb_numa_nodes) { - qemu_fdt_setprop_cell(vms->fdt, nodename, "numa-node-id", i); + if (numa_has_node_id(ms->possible_cpus, cs->cpu_index)) { + qemu_fdt_setprop_cell(vms->fdt, nodename, "numa-node-id", + numa_node_id(ms->possible_cpus, cs->cpu_index)); } =20 g_free(nodename); @@ -1363,8 +1364,8 @@ static void machvirt_init(MachineState *machine) cs =3D CPU(cpuobj); cs->cpu_index =3D n; =20 - node_id =3D numa_get_node_for_cpu(cs->cpu_index); - if (node_id =3D=3D nb_numa_nodes) { + node_id =3D numa_node_id(possible_cpus, cs->cpu_index); + if (!numa_has_node_id(possible_cpus, cs->cpu_index)) { /* by default CPUState::numa_node was 0 if it's not set via CLI * keep it this way for now but in future we probably should * refuse to start up with incomplete numa mapping */ --=20 2.7.4 From nobody Sun May 5 17:00:06 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1493817832863537.8838375416543; Wed, 3 May 2017 06:23:52 -0700 (PDT) Received: from localhost ([::1]:36801 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d5uFy-0004lQ-JA for importer@patchew.org; Wed, 03 May 2017 09:23:50 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39878) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d5trD-0000As-Dl for qemu-devel@nongnu.org; Wed, 03 May 2017 08:58:16 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d5trC-00017L-FQ for qemu-devel@nongnu.org; Wed, 03 May 2017 08:58:15 -0400 Received: from mx1.redhat.com ([209.132.183.28]:50046) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d5tr8-000143-93; Wed, 03 May 2017 08:58:10 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 1C106C054C52; Wed, 3 May 2017 12:58:09 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id D41F617C5A; Wed, 3 May 2017 12:58:06 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 1C106C054C52 Authentication-Results: ext-mx08.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx08.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 1C106C054C52 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Wed, 3 May 2017 14:57:10 +0200 Message-Id: <1493816238-33120-17-git-send-email-imammedo@redhat.com> In-Reply-To: <1493816238-33120-1-git-send-email-imammedo@redhat.com> References: <1493816238-33120-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Wed, 03 May 2017 12:58:09 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 16/24] QMP: include CpuInstanceProperties into query_cpus output output X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Andrew Jones , Eduardo Habkost , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Shannon Zhao , Paolo Bonzini , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" if board supports CpuInstanceProperties, report them for each CPU thread listed. Main motivation for this is to provide these properties introspection via QMP interface for using in test cases to verify numa node to cpu mapping, which includes not only boards that support cpu hotplug and have this info in query-hotpluggable-cpus (pc/spapr) but also for boards that don't not support hotpluggable-cpus but support numa mapping (virt-arm). Signed-off-by: Igor Mammedov Reviewed-by: Eric Blake --- v2: * fix checkpatch error and remove extra space after =3D (Eric) --- cpus.c | 10 ++++++++++ qapi-schema.json | 6 +++++- 2 files changed, 15 insertions(+), 1 deletion(-) diff --git a/cpus.c b/cpus.c index 740b8dc..4f91d25 100644 --- a/cpus.c +++ b/cpus.c @@ -50,6 +50,7 @@ #include "qapi-event.h" #include "hw/nmi.h" #include "sysemu/replay.h" +#include "hw/boards.h" =20 #ifdef CONFIG_LINUX =20 @@ -1859,6 +1860,8 @@ void list_cpus(FILE *f, fprintf_function cpu_fprintf,= const char *optarg) =20 CpuInfoList *qmp_query_cpus(Error **errp) { + MachineState *ms =3D MACHINE(qdev_get_machine()); + MachineClass *mc =3D MACHINE_GET_CLASS(ms); CpuInfoList *head =3D NULL, *cur_item =3D NULL; CPUState *cpu; =20 @@ -1909,6 +1912,13 @@ CpuInfoList *qmp_query_cpus(Error **errp) #else info->value->arch =3D CPU_INFO_ARCH_OTHER; #endif + info->value->has_props =3D !!mc->cpu_index_to_instance_props; + if (info->value->has_props) { + CpuInstanceProperties *props; + props =3D g_malloc0(sizeof(*props)); + *props =3D mc->cpu_index_to_instance_props(ms, cpu->cpu_index); + info->value->props =3D props; + } =20 /* XXX: waiting for the qapi to support GSList */ if (!cur_item) { diff --git a/qapi-schema.json b/qapi-schema.json index 01b087f..76d137d 100644 --- a/qapi-schema.json +++ b/qapi-schema.json @@ -1325,6 +1325,9 @@ # # @thread_id: ID of the underlying host thread # +# @props: properties describing to which node/socket/core/thread +# virtual CPU belongs to, provided if supported by board (since 2.= 10) +# # @arch: architecture of the cpu, which determines which additional fields # will be listed (since 2.6) # @@ -1335,7 +1338,8 @@ ## { 'union': 'CpuInfo', 'base': {'CPU': 'int', 'current': 'bool', 'halted': 'bool', - 'qom_path': 'str', 'thread_id': 'int', 'arch': 'CpuInfoArch' }, + 'qom_path': 'str', 'thread_id': 'int', + '*props': 'CpuInstanceProperties', 'arch': 'CpuInfoArch' }, 'discriminator': 'arch', 'data': { 'x86': 'CpuInfoX86', 'sparc': 'CpuInfoSPARC', --=20 2.7.4 From nobody Sun May 5 17:00:06 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; 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Wed, 03 May 2017 08:58:12 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 9DC3361BB7; Wed, 3 May 2017 12:58:11 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 6861517C5A; Wed, 3 May 2017 12:58:09 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 9DC3361BB7 Authentication-Results: ext-mx10.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx10.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 9DC3361BB7 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Wed, 3 May 2017 14:57:11 +0200 Message-Id: <1493816238-33120-18-git-send-email-imammedo@redhat.com> In-Reply-To: <1493816238-33120-1-git-send-email-imammedo@redhat.com> References: <1493816238-33120-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Wed, 03 May 2017 12:58:11 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 17/24] tests: numa: add case for QMP command query-cpus X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Andrew Jones , Eduardo Habkost , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Shannon Zhao , Paolo Bonzini , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Igor Mammedov Reviewed-by: David Gibson --- v2: * fix checkpatch error, move { to newline --- tests/numa-test.c | 45 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/tests/numa-test.c b/tests/numa-test.c index f5da0c8..2722687 100644 --- a/tests/numa-test.c +++ b/tests/numa-test.c @@ -87,6 +87,50 @@ static void test_mon_partial(const void *data) g_free(cli); } =20 +static QList *get_cpus(QDict **resp) +{ + *resp =3D qmp("{ 'execute': 'query-cpus' }"); + g_assert(*resp); + g_assert(qdict_haskey(*resp, "return")); + return qdict_get_qlist(*resp, "return"); +} + +static void test_query_cpus(const void *data) +{ + char *cli; + QDict *resp; + QList *cpus; + const QObject *e; + + cli =3D make_cli(data, "-smp 8 -numa node,cpus=3D0-3 -numa node,cpus= =3D4-7"); + qtest_start(cli); + cpus =3D get_cpus(&resp); + g_assert(cpus); + + while ((e =3D qlist_pop(cpus))) { + QDict *cpu, *props; + int64_t cpu_idx, node; + + cpu =3D qobject_to_qdict(e); + g_assert(qdict_haskey(cpu, "CPU")); + g_assert(qdict_haskey(cpu, "props")); + + cpu_idx =3D qdict_get_int(cpu, "CPU"); + props =3D qdict_get_qdict(cpu, "props"); + g_assert(qdict_haskey(props, "node-id")); + node =3D qdict_get_int(props, "node-id"); + if (cpu_idx >=3D 0 && cpu_idx < 4) { + g_assert_cmpint(node, =3D=3D, 0); + } else { + g_assert_cmpint(node, =3D=3D, 1); + } + } + + QDECREF(resp); + qtest_end(); + g_free(cli); +} + int main(int argc, char **argv) { const char *args =3D NULL; @@ -101,6 +145,7 @@ int main(int argc, char **argv) qtest_add_data_func("/numa/mon/default", args, test_mon_default); qtest_add_data_func("/numa/mon/cpus/explicit", args, test_mon_explicit= ); qtest_add_data_func("/numa/mon/cpus/partial", args, test_mon_partial); + qtest_add_data_func("/numa/qmp/cpus/query-cpus", args, test_query_cpus= ); =20 return g_test_run(); } --=20 2.7.4 From nobody Sun May 5 17:00:06 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1493816936759456.4896773956773; Wed, 3 May 2017 06:08:56 -0700 (PDT) Received: from localhost ([::1]:36643 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d5u1W-0000sa-E9 for importer@patchew.org; Wed, 03 May 2017 09:08:54 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39949) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d5trG-0000Ep-44 for qemu-devel@nongnu.org; Wed, 03 May 2017 08:58:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d5trF-00019J-93 for qemu-devel@nongnu.org; Wed, 03 May 2017 08:58:18 -0400 Received: from mx1.redhat.com ([209.132.183.28]:52432) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d5trD-00017U-65; Wed, 03 May 2017 08:58:15 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 0F3B5BDD4; Wed, 3 May 2017 12:58:14 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id E8F9117C5A; Wed, 3 May 2017 12:58:11 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 0F3B5BDD4 Authentication-Results: ext-mx05.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx05.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 0F3B5BDD4 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Wed, 3 May 2017 14:57:12 +0200 Message-Id: <1493816238-33120-19-git-send-email-imammedo@redhat.com> In-Reply-To: <1493816238-33120-1-git-send-email-imammedo@redhat.com> References: <1493816238-33120-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.29]); Wed, 03 May 2017 12:58:14 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 18/24] numa: remove no longer used numa_get_node_for_cpu() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Andrew Jones , Eduardo Habkost , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Shannon Zhao , Paolo Bonzini , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" it's been replaced by fetching mapping info from possible_cpus Signed-off-by: Igor Mammedov Reviewed-by: David Gibson Reviewed-by: Andrew Jones =20 --- include/sysemu/numa.h | 4 ---- numa.c | 14 -------------- 2 files changed, 18 deletions(-) diff --git a/include/sysemu/numa.h b/include/sysemu/numa.h index 98d01e6..9077bb2 100644 --- a/include/sysemu/numa.h +++ b/include/sysemu/numa.h @@ -32,10 +32,6 @@ void numa_set_mem_node_id(ram_addr_t addr, uint64_t size= , uint32_t node); void numa_unset_mem_node_id(ram_addr_t addr, uint64_t size, uint32_t node); uint32_t numa_get_node(ram_addr_t addr, Error **errp); =20 -/* on success returns node index in numa_info, - * on failure returns nb_numa_nodes */ -int numa_get_node_for_cpu(int idx); - static inline bool numa_has_node_id(const CPUArchIdList *possible_cpus, in= t idx) { return possible_cpus->cpus[idx].props.has_node_id; diff --git a/numa.c b/numa.c index 872ee0d..06c42e9 100644 --- a/numa.c +++ b/numa.c @@ -583,20 +583,6 @@ MemdevList *qmp_query_memdev(Error **errp) return list; } =20 -int numa_get_node_for_cpu(int idx) -{ - int i; - - assert(idx < max_cpus); - - for (i =3D 0; i < nb_numa_nodes; i++) { - if (test_bit(idx, numa_info[i].node_cpu)) { - break; - } - } - return i; -} - void ram_block_notifier_add(RAMBlockNotifier *n) { QLIST_INSERT_HEAD(&ram_list.ramblock_notifiers, n, next); --=20 2.7.4 From nobody Sun May 5 17:00:06 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1493817106324606.9066394004848; Wed, 3 May 2017 06:11:46 -0700 (PDT) Received: from localhost ([::1]:36667 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d5u4F-0003B8-4m for importer@patchew.org; Wed, 03 May 2017 09:11:43 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40048) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d5trM-0000Lw-Ch for qemu-devel@nongnu.org; Wed, 03 May 2017 08:58:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d5trL-0001Ca-Ih for qemu-devel@nongnu.org; Wed, 03 May 2017 08:58:24 -0400 Received: from mx1.redhat.com ([209.132.183.28]:45414) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d5trH-0001A8-5D; Wed, 03 May 2017 08:58:19 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id EBDEF80C0A; Wed, 3 May 2017 12:58:17 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 5BEE217C5A; Wed, 3 May 2017 12:58:14 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com EBDEF80C0A Authentication-Results: ext-mx02.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx02.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com EBDEF80C0A From: Igor Mammedov To: qemu-devel@nongnu.org Date: Wed, 3 May 2017 14:57:13 +0200 Message-Id: <1493816238-33120-20-git-send-email-imammedo@redhat.com> In-Reply-To: <1493816238-33120-1-git-send-email-imammedo@redhat.com> References: <1493816238-33120-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Wed, 03 May 2017 12:58:18 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 19/24] numa: remove no longer need numa_post_machine_init() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Andrew Jones , Eduardo Habkost , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Shannon Zhao , Paolo Bonzini , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" CPUState::numa_node is still in use but now it's set by board when it creates CPU objects. So there isn't any need to set it again after all CPU's are created, since it's been already set. Signed-off-by: Igor Mammedov Reviewed-by: David Gibson Reviewed-by: Andrew Jones =20 --- include/sysemu/numa.h | 1 - numa.c | 15 --------------- vl.c | 2 -- 3 files changed, 18 deletions(-) diff --git a/include/sysemu/numa.h b/include/sysemu/numa.h index 9077bb2..0b0a044 100644 --- a/include/sysemu/numa.h +++ b/include/sysemu/numa.h @@ -25,7 +25,6 @@ typedef struct node_info { =20 extern NodeInfo numa_info[MAX_NODES]; void parse_numa_opts(MachineState *ms); -void numa_post_machine_init(void); void query_numa_node_mem(uint64_t node_mem[]); extern QemuOptsList qemu_numa_opts; void numa_set_mem_node_id(ram_addr_t addr, uint64_t size, uint32_t node); diff --git a/numa.c b/numa.c index 06c42e9..f8c849d 100644 --- a/numa.c +++ b/numa.c @@ -418,21 +418,6 @@ void parse_numa_opts(MachineState *ms) } } =20 -void numa_post_machine_init(void) -{ - CPUState *cpu; - int i; - - CPU_FOREACH(cpu) { - for (i =3D 0; i < nb_numa_nodes; i++) { - assert(cpu->cpu_index < max_cpus); - if (test_bit(cpu->cpu_index, numa_info[i].node_cpu)) { - cpu->numa_node =3D i; - } - } - } -} - static void allocate_system_memory_nonnuma(MemoryRegion *mr, Object *owner, const char *name, uint64_t ram_size) diff --git a/vl.c b/vl.c index c63f4d5..fe4741d 100644 --- a/vl.c +++ b/vl.c @@ -4595,8 +4595,6 @@ int main(int argc, char **argv, char **envp) =20 cpu_synchronize_all_post_init(); =20 - numa_post_machine_init(); - rom_reset_order_override(); =20 /* --=20 2.7.4 From nobody Sun May 5 17:00:06 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1493817961663594.5033160382717; Wed, 3 May 2017 06:26:01 -0700 (PDT) Received: from localhost ([::1]:36814 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d5uI3-0006bA-7r for importer@patchew.org; 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Wed, 3 May 2017 12:58:18 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 5AD313D956 Authentication-Results: ext-mx06.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx06.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 5AD313D956 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Wed, 3 May 2017 14:57:14 +0200 Message-Id: <1493816238-33120-21-git-send-email-imammedo@redhat.com> In-Reply-To: <1493816238-33120-1-git-send-email-imammedo@redhat.com> References: <1493816238-33120-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Wed, 03 May 2017 12:58:20 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 20/24] machine: call machine init from wrapper X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Andrew Jones , Eduardo Habkost , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Shannon Zhao , Paolo Bonzini , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" add machine_run_board_init() wrapper that calls machine init for now but in follow up patches it will be used to run generic machine code that should run before machine init. Signed-off-by: Igor Mammedov Reviewed-by: Andrew Jones =20 Reviewed-by: David Gibson Reviewed-by: Eduardo Habkost --- include/hw/boards.h | 1 + hw/core/machine.c | 6 ++++++ vl.c | 2 +- 3 files changed, 8 insertions(+), 1 deletion(-) diff --git a/include/hw/boards.h b/include/hw/boards.h index 1f518a1..0e74484 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -32,6 +32,7 @@ void memory_region_allocate_system_memory(MemoryRegion *m= r, Object *owner, MachineClass *find_default_machine(void); extern MachineState *current_machine; =20 +void machine_run_board_init(MachineState *machine); bool machine_usb(MachineState *machine); bool machine_kernel_irqchip_allowed(MachineState *machine); bool machine_kernel_irqchip_required(MachineState *machine); diff --git a/hw/core/machine.c b/hw/core/machine.c index a63f17b..217b4f4 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -648,6 +648,12 @@ bool machine_mem_merge(MachineState *machine) return machine->mem_merge; } =20 +void machine_run_board_init(MachineState *machine) +{ + MachineClass *machine_class =3D MACHINE_GET_CLASS(machine); + machine_class->init(machine); +} + static void machine_class_finalize(ObjectClass *klass, void *data) { MachineClass *mc =3D MACHINE_CLASS(klass); diff --git a/vl.c b/vl.c index fe4741d..ac46d6e 100644 --- a/vl.c +++ b/vl.c @@ -4562,7 +4562,7 @@ int main(int argc, char **argv, char **envp) current_machine->boot_order =3D boot_order; current_machine->cpu_model =3D cpu_model; =20 - machine_class->init(current_machine); + machine_run_board_init(current_machine); =20 realtime_init(); =20 --=20 2.7.4 From nobody Sun May 5 17:00:06 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1493817128846831.3240525666091; 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Wed, 3 May 2017 12:58:24 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id A760F182D6; Wed, 3 May 2017 12:58:20 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 00BA8201FB Authentication-Results: ext-mx05.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx05.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 00BA8201FB From: Igor Mammedov To: qemu-devel@nongnu.org Date: Wed, 3 May 2017 14:57:15 +0200 Message-Id: <1493816238-33120-22-git-send-email-imammedo@redhat.com> In-Reply-To: <1493816238-33120-1-git-send-email-imammedo@redhat.com> References: <1493816238-33120-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.29]); Wed, 03 May 2017 12:58:24 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 21/24] numa: use possible_cpus for not mapped CPUs check X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Andrew Jones , Eduardo Habkost , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Shannon Zhao , Paolo Bonzini , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" and remove corresponding part in numa.c that uses node_cpu bitmaps. Signed-off-by: Igor Mammedov Reviewed-by: David Gibson Reviewed-by: Andrew Jones =20 --- It's one more less user of node_cpu bitmpas, following commit will remove the last user along with node_cpu itself. --- hw/core/machine.c | 58 +++++++++++++++++++++++++++++++++++++++++++++++++++= ++++ numa.c | 10 ---------- 2 files changed, 58 insertions(+), 10 deletions(-) diff --git a/hw/core/machine.c b/hw/core/machine.c index 217b4f4..4229054 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -19,6 +19,7 @@ #include "sysemu/sysemu.h" #include "qemu/error-report.h" #include "qemu/cutils.h" +#include "sysemu/numa.h" =20 static char *machine_get_accel(Object *obj, Error **errp) { @@ -648,9 +649,66 @@ bool machine_mem_merge(MachineState *machine) return machine->mem_merge; } =20 +static char *cpu_slot_to_string(const CPUArchId *cpu) +{ + GString *s =3D g_string_new(NULL); + if (cpu->props.has_socket_id) { + g_string_append_printf(s, "socket-id: %"PRId64, cpu->props.socket_= id); + } + if (cpu->props.has_core_id) { + if (s->len) { + g_string_append_printf(s, ", "); + } + g_string_append_printf(s, "core-id: %"PRId64, cpu->props.core_id); + } + if (cpu->props.has_thread_id) { + if (s->len) { + g_string_append_printf(s, ", "); + } + g_string_append_printf(s, "thread-id: %"PRId64, cpu->props.thread_= id); + } + return g_string_free(s, false); +} + +static void machine_numa_validate(MachineState *machine) +{ + int i; + GString *s =3D g_string_new(NULL); + MachineClass *mc =3D MACHINE_GET_CLASS(machine); + const CPUArchIdList *possible_cpus =3D mc->possible_cpu_arch_ids(machi= ne); + + assert(nb_numa_nodes); + for (i =3D 0; i < possible_cpus->len; i++) { + const CPUArchId *cpu_slot =3D &possible_cpus->cpus[i]; + + /* at this point numa mappings are initilized by CLI options + * or with default mappings so it's sufficient to list + * all not yet mapped CPUs here */ + /* TODO: make it hard error in future */ + if (!cpu_slot->props.has_node_id) { + char *cpu_str =3D cpu_slot_to_string(cpu_slot); + g_string_append_printf(s, "%sCPU %d [%s]", s->len ? ", " : "",= i, + cpu_str); + g_free(cpu_str); + } + } + if (s->len) { + error_report("warning: CPU(s) not present in any NUMA nodes: %s", + s->str); + error_report("warning: All CPU(s) up to maxcpus should be describe= d " + "in NUMA config, ability to start up with partial NUM= A " + "mappings is obsoleted and will be removed in future"= ); + } + g_string_free(s, true); +} + void machine_run_board_init(MachineState *machine) { MachineClass *machine_class =3D MACHINE_GET_CLASS(machine); + + if (nb_numa_nodes) { + machine_numa_validate(machine); + } machine_class->init(machine); } =20 diff --git a/numa.c b/numa.c index f8c849d..d7aa662 100644 --- a/numa.c +++ b/numa.c @@ -293,16 +293,6 @@ static void validate_numa_cpus(void) bitmap_or(seen_cpus, seen_cpus, numa_info[i].node_cpu, max_cpus); } - - if (!bitmap_full(seen_cpus, max_cpus)) { - char *msg; - bitmap_complement(seen_cpus, seen_cpus, max_cpus); - msg =3D enumerate_cpus(seen_cpus, max_cpus); - error_report("warning: CPU(s) not present in any NUMA nodes: %s", = msg); - error_report("warning: All CPU(s) up to maxcpus should be describe= d " - "in NUMA config"); - g_free(msg); - } g_free(seen_cpus); } =20 --=20 2.7.4 From nobody Sun May 5 17:00:06 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1493818158671592.1327733890732; Wed, 3 May 2017 06:29:18 -0700 (PDT) Received: from localhost ([::1]:36837 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d5uLF-0000pd-Fa for importer@patchew.org; Wed, 03 May 2017 09:29:17 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40256) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d5tra-0000ZD-0z for qemu-devel@nongnu.org; Wed, 03 May 2017 08:58:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d5trZ-0001Ju-4e for qemu-devel@nongnu.org; Wed, 03 May 2017 08:58:38 -0400 Received: from mx1.redhat.com ([209.132.183.28]:41744) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d5trR-0001Fe-0a; Wed, 03 May 2017 08:58:29 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id CC9FE4E357; Wed, 3 May 2017 12:58:27 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 4CD80182D8; Wed, 3 May 2017 12:58:24 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com CC9FE4E357 Authentication-Results: ext-mx09.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx09.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com CC9FE4E357 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Wed, 3 May 2017 14:57:16 +0200 Message-Id: <1493816238-33120-23-git-send-email-imammedo@redhat.com> In-Reply-To: <1493816238-33120-1-git-send-email-imammedo@redhat.com> References: <1493816238-33120-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Wed, 03 May 2017 12:58:28 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 22/24] numa: remove node_cpu bitmaps as they are no longer used X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Andrew Jones , Eduardo Habkost , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Shannon Zhao , Paolo Bonzini , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Postfactum "CPU(s) present in multiple NUMA nodes" check was the last user of node_cpu bitmaps, but it's not need as machine_set_cpu_numa_node() does the similar check at the time mapping is set for cpus (i.e. when -numa cpus=3D is parsed) and ensures that cpu can be mapped only to one node. Remove duplicate check based on node_cpu bitmaps and since the last user is gone remove node_cpu as well, which completes internal transition from legacy bitmap based mapping storage to possible_cpus storage. Signed-off-by: Igor Mammedov Reviewed-by: David Gibson Reviewed-by: Andrew Jones =20 --- include/sysemu/numa.h | 1 - numa.c | 42 ------------------------------------------ 2 files changed, 43 deletions(-) diff --git a/include/sysemu/numa.h b/include/sysemu/numa.h index 0b0a044..7f2d397 100644 --- a/include/sysemu/numa.h +++ b/include/sysemu/numa.h @@ -17,7 +17,6 @@ struct numa_addr_range { =20 typedef struct node_info { uint64_t node_mem; - unsigned long *node_cpu; struct HostMemoryBackend *node_memdev; bool present; QLIST_HEAD(, numa_addr_range) addr; /* List to store address ranges */ diff --git a/numa.c b/numa.c index d7aa662..40e9f44 100644 --- a/numa.c +++ b/numa.c @@ -177,7 +177,6 @@ static void numa_node_parse(MachineState *ms, NumaNodeO= ptions *node, cpus->value, max_cpus); return; } - bitmap_set(numa_info[nodenr].node_cpu, cpus->value, 1); props =3D mc->cpu_index_to_instance_props(ms, cpus->value); props.node_id =3D nodenr; props.has_node_id =3D true; @@ -261,51 +260,12 @@ end: return 0; } =20 -static char *enumerate_cpus(unsigned long *cpus, int max_cpus) -{ - int cpu; - bool first =3D true; - GString *s =3D g_string_new(NULL); - - for (cpu =3D find_first_bit(cpus, max_cpus); - cpu < max_cpus; - cpu =3D find_next_bit(cpus, max_cpus, cpu + 1)) { - g_string_append_printf(s, "%s%d", first ? "" : " ", cpu); - first =3D false; - } - return g_string_free(s, FALSE); -} - -static void validate_numa_cpus(void) -{ - int i; - unsigned long *seen_cpus =3D bitmap_new(max_cpus); - - for (i =3D 0; i < nb_numa_nodes; i++) { - if (bitmap_intersects(seen_cpus, numa_info[i].node_cpu, max_cpus))= { - bitmap_and(seen_cpus, seen_cpus, - numa_info[i].node_cpu, max_cpus); - error_report("CPU(s) present in multiple NUMA nodes: %s", - enumerate_cpus(seen_cpus, max_cpus)); - g_free(seen_cpus); - exit(EXIT_FAILURE); - } - bitmap_or(seen_cpus, seen_cpus, - numa_info[i].node_cpu, max_cpus); - } - g_free(seen_cpus); -} - void parse_numa_opts(MachineState *ms) { int i; const CPUArchIdList *possible_cpus; MachineClass *mc =3D MACHINE_GET_CLASS(ms); =20 - for (i =3D 0; i < MAX_NODES; i++) { - numa_info[i].node_cpu =3D bitmap_new(max_cpus); - } - if (qemu_opts_foreach(qemu_find_opts("numa"), parse_numa, ms, NULL)) { exit(1); } @@ -397,12 +357,10 @@ void parse_numa_opts(MachineState *ms) props =3D mc->cpu_index_to_instance_props(ms, i); props.has_node_id =3D true; =20 - set_bit(i, numa_info[props.node_id].node_cpu); machine_set_cpu_numa_node(ms, &props, &error_fatal); } } =20 - validate_numa_cpus(); } else { numa_set_mem_node_id(0, ram_size, 0); } --=20 2.7.4 From nobody Sun May 5 17:00:06 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1493818069007906.3155280040488; Wed, 3 May 2017 06:27:49 -0700 (PDT) Received: from localhost ([::1]:36822 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d5uJl-0008Fu-Dq for importer@patchew.org; Wed, 03 May 2017 09:27:45 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40227) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d5trY-0000XO-2k for qemu-devel@nongnu.org; Wed, 03 May 2017 08:58:37 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d5trW-0001If-QN for qemu-devel@nongnu.org; Wed, 03 May 2017 08:58:36 -0400 Received: from mx1.redhat.com ([209.132.183.28]:43942) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d5trT-0001Gw-I1; Wed, 03 May 2017 08:58:31 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 5EB7280F7C; Wed, 3 May 2017 12:58:30 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 24D8017C5A; Wed, 3 May 2017 12:58:27 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 5EB7280F7C Authentication-Results: ext-mx03.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx03.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 5EB7280F7C From: Igor Mammedov To: qemu-devel@nongnu.org Date: Wed, 3 May 2017 14:57:17 +0200 Message-Id: <1493816238-33120-24-git-send-email-imammedo@redhat.com> In-Reply-To: <1493816238-33120-1-git-send-email-imammedo@redhat.com> References: <1493816238-33120-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Wed, 03 May 2017 12:58:30 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 23/24] numa: add '-numa cpu, ...' option for property based node mapping X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Andrew Jones , Eduardo Habkost , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Shannon Zhao , Paolo Bonzini , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" legacy cpu to node mapping is using cpu index values to map VCPU to node with help of '-numa node,nodeid=3Dnode,cpus=3Dx[-y]' option. However cpu index is internal concept and QEMU users have to guess /reimplement qemu's logic/ to map it to a concrete cpu socket/core/thread to make sane CPUs placement across numa nodes. This patch allows to map cpu objects to numa nodes using the same properties as used for cpus with -device/device_add (socket-id/core-id/thread-id/node-id). At present valid properties/values to address CPUs could be fetched using hotpluggable-cpus monitor/qmp command, it will require user to start qemu twice when creating domain to fetch possible CPUs for a machine type/-smp layout first and then the second time with numa explicit mapping for actual usage. The first step results could be saved and reused to set/change mapping later as far as machine type/-smp stays the same. Proposed impl. supports exact and wildcard matching to simplify CLI and allow to set mapping for a specific cpu or group of cpu objects specified by matched properties. For example: # exact mapping x86 -numa cpu,node-id=3Dx,socket-id=3Dy,core-id=3Dz,thread-id=3Dn # exact mapping SPAPR -numa cpu,node-id=3Dx,core-id=3Dy # wildcard mapping, all cpu objects that match socket-id=3Dy # are mapped to node-id=3Dx -numa cpu,node-id=3Dx,socket-id=3Dy Signed-off-by: Igor Mammedov --- v2: - use new NumaCpuOptions instead of CpuInstanceProperties in NumaOptions, so that in future we could decouple both if needed. (Eduardo Habkost ) - clarify effect of NumaCpuOptions.node-id in qapi-schema.json --- numa.c | 25 +++++++++++++++++++++++++ qapi-schema.json | 21 +++++++++++++++++++-- qemu-options.hx | 23 ++++++++++++++++++++++- 3 files changed, 66 insertions(+), 3 deletions(-) diff --git a/numa.c b/numa.c index 40e9f44..61521f5 100644 --- a/numa.c +++ b/numa.c @@ -227,6 +227,7 @@ static int parse_numa(void *opaque, QemuOpts *opts, Err= or **errp) NumaOptions *object =3D NULL; MachineState *ms =3D opaque; Error *err =3D NULL; + CpuInstanceProperties cpu; =20 { Visitor *v =3D opts_visitor_new(opts); @@ -246,6 +247,30 @@ static int parse_numa(void *opaque, QemuOpts *opts, Er= ror **errp) } nb_numa_nodes++; break; + case NUMA_OPTIONS_TYPE_CPU: + if (!object->u.cpu.has_node_id) { + error_setg(&err, "Missing mandatory node-id property"); + goto end; + } + if (!numa_info[object->u.cpu.node_id].present) { + error_setg(&err, "Invalid node-id=3D%" PRId64 ", NUMA node mus= t be " + "defined with -numa node,nodeid=3DID before it's used with= " + "-numa cpu,node-id=3DID", object->u.cpu.node_id); + goto end; + } + + memset(&cpu, 0, sizeof(cpu)); + cpu.has_node_id =3D object->u.cpu.has_node_id; + cpu.node_id =3D object->u.cpu.node_id; + cpu.has_socket_id =3D object->u.cpu.has_socket_id; + cpu.socket_id =3D object->u.cpu.socket_id; + cpu.has_core_id =3D object->u.cpu.has_core_id; + cpu.core_id =3D object->u.cpu.core_id; + cpu.has_thread_id =3D object->u.cpu.has_thread_id; + cpu.thread_id =3D object->u.cpu.thread_id; + + machine_set_cpu_numa_node(ms, &cpu, &err); + break; default: abort(); } diff --git a/qapi-schema.json b/qapi-schema.json index 76d137d..5baf3a4 100644 --- a/qapi-schema.json +++ b/qapi-schema.json @@ -5680,10 +5680,12 @@ ## # @NumaOptionsType: # +# @cpu: property based CPU(s) to node mapping (Since: 2.10) +# # Since: 2.1 ## { 'enum': 'NumaOptionsType', - 'data': [ 'node' ] } + 'data': [ 'node', 'cpu' ] } =20 ## # @NumaOptions: @@ -5696,7 +5698,8 @@ 'base': { 'type': 'NumaOptionsType' }, 'discriminator': 'type', 'data': { - 'node': 'NumaNodeOptions' }} + 'node': 'NumaNodeOptions', + 'cpu': 'NumaCpuOptions' }} =20 ## # @NumaNodeOptions: @@ -5725,6 +5728,20 @@ '*memdev': 'str' }} =20 ## +# @NumaCpuOptions: +# +# Option "-numa cpu" overrides default cpu to node mapping. +# It accepts the same set of cpu properties as returned by +# query-hotpluggable-cpus[].props, where node-id could be used to +# override default node mapping. +# +# Since: 2.10 +## +{ 'struct': 'NumaCpuOptions', + 'base': 'CpuInstanceProperties', + 'data' : {} } + +## # @HostMemPolicy: # # Host memory policy types diff --git a/qemu-options.hx b/qemu-options.hx index 787b9c3..e88f534 100644 --- a/qemu-options.hx +++ b/qemu-options.hx @@ -139,13 +139,16 @@ ETEXI =20 DEF("numa", HAS_ARG, QEMU_OPTION_numa, "-numa node[,mem=3Dsize][,cpus=3Dfirstcpu[-lastcpu]][,nodeid=3Dnode]\n" - "-numa node[,memdev=3Did][,cpus=3Dfirstcpu[-lastcpu]][,nodeid=3Dnode]\= n", QEMU_ARCH_ALL) + "-numa node[,memdev=3Did][,cpus=3Dfirstcpu[-lastcpu]][,nodeid=3Dnode]\= n" + "-numa cpu,node-id=3Dnode[,socket-id=3Dx][,core-id=3Dy][,thread-id=3Dz= ]\n", QEMU_ARCH_ALL) STEXI @item -numa node[,mem=3D@var{size}][,cpus=3D@var{firstcpu}[-@var{lastcpu}]= ][,nodeid=3D@var{node}] @itemx -numa node[,memdev=3D@var{id}][,cpus=3D@var{firstcpu}[-@var{lastcpu= }]][,nodeid=3D@var{node}] +@itemx -numa cpu,node-id=3D@var{node}[,socket-id=3D@var{x}][,core-id=3D@va= r{y}][,thread-id=3D@var{z}] @findex -numa Define a NUMA node and assign RAM and VCPUs to it. =20 +Legacy VCPU assignment uses @samp{cpus} option where @var{firstcpu} and @var{lastcpu} are CPU indexes. Each @samp{cpus} option represent a contiguous range of CPU indexes (or a single VCPU if @var{lastcpu} is omitted). A non-contiguous @@ -159,6 +162,24 @@ a NUMA node: -numa node,cpus=3D0-2,cpus=3D5 @end example =20 +@samp{cpu} option is a new alternative to @samp{cpus} option +which uses @samp{socket-id|core-id|thread-id} properties to assign +CPU objects to a @var{node} using topology layout properties of CPU. +The set of properties is machine specific, and depends on used +machine type/@samp{smp} options. It could be queried with +@samp{hotpluggable-cpus} monitor command. +@samp{node-id} property specifies @var{node} to which CPU object +will be assigned, it's required for @var{node} to be declared +with @samp{node} option before it's used with @samp{cpu} option. + +For example: +@example +-M pc \ +-smp 1,sockets=3D2,maxcpus=3D2 \ +-numa node,nodeid=3D0 -numa node,nodeid=3D1 \ +-numa cpu,node-id=3D0,socket-id=3D0 -numa cpu,node-id=3D1,socket-id=3D1 +@end example + @samp{mem} assigns a given RAM amount to a node. @samp{memdev} assigns RAM from a given memory backend device to a node. If @samp{mem} and @samp{memdev} are omitted in all nodes, RAM is --=20 2.7.4 From nobody Sun May 5 17:00:06 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1493818223825171.7206317872791; Wed, 3 May 2017 06:30:23 -0700 (PDT) Received: from localhost ([::1]:36847 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d5uMI-0001Og-GX for importer@patchew.org; Wed, 03 May 2017 09:30:22 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40254) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d5trZ-0000Z3-Ps for qemu-devel@nongnu.org; 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dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx07.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com DC75DC04B320 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Wed, 3 May 2017 14:57:18 +0200 Message-Id: <1493816238-33120-25-git-send-email-imammedo@redhat.com> In-Reply-To: <1493816238-33120-1-git-send-email-imammedo@redhat.com> References: <1493816238-33120-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.31]); Wed, 03 May 2017 12:58:33 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 24/24] tests: check -numa node, cpu=props_list usecase X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Andrew Jones , Eduardo Habkost , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Shannon Zhao , Paolo Bonzini , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Igor Mammedov Reviewed-by: David Gibson --- tests/numa-test.c | 151 ++++++++++++++++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 151 insertions(+) diff --git a/tests/numa-test.c b/tests/numa-test.c index 2722687..c3475d6 100644 --- a/tests/numa-test.c +++ b/tests/numa-test.c @@ -131,6 +131,144 @@ static void test_query_cpus(const void *data) g_free(cli); } =20 +static void pc_numa_cpu(const void *data) +{ + char *cli; + QDict *resp; + QList *cpus; + const QObject *e; + + cli =3D make_cli(data, "-cpu pentium -smp 8,sockets=3D2,cores=3D2,thre= ads=3D2 " + "-numa node,nodeid=3D0 -numa node,nodeid=3D1 " + "-numa cpu,node-id=3D1,socket-id=3D0 " + "-numa cpu,node-id=3D0,socket-id=3D1,core-id=3D0 " + "-numa cpu,node-id=3D0,socket-id=3D1,core-id=3D1,thread-id=3D0 " + "-numa cpu,node-id=3D1,socket-id=3D1,core-id=3D1,thread-id=3D1"); + qtest_start(cli); + cpus =3D get_cpus(&resp); + g_assert(cpus); + + while ((e =3D qlist_pop(cpus))) { + QDict *cpu, *props; + int64_t socket, core, thread, node; + + cpu =3D qobject_to_qdict(e); + g_assert(qdict_haskey(cpu, "props")); + props =3D qdict_get_qdict(cpu, "props"); + + g_assert(qdict_haskey(props, "node-id")); + node =3D qdict_get_int(props, "node-id"); + g_assert(qdict_haskey(props, "socket-id")); + socket =3D qdict_get_int(props, "socket-id"); + g_assert(qdict_haskey(props, "core-id")); + core =3D qdict_get_int(props, "core-id"); + g_assert(qdict_haskey(props, "thread-id")); + thread =3D qdict_get_int(props, "thread-id"); + + if (socket =3D=3D 0) { + g_assert_cmpint(node, =3D=3D, 1); + } else if (socket =3D=3D 1 && core =3D=3D 0) { + g_assert_cmpint(node, =3D=3D, 0); + } else if (socket =3D=3D 1 && core =3D=3D 1 && thread =3D=3D 0) { + g_assert_cmpint(node, =3D=3D, 0); + } else if (socket =3D=3D 1 && core =3D=3D 1 && thread =3D=3D 1) { + g_assert_cmpint(node, =3D=3D, 1); + } else { + g_assert(false); + } + } + + QDECREF(resp); + qtest_end(); + g_free(cli); +} + +static void spapr_numa_cpu(const void *data) +{ + char *cli; + QDict *resp; + QList *cpus; + const QObject *e; + + cli =3D make_cli(data, "-smp 4,cores=3D4 " + "-numa node,nodeid=3D0 -numa node,nodeid=3D1 " + "-numa cpu,node-id=3D0,core-id=3D0 " + "-numa cpu,node-id=3D0,core-id=3D1 " + "-numa cpu,node-id=3D0,core-id=3D2 " + "-numa cpu,node-id=3D1,core-id=3D3"); + qtest_start(cli); + cpus =3D get_cpus(&resp); + g_assert(cpus); + + while ((e =3D qlist_pop(cpus))) { + QDict *cpu, *props; + int64_t core, node; + + cpu =3D qobject_to_qdict(e); + g_assert(qdict_haskey(cpu, "props")); + props =3D qdict_get_qdict(cpu, "props"); + + g_assert(qdict_haskey(props, "node-id")); + node =3D qdict_get_int(props, "node-id"); + g_assert(qdict_haskey(props, "core-id")); + core =3D qdict_get_int(props, "core-id"); + + if (core >=3D 0 && core < 3) { + g_assert_cmpint(node, =3D=3D, 0); + } else if (core =3D=3D 3) { + g_assert_cmpint(node, =3D=3D, 1); + } else { + g_assert(false); + } + } + + QDECREF(resp); + qtest_end(); + g_free(cli); +} + +static void aarch64_numa_cpu(const void *data) +{ + char *cli; + QDict *resp; + QList *cpus; + const QObject *e; + + cli =3D make_cli(data, "-smp 2 " + "-numa node,nodeid=3D0 -numa node,nodeid=3D1 " + "-numa cpu,node-id=3D1,thread-id=3D0 " + "-numa cpu,node-id=3D0,thread-id=3D1"); + qtest_start(cli); + cpus =3D get_cpus(&resp); + g_assert(cpus); + + while ((e =3D qlist_pop(cpus))) { + QDict *cpu, *props; + int64_t thread, node; + + cpu =3D qobject_to_qdict(e); + g_assert(qdict_haskey(cpu, "props")); + props =3D qdict_get_qdict(cpu, "props"); + + g_assert(qdict_haskey(props, "node-id")); + node =3D qdict_get_int(props, "node-id"); + g_assert(qdict_haskey(props, "thread-id")); + thread =3D qdict_get_int(props, "thread-id"); + + if (thread =3D=3D 0) { + g_assert_cmpint(node, =3D=3D, 1); + } else if (thread =3D=3D 1) { + g_assert_cmpint(node, =3D=3D, 0); + } else { + g_assert(false); + } + } + + QDECREF(resp); + qtest_end(); + g_free(cli); +} + int main(int argc, char **argv) { const char *args =3D NULL; @@ -147,5 +285,18 @@ int main(int argc, char **argv) qtest_add_data_func("/numa/mon/cpus/partial", args, test_mon_partial); qtest_add_data_func("/numa/qmp/cpus/query-cpus", args, test_query_cpus= ); =20 + if (!strcmp(arch, "i386") || !strcmp(arch, "x86_64")) { + qtest_add_data_func("/numa/pc/cpu/explicit", args, pc_numa_cpu); + } + + if (!strcmp(arch, "ppc64")) { + qtest_add_data_func("/numa/spapr/cpu/explicit", args, spapr_numa_c= pu); + } + + if (!strcmp(arch, "aarch64")) { + qtest_add_data_func("/numa/aarch64/cpu/explicit", args, + aarch64_numa_cpu); + } + return g_test_run(); } --=20 2.7.4