From nobody Mon Feb 9 16:52:20 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; dkim=fail spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1493391849862256.13119544580604; Fri, 28 Apr 2017 08:04:09 -0700 (PDT) Received: from localhost ([::1]:37474 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d47RH-0005TZ-1c for importer@patchew.org; Fri, 28 Apr 2017 11:04:07 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53167) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d47N9-00029W-Hl for qemu-devel@nongnu.org; Fri, 28 Apr 2017 10:59:52 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d47N4-0006xB-T1 for qemu-devel@nongnu.org; Fri, 28 Apr 2017 10:59:51 -0400 Received: from greensocs.com ([193.104.36.180]:60029) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d47N4-0006wt-Ht for qemu-devel@nongnu.org; Fri, 28 Apr 2017 10:59:46 -0400 Received: from localhost (localhost [127.0.0.1]) by greensocs.com (Postfix) with ESMTP id BD3EE40C5B8; Fri, 28 Apr 2017 16:59:45 +0200 (CEST) Received: from greensocs.com ([127.0.0.1]) by localhost (gs-01.greensocs.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id vL6Dm2EQ-gYP; Fri, 28 Apr 2017 16:59:45 +0200 (CEST) Received: from corsair.home (bd231-7-88-127-3-24.fbx.proxad.net [88.127.3.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: fred.konrad@greensocs.com) by greensocs.com (Postfix) with ESMTPSA id 6F81C40C5B2; Fri, 28 Apr 2017 16:59:44 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1493391585; bh=eGIpuF0H9htACCRtidR/4xU6FUzFkD7JSaPHJLp07+s=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=nzJpJT/XmPW7l9cw7X24ebvBFCEyubRRJdShbyztOpYZD2WazZo9+6Ijbq4/rWaKS LM3eBAO+opE8SKbBd0+YDEd1jukrE9FOpgYLFFs7xO0J7mYHboeUvQwfiUXrmCw6FB NL57qw/YfXsKEH1m0dVLhavBe2JGtV1/HZog+KR0= X-Virus-Scanned: amavisd-new at greensocs.com Authentication-Results: gs-01.greensocs.com (amavisd-new); dkim=pass (1024-bit key) header.d=greensocs.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1493391584; bh=eGIpuF0H9htACCRtidR/4xU6FUzFkD7JSaPHJLp07+s=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=Q6RyyoAEfLDzLsv53cnt/67PJ/Mm59+cDsUVlhnb7lDMZPeQhhXVNV5XoRk/7Gubo 2AM+sZb512k5vsTJVT7O+qqglHnPQuqictL9IR7dB4gSPd8Y+nEeiT0CcH8MKPMrbo Wr3dVhj3eKrxFBgz42v5F9gBhcdy/V6p47d7OSgo= From: fred.konrad@greensocs.com To: qemu-devel@nongnu.org Date: Fri, 28 Apr 2017 16:59:31 +0200 Message-Id: <1493391576-29401-3-git-send-email-fred.konrad@greensocs.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1493391576-29401-1-git-send-email-fred.konrad@greensocs.com> References: <1493391576-29401-1-git-send-email-fred.konrad@greensocs.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 193.104.36.180 Subject: [Qemu-devel] [PATCH V3 2/7] cputlb: move get_page_addr_code X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org, mark.burton@greensocs.com, alistair.francis@xilinx.com, clg@kaod.org, pbonzini@redhat.com, fred.konrad@greensocs.com, rth@twiddle.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (found 2 invalid signatures) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: KONRAD Frederic This just moves the code before VICTIM_TLB_HIT macro definition so we can use it. Reviewed-by: Richard Henderson Reviewed-by: Edgar E. Iglesias Signed-off-by: KONRAD Frederic V2 -> V3: * Rebase against cpu_unaligned access recent change. --- cputlb.c | 70 ++++++++++++++++++++++++++++++++----------------------------= ---- 1 file changed, 35 insertions(+), 35 deletions(-) diff --git a/cputlb.c b/cputlb.c index dcf28f7..ad1d983 100644 --- a/cputlb.c +++ b/cputlb.c @@ -746,41 +746,6 @@ static inline ram_addr_t qemu_ram_addr_from_host_nofai= l(void *ptr) return ram_addr; } =20 -/* NOTE: this function can trigger an exception */ -/* NOTE2: the returned address is not exactly the physical address: it - * is actually a ram_addr_t (in system mode; the user mode emulation - * version of this function returns a guest virtual address). - */ -tb_page_addr_t get_page_addr_code(CPUArchState *env, target_ulong addr) -{ - int mmu_idx, index, pd; - void *p; - MemoryRegion *mr; - CPUState *cpu =3D ENV_GET_CPU(env); - CPUIOTLBEntry *iotlbentry; - - index =3D (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); - mmu_idx =3D cpu_mmu_index(env, true); - if (unlikely(env->tlb_table[mmu_idx][index].addr_code !=3D - (addr & TARGET_PAGE_MASK))) { - cpu_ldub_code(env, addr); - } - iotlbentry =3D &env->iotlb[mmu_idx][index]; - pd =3D iotlbentry->addr & ~TARGET_PAGE_MASK; - mr =3D iotlb_to_region(cpu, pd, iotlbentry->attrs); - if (memory_region_is_unassigned(mr)) { - cpu_unassigned_access(cpu, addr, false, true, 0, 4); - /* The CPU's unassigned access hook might have longjumped out - * with an exception. If it didn't (or there was no hook) then - * we can't proceed further. - */ - report_bad_exec(cpu, addr); - exit(1); - } - p =3D (void *)((uintptr_t)addr + env->tlb_table[mmu_idx][index].addend= ); - return qemu_ram_addr_from_host_nofail(p); -} - static uint64_t io_readx(CPUArchState *env, CPUIOTLBEntry *iotlbentry, target_ulong addr, uintptr_t retaddr, int size) { @@ -868,6 +833,41 @@ static bool victim_tlb_hit(CPUArchState *env, size_t m= mu_idx, size_t index, victim_tlb_hit(env, mmu_idx, index, offsetof(CPUTLBEntry, TY), \ (ADDR) & TARGET_PAGE_MASK) =20 +/* NOTE: this function can trigger an exception */ +/* NOTE2: the returned address is not exactly the physical address: it + * is actually a ram_addr_t (in system mode; the user mode emulation + * version of this function returns a guest virtual address). + */ +tb_page_addr_t get_page_addr_code(CPUArchState *env, target_ulong addr) +{ + int mmu_idx, index, pd; + void *p; + MemoryRegion *mr; + CPUState *cpu =3D ENV_GET_CPU(env); + CPUIOTLBEntry *iotlbentry; + + index =3D (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); + mmu_idx =3D cpu_mmu_index(env, true); + if (unlikely(env->tlb_table[mmu_idx][index].addr_code !=3D + (addr & TARGET_PAGE_MASK))) { + cpu_ldub_code(env, addr); + } + iotlbentry =3D &env->iotlb[mmu_idx][index]; + pd =3D iotlbentry->addr & ~TARGET_PAGE_MASK; + mr =3D iotlb_to_region(cpu, pd, iotlbentry->attrs); + if (memory_region_is_unassigned(mr)) { + cpu_unassigned_access(cpu, addr, false, true, 0, 4); + /* The CPU's unassigned access hook might have longjumped out + * with an exception. If it didn't (or there was no hook) then + * we can't proceed further. + */ + report_bad_exec(cpu, addr); + exit(1); + } + p =3D (void *)((uintptr_t)addr + env->tlb_table[mmu_idx][index].addend= ); + return qemu_ram_addr_from_host_nofail(p); +} + /* Probe for whether the specified guest write access is permitted. * If it is not permitted then an exception will be taken in the same * way as if this were a real write access (and we will not return). --=20 1.8.3.1