From nobody Fri May 3 07:10:15 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1493202801382134.69889066637018; Wed, 26 Apr 2017 03:33:21 -0700 (PDT) Received: from localhost ([::1]:54080 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d3KG8-0002b0-5M for importer@patchew.org; Wed, 26 Apr 2017 06:33:20 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51972) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d3KBN-0006t6-35 for qemu-devel@nongnu.org; Wed, 26 Apr 2017 06:28:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d3KBL-0004LR-FK for qemu-devel@nongnu.org; Wed, 26 Apr 2017 06:28:24 -0400 Received: from mga03.intel.com ([134.134.136.65]:33549) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d3KBL-0004JF-2P for qemu-devel@nongnu.org; Wed, 26 Apr 2017 06:28:23 -0400 Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Apr 2017 03:28:22 -0700 Received: from sky-dev.bj.intel.com ([10.238.145.47]) by orsmga004.jf.intel.com with ESMTP; 26 Apr 2017 03:28:19 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.37,254,1488873600"; d="scan'208";a="80991964" From: "Liu, Yi L" To: kvm@vger.kernel.org, iommu@lists.linux-foundation.org, alex.williamson@redhat.com, peterx@redhat.com Date: Wed, 26 Apr 2017 18:11:58 +0800 Message-Id: <1493201525-14418-2-git-send-email-yi.l.liu@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1493201525-14418-1-git-send-email-yi.l.liu@intel.com> References: <1493201525-14418-1-git-send-email-yi.l.liu@intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.65 Subject: [Qemu-devel] [RFC PATCH 1/8] iommu: Introduce bind_pasid_table API function X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: tianyu.lan@intel.com, "Liu, Yi L" , kevin.tian@intel.com, yi.l.liu@intel.com, ashok.raj@intel.com, jean-philippe.brucker@arm.com, jasowang@redhat.com, qemu-devel@nongnu.org, Jacob Pan , jacob.jun.pan@intel.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Jacob Pan Virtual IOMMU was proposed to support Shared Virtual Memory (SVM) use case in the guest: https://lists.gnu.org/archive/html/qemu-devel/2016-11/msg05311.html As part of the proposed architecture, when a SVM capable PCI device is assigned to a guest, nested mode is turned on. Guest owns the first level page tables (request with PASID) and performs GVA->GPA translation. Second level page tables are owned by the host for GPA->HPA translation for both request with and without PASID. A new IOMMU driver interface is therefore needed to perform tasks as follows: * Enable nested translation and appropriate translation type * Assign guest PASID table pointer (in GPA) and size to host IOMMU This patch introduces new functions called iommu_(un)bind_pasid_table() to IOMMU APIs. Architecture specific IOMMU function can be added later to perform the specific steps for binding pasid table of assigned devices. This patch also adds model definition in iommu.h. It would be used to check if the bind request is from a compatible entity. e.g. a bind request from an intel_iommu emulator may not be supported by an ARM SMMU driver. Signed-off-by: Jacob Pan Signed-off-by: Liu, Yi L --- drivers/iommu/iommu.c | 19 +++++++++++++++++++ include/linux/iommu.h | 31 +++++++++++++++++++++++++++++++ 2 files changed, 50 insertions(+) diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index dbe7f65..f2da636 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -1134,6 +1134,25 @@ int iommu_attach_device(struct iommu_domain *domain,= struct device *dev) } EXPORT_SYMBOL_GPL(iommu_attach_device); =20 +int iommu_bind_pasid_table(struct iommu_domain *domain, struct device *dev, + struct pasid_table_info *pasidt_binfo) +{ + if (unlikely(!domain->ops->bind_pasid_table)) + return -EINVAL; + + return domain->ops->bind_pasid_table(domain, dev, pasidt_binfo); +} +EXPORT_SYMBOL_GPL(iommu_bind_pasid_table); + +int iommu_unbind_pasid_table(struct iommu_domain *domain, struct device *d= ev) +{ + if (unlikely(!domain->ops->unbind_pasid_table)) + return -EINVAL; + + return domain->ops->unbind_pasid_table(domain, dev); +} +EXPORT_SYMBOL_GPL(iommu_unbind_pasid_table); + static void __iommu_detach_device(struct iommu_domain *domain, struct device *dev) { diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 0ff5111..491a011 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -131,6 +131,15 @@ struct iommu_dm_region { int prot; }; =20 +struct pasid_table_info { + __u64 ptr; /* PASID table ptr */ + __u64 size; /* PASID table size*/ + __u32 model; /* magic number */ +#define INTEL_IOMMU (1 << 0) +#define ARM_SMMU (1 << 1) + __u8 opaque[];/* IOMMU-specific details */ +}; + #ifdef CONFIG_IOMMU_API =20 /** @@ -159,6 +168,8 @@ struct iommu_dm_region { * @domain_get_windows: Return the number of windows for a domain * @of_xlate: add OF master IDs to iommu grouping * @pgsize_bitmap: bitmap of all possible supported page sizes + * @bind_pasid_table: bind pasid table pointer for guest SVM + * @unbind_pasid_table: unbind pasid table pointer and restore defaults */ struct iommu_ops { bool (*capable)(enum iommu_cap); @@ -200,6 +211,10 @@ struct iommu_ops { u32 (*domain_get_windows)(struct iommu_domain *domain); =20 int (*of_xlate)(struct device *dev, struct of_phandle_args *args); + int (*bind_pasid_table)(struct iommu_domain *domain, struct device *dev, + struct pasid_table_info *pasidt_binfo); + int (*unbind_pasid_table)(struct iommu_domain *domain, + struct device *dev); =20 unsigned long pgsize_bitmap; }; @@ -221,6 +236,10 @@ extern int iommu_attach_device(struct iommu_domain *do= main, struct device *dev); extern void iommu_detach_device(struct iommu_domain *domain, struct device *dev); +extern int iommu_bind_pasid_table(struct iommu_domain *domain, + struct device *dev, struct pasid_table_info *pasidt_binfo); +extern int iommu_unbind_pasid_table(struct iommu_domain *domain, + struct device *dev); extern struct iommu_domain *iommu_get_domain_for_dev(struct device *dev); extern int iommu_map(struct iommu_domain *domain, unsigned long iova, phys_addr_t paddr, size_t size, int prot); @@ -595,6 +614,18 @@ const struct iommu_ops *iommu_get_instance(struct fwno= de_handle *fwnode) return NULL; } =20 +static inline +int iommu_bind_pasid_table(struct iommu_domain *domain, struct device *dev, + struct pasid_table_info *pasidt_binfo) +{ + return -EINVAL; +} +static inline +int iommu_unbind_pasid_table(struct iommu_domain *domain, struct device *d= ev) +{ + return -EINVAL; +} + #endif /* CONFIG_IOMMU_API */ =20 #endif /* __LINUX_IOMMU_H */ --=20 1.9.1 From nobody Fri May 3 07:10:15 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1493203484418570.2425355104858; Wed, 26 Apr 2017 03:44:44 -0700 (PDT) Received: from localhost ([::1]:54176 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d3KR9-0004Ul-BU for importer@patchew.org; Wed, 26 Apr 2017 06:44:43 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52020) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d3KBU-00070r-US for qemu-devel@nongnu.org; Wed, 26 Apr 2017 06:28:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d3KBP-0004Oe-Ui for qemu-devel@nongnu.org; Wed, 26 Apr 2017 06:28:32 -0400 Received: from mga03.intel.com ([134.134.136.65]:33549) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d3KBP-0004JF-I8 for qemu-devel@nongnu.org; Wed, 26 Apr 2017 06:28:27 -0400 Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Apr 2017 03:28:27 -0700 Received: from sky-dev.bj.intel.com ([10.238.145.47]) by orsmga004.jf.intel.com with ESMTP; 26 Apr 2017 03:28:24 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.37,254,1488873600"; d="scan'208";a="80991975" From: "Liu, Yi L" To: kvm@vger.kernel.org, iommu@lists.linux-foundation.org, alex.williamson@redhat.com, peterx@redhat.com Date: Wed, 26 Apr 2017 18:11:59 +0800 Message-Id: <1493201525-14418-3-git-send-email-yi.l.liu@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1493201525-14418-1-git-send-email-yi.l.liu@intel.com> References: <1493201525-14418-1-git-send-email-yi.l.liu@intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.65 Subject: [Qemu-devel] [RFC PATCH 2/8] iommu/vt-d: add bind_pasid_table function X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: tianyu.lan@intel.com, "Liu, Yi L" , kevin.tian@intel.com, yi.l.liu@intel.com, ashok.raj@intel.com, jean-philippe.brucker@arm.com, jasowang@redhat.com, qemu-devel@nongnu.org, Jacob Pan , jacob.jun.pan@intel.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Jacob Pan Add Intel VT-d ops to the generic iommu_bind_pasid_table API functions. The primary use case is for direct assignment of SVM capable device. Originated from emulated IOMMU in the guest, the request goes through many layers (e.g. VFIO). Upon calling host IOMMU driver, caller passes guest PASID table pointer (GPA) and size. Device context table entry is modified by Intel IOMMU specific bind_pasid_table function. This will turn on nesting mode and matching translation type. The unbind operation restores default context mapping. Signed-off-by: Jacob Pan Signed-off-by: Liu, Yi L --- drivers/iommu/intel-iommu.c | 103 ++++++++++++++++++++++++++++++++++++++= ++++ include/linux/dma_remapping.h | 1 + 2 files changed, 104 insertions(+) diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c index 646756c..6d5b939 100644 --- a/drivers/iommu/intel-iommu.c +++ b/drivers/iommu/intel-iommu.c @@ -5306,6 +5306,105 @@ struct intel_iommu *intel_svm_device_to_iommu(struc= t device *dev) =20 return iommu; } + +static int intel_iommu_bind_pasid_table(struct iommu_domain *domain, + struct device *dev, struct pasid_table_info *pasidt_binfo) +{ + struct intel_iommu *iommu; + struct context_entry *context; + struct dmar_domain *dmar_domain =3D to_dmar_domain(domain); + struct device_domain_info *info; + u8 bus, devfn; + u16 did, *sid; + int ret =3D 0; + unsigned long flags; + u64 ctx_lo; + + if (pasidt_binfo =3D=3D NULL || pasidt_binfo->model !=3D INTEL_IOMMU) { + pr_warn("%s: Invalid bind request!\n", __func__); + return -EINVAL; + } + + iommu =3D device_to_iommu(dev, &bus, &devfn); + if (!iommu) + return -ENODEV; + + sid =3D (u16 *)&pasidt_binfo->opaque; + /* check SID, if it is not correct, return */ + if (PCI_DEVID(bus, devfn) !=3D *sid) + return 0; + + info =3D dev->archdata.iommu; + if (!info || !info->pasid_supported) { + pr_err("Device %d:%d.%d has no pasid support\n", bus, + PCI_SLOT(devfn), PCI_FUNC(devfn)); + ret =3D -EINVAL; + goto out; + } + + if (pasidt_binfo->size >=3D intel_iommu_get_pts(iommu)) { + pr_err("Invalid gPASID table size %llu, host size %lu\n", + pasidt_binfo->size, + intel_iommu_get_pts(iommu)); + ret =3D -EINVAL; + goto out; + } + spin_lock_irqsave(&iommu->lock, flags); + context =3D iommu_context_addr(iommu, bus, devfn, 0); + if (!context || !context_present(context)) { + pr_warn("%s: ctx not present for bus devfn %x:%x\n", + __func__, bus, devfn); + spin_unlock_irqrestore(&iommu->lock, flags); + goto out; + } + /* Anticipate guest to use SVM and owns the first level */ + ctx_lo =3D context[0].lo; + ctx_lo |=3D CONTEXT_NESTE; + ctx_lo |=3D CONTEXT_PRS; + ctx_lo |=3D CONTEXT_PASIDE; + ctx_lo &=3D ~CONTEXT_TT_MASK; + ctx_lo |=3D CONTEXT_TT_DEV_IOTLB << 2; + context[0].lo =3D ctx_lo; + + /* Assign guest PASID table pointer and size */ + ctx_lo =3D (pasidt_binfo->ptr & VTD_PAGE_MASK) | pasidt_binfo->size; + context[1].lo =3D ctx_lo; + /* make sure context entry is updated before flushing */ + wmb(); + did =3D dmar_domain->iommu_did[iommu->seq_id]; + iommu->flush.flush_context(iommu, did, + (((u16)bus) << 8) | devfn, + DMA_CCMD_MASK_NOBIT, + DMA_CCMD_DEVICE_INVL); + iommu->flush.flush_iotlb(iommu, did, 0, 0, DMA_TLB_DSI_FLUSH); + spin_unlock_irqrestore(&iommu->lock, flags); + + +out: + return ret; +} + +static int intel_iommu_unbind_pasid_table(struct iommu_domain *domain, + struct device *dev) +{ + struct intel_iommu *iommu; + struct dmar_domain *dmar_domain =3D to_dmar_domain(domain); + u8 bus, devfn; + + iommu =3D device_to_iommu(dev, &bus, &devfn); + if (!iommu) + return -ENODEV; + /* + * REVISIT: we might want to clear the PASID table pointer + * as part of context clear operation. Currently, it leaves + * stale data but should be ignored by hardware since PASIDE + * is clear. + */ + /* ATS will be reenabled when remapping is restored */ + pci_disable_ats(to_pci_dev(dev)); + domain_context_clear(iommu, dev); + return domain_context_mapping_one(dmar_domain, iommu, bus, devfn); +} #endif /* CONFIG_INTEL_IOMMU_SVM */ =20 static const struct iommu_ops intel_iommu_ops =3D { @@ -5314,6 +5413,10 @@ struct intel_iommu *intel_svm_device_to_iommu(struct= device *dev) .domain_free =3D intel_iommu_domain_free, .attach_dev =3D intel_iommu_attach_device, .detach_dev =3D intel_iommu_detach_device, +#ifdef CONFIG_INTEL_IOMMU_SVM + .bind_pasid_table =3D intel_iommu_bind_pasid_table, + .unbind_pasid_table =3D intel_iommu_unbind_pasid_table, +#endif .map =3D intel_iommu_map, .unmap =3D intel_iommu_unmap, .map_sg =3D default_iommu_map_sg, diff --git a/include/linux/dma_remapping.h b/include/linux/dma_remapping.h index 187c102..c03b62a 100644 --- a/include/linux/dma_remapping.h +++ b/include/linux/dma_remapping.h @@ -27,6 +27,7 @@ =20 #define CONTEXT_DINVE (1ULL << 8) #define CONTEXT_PRS (1ULL << 9) +#define CONTEXT_NESTE (1ULL << 10) #define CONTEXT_PASIDE (1ULL << 11) =20 struct intel_iommu; --=20 1.9.1 From nobody Fri May 3 07:10:15 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 149320296294367.18563306755675; Wed, 26 Apr 2017 03:36:02 -0700 (PDT) Received: from localhost ([::1]:54097 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d3KIj-0004jt-MW for importer@patchew.org; Wed, 26 Apr 2017 06:36:01 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52042) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d3KBW-00072E-Cl for qemu-devel@nongnu.org; Wed, 26 Apr 2017 06:28:35 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d3KBV-0004Pr-CD for qemu-devel@nongnu.org; Wed, 26 Apr 2017 06:28:34 -0400 Received: from mga03.intel.com ([134.134.136.65]:33549) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d3KBV-0004JF-33 for qemu-devel@nongnu.org; Wed, 26 Apr 2017 06:28:33 -0400 Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Apr 2017 03:28:32 -0700 Received: from sky-dev.bj.intel.com ([10.238.145.47]) by orsmga004.jf.intel.com with ESMTP; 26 Apr 2017 03:28:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.37,254,1488873600"; d="scan'208";a="80991987" From: "Liu, Yi L" To: kvm@vger.kernel.org, iommu@lists.linux-foundation.org, alex.williamson@redhat.com, peterx@redhat.com Date: Wed, 26 Apr 2017 18:12:00 +0800 Message-Id: <1493201525-14418-4-git-send-email-yi.l.liu@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1493201525-14418-1-git-send-email-yi.l.liu@intel.com> References: <1493201525-14418-1-git-send-email-yi.l.liu@intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.65 Subject: [Qemu-devel] [RFC PATCH 3/8] iommu: Introduce iommu do invalidate API function X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: tianyu.lan@intel.com, "Liu, Yi L" , kevin.tian@intel.com, yi.l.liu@intel.com, ashok.raj@intel.com, jean-philippe.brucker@arm.com, jasowang@redhat.com, qemu-devel@nongnu.org, Jacob Pan , jacob.jun.pan@intel.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: "Liu, Yi L" When a SVM capable device is assigned to a guest, the first level page tables are owned by the guest and the guest PASID table pointer is linked to the device context entry of the physical IOMMU. Host IOMMU driver has no knowledge of caching structure updates unless the guest invalidation activities are passed down to the host. The primary usage is derived from emulated IOMMU in the guest, where QEMU can trap invalidation activities before pass them down the host/physical IOMMU. There are IOMMU architectural specific actions need to be taken which requires the generic APIs introduced in this patch to have opaque data in the tlb_invalidate_info argument. Signed-off-by: Liu, Yi L Signed-off-by: Jacob Pan --- drivers/iommu/iommu.c | 13 +++++++++++++ include/linux/iommu.h | 16 ++++++++++++++++ 2 files changed, 29 insertions(+) diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index f2da636..ca7cff2 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -1153,6 +1153,19 @@ int iommu_unbind_pasid_table(struct iommu_domain *do= main, struct device *dev) } EXPORT_SYMBOL_GPL(iommu_unbind_pasid_table); =20 +int iommu_do_invalidate(struct iommu_domain *domain, + struct device *dev, struct tlb_invalidate_info *inv_info) +{ + int ret =3D 0; + + if (unlikely(domain->ops->do_invalidate =3D=3D NULL)) + return -ENODEV; + + ret =3D domain->ops->do_invalidate(domain, dev, inv_info); + return ret; +} +EXPORT_SYMBOL_GPL(iommu_do_invalidate); + static void __iommu_detach_device(struct iommu_domain *domain, struct device *dev) { diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 491a011..a48e3b75 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -140,6 +140,11 @@ struct pasid_table_info { __u8 opaque[];/* IOMMU-specific details */ }; =20 +struct tlb_invalidate_info { + __u32 model; + __u8 opaque[]; +}; + #ifdef CONFIG_IOMMU_API =20 /** @@ -215,6 +220,8 @@ struct iommu_ops { struct pasid_table_info *pasidt_binfo); int (*unbind_pasid_table)(struct iommu_domain *domain, struct device *dev); + int (*do_invalidate)(struct iommu_domain *domain, + struct device *dev, struct tlb_invalidate_info *inv_info); =20 unsigned long pgsize_bitmap; }; @@ -240,6 +247,9 @@ extern int iommu_bind_pasid_table(struct iommu_domain *= domain, struct device *dev, struct pasid_table_info *pasidt_binfo); extern int iommu_unbind_pasid_table(struct iommu_domain *domain, struct device *dev); +extern int iommu_do_invalidate(struct iommu_domain *domain, + struct device *dev, struct tlb_invalidate_info *inv_info); + extern struct iommu_domain *iommu_get_domain_for_dev(struct device *dev); extern int iommu_map(struct iommu_domain *domain, unsigned long iova, phys_addr_t paddr, size_t size, int prot); @@ -626,6 +636,12 @@ int iommu_unbind_pasid_table(struct iommu_domain *doma= in, struct device *dev) return -EINVAL; } =20 +static inline int iommu_do_invalidate(struct iommu_domain *domain, + struct device *dev, struct tlb_invalidate_info *inv_info) +{ + return -EINVAL; +} + #endif /* CONFIG_IOMMU_API */ =20 #endif /* __LINUX_IOMMU_H */ --=20 1.9.1 From nobody Fri May 3 07:10:15 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 149320363964833.79449925090444; Wed, 26 Apr 2017 03:47:19 -0700 (PDT) Received: from localhost ([::1]:54194 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d3KTe-0006cL-GX for importer@patchew.org; Wed, 26 Apr 2017 06:47:18 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52065) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d3KBa-000763-4S for qemu-devel@nongnu.org; Wed, 26 Apr 2017 06:28:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d3KBY-0004Qs-Vc for qemu-devel@nongnu.org; Wed, 26 Apr 2017 06:28:38 -0400 Received: from mga03.intel.com ([134.134.136.65]:33549) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d3KBY-0004JF-I3 for qemu-devel@nongnu.org; Wed, 26 Apr 2017 06:28:36 -0400 Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Apr 2017 03:28:36 -0700 Received: from sky-dev.bj.intel.com ([10.238.145.47]) by orsmga004.jf.intel.com with ESMTP; 26 Apr 2017 03:28:33 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.37,254,1488873600"; d="scan'208";a="80991998" From: "Liu, Yi L" To: kvm@vger.kernel.org, iommu@lists.linux-foundation.org, alex.williamson@redhat.com, peterx@redhat.com Date: Wed, 26 Apr 2017 18:12:01 +0800 Message-Id: <1493201525-14418-5-git-send-email-yi.l.liu@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1493201525-14418-1-git-send-email-yi.l.liu@intel.com> References: <1493201525-14418-1-git-send-email-yi.l.liu@intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.65 Subject: [Qemu-devel] [RFC PATCH 4/8] iommu/vt-d: Add iommu do invalidate function X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: tianyu.lan@intel.com, "Liu, Yi L" , kevin.tian@intel.com, yi.l.liu@intel.com, ashok.raj@intel.com, jean-philippe.brucker@arm.com, jasowang@redhat.com, qemu-devel@nongnu.org, Jacob Pan , jacob.jun.pan@intel.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Jacob Pan This patch adds Intel VT-d specific function to implement iommu_do_invalidate API. The use case is for supporting caching structure invalidation of assigned SVM capable devices. Emulated IOMMU exposes queue invalidation capability and passes down all descriptors from the guest to the physical IOMMU. The assumption is that guest to host device ID mapping should be resolved prior to calling IOMMU driver. Based on the device handle, host IOMMU driver can replace certain fields before submit to the invalidation queue. Signed-off-by: Liu, Yi L Signed-off-by: Jacob Pan --- drivers/iommu/intel-iommu.c | 43 +++++++++++++++++++++++++++++++++++++++++= ++ include/linux/intel-iommu.h | 11 +++++++++++ 2 files changed, 54 insertions(+) diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c index 6d5b939..0b098ad 100644 --- a/drivers/iommu/intel-iommu.c +++ b/drivers/iommu/intel-iommu.c @@ -5042,6 +5042,48 @@ static void intel_iommu_detach_device(struct iommu_d= omain *domain, dmar_remove_one_dev_info(to_dmar_domain(domain), dev); } =20 +static int intel_iommu_do_invalidate(struct iommu_domain *domain, + struct device *dev, struct tlb_invalidate_info *inv_info) +{ + int ret =3D 0; + struct intel_iommu *iommu; + struct dmar_domain *dmar_domain =3D to_dmar_domain(domain); + struct intel_invalidate_data *inv_data; + struct qi_desc *qi; + u16 did; + u8 bus, devfn; + + if (!inv_info || !dmar_domain || (inv_info->model !=3D INTEL_IOMMU)) + return -EINVAL; + + iommu =3D device_to_iommu(dev, &bus, &devfn); + if (!iommu) + return -ENODEV; + + inv_data =3D (struct intel_invalidate_data *)&inv_info->opaque; + + /* check SID */ + if (PCI_DEVID(bus, devfn) !=3D inv_data->sid) + return 0; + + qi =3D &inv_data->inv_desc; + + switch (qi->low & QI_TYPE_MASK) { + case QI_DIOTLB_TYPE: + case QI_DEIOTLB_TYPE: + /* for device IOTLB, we just let it pass through */ + break; + default: + did =3D dmar_domain->iommu_did[iommu->seq_id]; + set_mask_bits(&qi->low, QI_DID_MASK, QI_DID(did)); + break; + } + + ret =3D qi_submit_sync(qi, iommu); + + return ret; +} + static int intel_iommu_map(struct iommu_domain *domain, unsigned long iova, phys_addr_t hpa, size_t size, int iommu_prot) @@ -5416,6 +5458,7 @@ static int intel_iommu_unbind_pasid_table(struct iomm= u_domain *domain, #ifdef CONFIG_INTEL_IOMMU_SVM .bind_pasid_table =3D intel_iommu_bind_pasid_table, .unbind_pasid_table =3D intel_iommu_unbind_pasid_table, + .do_invalidate =3D intel_iommu_do_invalidate, #endif .map =3D intel_iommu_map, .unmap =3D intel_iommu_unmap, diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h index ac04f28..9d6562c 100644 --- a/include/linux/intel-iommu.h +++ b/include/linux/intel-iommu.h @@ -29,6 +29,7 @@ #include #include #include +#include #include #include =20 @@ -271,6 +272,10 @@ enum { #define QI_PGRP_RESP_TYPE 0x9 #define QI_PSTRM_RESP_TYPE 0xa =20 +#define QI_DID(did) (((u64)did & 0xffff) << 16) +#define QI_DID_MASK GENMASK(31, 16) +#define QI_TYPE_MASK GENMASK(3, 0) + #define QI_IEC_SELECTIVE (((u64)1) << 4) #define QI_IEC_IIDEX(idx) (((u64)(idx & 0xffff) << 32)) #define QI_IEC_IM(m) (((u64)(m & 0x1f) << 27)) @@ -529,6 +534,12 @@ struct intel_svm { extern struct intel_iommu *intel_svm_device_to_iommu(struct device *dev); #endif =20 +struct intel_invalidate_data { + u16 sid; + u32 pasid; + struct qi_desc inv_desc; +}; + extern const struct attribute_group *intel_iommu_groups[]; extern void intel_iommu_debugfs_init(void); extern struct context_entry *iommu_context_addr(struct intel_iommu *iommu, --=20 1.9.1 From nobody Fri May 3 07:10:15 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 14932033871289.558392589537107; Wed, 26 Apr 2017 03:43:07 -0700 (PDT) Received: from localhost ([::1]:54151 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d3KPa-00038P-2a for importer@patchew.org; Wed, 26 Apr 2017 06:43:06 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52097) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d3KBf-0007AP-6E for qemu-devel@nongnu.org; Wed, 26 Apr 2017 06:28:44 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d3KBc-0004Rs-Qf for qemu-devel@nongnu.org; Wed, 26 Apr 2017 06:28:43 -0400 Received: from mga03.intel.com ([134.134.136.65]:33549) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d3KBc-0004JF-Hz for qemu-devel@nongnu.org; Wed, 26 Apr 2017 06:28:40 -0400 Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Apr 2017 03:28:40 -0700 Received: from sky-dev.bj.intel.com ([10.238.145.47]) by orsmga004.jf.intel.com with ESMTP; 26 Apr 2017 03:28:37 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.37,254,1488873600"; d="scan'208";a="80992009" From: "Liu, Yi L" To: kvm@vger.kernel.org, iommu@lists.linux-foundation.org, alex.williamson@redhat.com, peterx@redhat.com Date: Wed, 26 Apr 2017 18:12:02 +0800 Message-Id: <1493201525-14418-6-git-send-email-yi.l.liu@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1493201525-14418-1-git-send-email-yi.l.liu@intel.com> References: <1493201525-14418-1-git-send-email-yi.l.liu@intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.65 Subject: [Qemu-devel] [RFC PATCH 5/8] VFIO: Add new IOTCL for PASID Table bind propagation X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: tianyu.lan@intel.com, "Liu, Yi L" , kevin.tian@intel.com, yi.l.liu@intel.com, ashok.raj@intel.com, jean-philippe.brucker@arm.com, jasowang@redhat.com, qemu-devel@nongnu.org, jacob.jun.pan@intel.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: "Liu, Yi L" This patch adds VFIO_IOMMU_SVM_BIND_TASK for potential PASID table binding requests. On VT-d, this IOCTL cmd would be used to link the guest PASID page table to host. While for other vendors, it may also be used to support other kind of SVM bind request. Previously, there is a discussion on it with ARM engineer. It can be found by the link below. This IOCTL cmd may support SVM PASID bind request from userspace driver, or page table(cr3) bind request from guest. These SVM bind requests would be supported by adding different flags. e.g. VFIO_SVM_BIND_PASID is added to support PASID bind from userspace driver, VFIO_SVM_BIND_PGTABLE is added to support page table bind from guest. https://patchwork.kernel.org/patch/9594231/ Signed-off-by: Liu, Yi L --- include/uapi/linux/vfio.h | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/include/uapi/linux/vfio.h b/include/uapi/linux/vfio.h index 519eff3..6b97987 100644 --- a/include/uapi/linux/vfio.h +++ b/include/uapi/linux/vfio.h @@ -547,6 +547,23 @@ struct vfio_iommu_type1_dma_unmap { #define VFIO_IOMMU_ENABLE _IO(VFIO_TYPE, VFIO_BASE + 15) #define VFIO_IOMMU_DISABLE _IO(VFIO_TYPE, VFIO_BASE + 16) =20 +/* IOCTL for Shared Virtual Memory Bind */ +struct vfio_device_svm { + __u32 argsz; +#define VFIO_SVM_BIND_PASIDTBL (1 << 0) /* Bind PASID Table */ +#define VFIO_SVM_BIND_PASID (1 << 1) /* Bind PASID from userspace driver */ +#define VFIO_SVM_BIND_PGTABLE (1 << 2) /* Bind guest mmu page table */ + __u32 flags; + __u32 length; + __u8 data[]; +}; + +#define VFIO_SVM_TYPE_MASK (VFIO_SVM_BIND_PASIDTBL | \ + VFIO_SVM_BIND_PASID | \ + VFIO_SVM_BIND_PGTABLE) + +#define VFIO_IOMMU_SVM_BIND_TASK _IO(VFIO_TYPE, VFIO_BASE + 22) + /* -------- Additional API for SPAPR TCE (Server POWERPC) IOMMU -------- */ =20 /* --=20 1.9.1 From nobody Fri May 3 07:10:15 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1493203052984842.9521517561045; Wed, 26 Apr 2017 03:37:32 -0700 (PDT) Received: from localhost ([::1]:54109 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d3KKB-00062g-SO for importer@patchew.org; Wed, 26 Apr 2017 06:37:31 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52117) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d3KBh-0007CW-Ha for qemu-devel@nongnu.org; Wed, 26 Apr 2017 06:28:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d3KBg-0004TO-K6 for qemu-devel@nongnu.org; Wed, 26 Apr 2017 06:28:45 -0400 Received: from mga03.intel.com ([134.134.136.65]:33549) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d3KBg-0004JF-Ap for qemu-devel@nongnu.org; Wed, 26 Apr 2017 06:28:44 -0400 Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Apr 2017 03:28:43 -0700 Received: from sky-dev.bj.intel.com ([10.238.145.47]) by orsmga004.jf.intel.com with ESMTP; 26 Apr 2017 03:28:41 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.37,254,1488873600"; d="scan'208";a="80992017" From: "Liu, Yi L" To: kvm@vger.kernel.org, iommu@lists.linux-foundation.org, alex.williamson@redhat.com, peterx@redhat.com Date: Wed, 26 Apr 2017 18:12:03 +0800 Message-Id: <1493201525-14418-7-git-send-email-yi.l.liu@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1493201525-14418-1-git-send-email-yi.l.liu@intel.com> References: <1493201525-14418-1-git-send-email-yi.l.liu@intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.65 Subject: [Qemu-devel] [RFC PATCH 6/8] VFIO: do pasid table binding X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: tianyu.lan@intel.com, "Liu, Yi L" , kevin.tian@intel.com, yi.l.liu@intel.com, ashok.raj@intel.com, jean-philippe.brucker@arm.com, jasowang@redhat.com, qemu-devel@nongnu.org, jacob.jun.pan@intel.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: "Liu, Yi L" This patch adds IOCTL processing in vfio_iommu_type1 for VFIO_IOMMU_SVM_BIND_TASK. Binds the PASID table bind by calling iommu_ops->bind_pasid_table to link the whole PASID table to pIOMMU. For VT-d, it is linking the guest PASID table to host pIOMMU. This is key point to support SVM virtualization on VT-d. Signed-off-by: Liu, Yi L --- drivers/vfio/vfio_iommu_type1.c | 72 +++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 72 insertions(+) diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type= 1.c index b3cc33f..30b6d48 100644 --- a/drivers/vfio/vfio_iommu_type1.c +++ b/drivers/vfio/vfio_iommu_type1.c @@ -1512,6 +1512,50 @@ static int vfio_domains_have_iommu_cache(struct vfio= _iommu *iommu) return ret; } =20 +struct vfio_svm_task { + struct iommu_domain *domain; + void *payload; +}; + +static int bind_pasid_tbl_fn(struct device *dev, void *data) +{ + int ret =3D 0; + struct vfio_svm_task *task =3D data; + struct pasid_table_info *pasidt_binfo; + + pasidt_binfo =3D task->payload; + ret =3D iommu_bind_pasid_table(task->domain, dev, pasidt_binfo); + return ret; +} + +static int vfio_do_svm_task(struct vfio_iommu *iommu, void *data, + int (*fn)(struct device *, void *)) +{ + int ret =3D 0; + struct vfio_domain *d; + struct vfio_group *g; + struct vfio_svm_task task; + + task.payload =3D data; + + mutex_lock(&iommu->lock); + + list_for_each_entry(d, &iommu->domain_list, next) { + list_for_each_entry(g, &d->group_list, next) { + if (g->iommu_group !=3D NULL) { + task.domain =3D d->domain; + ret =3D iommu_group_for_each_dev( + g->iommu_group, &task, fn); + if (ret !=3D 0) + break; + } + } + } + + mutex_unlock(&iommu->lock); + return ret; +} + static long vfio_iommu_type1_ioctl(void *iommu_data, unsigned int cmd, unsigned long arg) { @@ -1582,6 +1626,34 @@ static long vfio_iommu_type1_ioctl(void *iommu_data, =20 return copy_to_user((void __user *)arg, &unmap, minsz) ? -EFAULT : 0; + } else if (cmd =3D=3D VFIO_IOMMU_SVM_BIND_TASK) { + struct vfio_device_svm hdr; + u8 *data =3D NULL; + int ret =3D 0; + + minsz =3D offsetofend(struct vfio_device_svm, length); + if (copy_from_user(&hdr, (void __user *)arg, minsz)) + return -EFAULT; + + if (hdr.length =3D=3D 0) + return -EINVAL; + + data =3D memdup_user((void __user *)(arg + minsz), + hdr.length); + if (IS_ERR(data)) + return PTR_ERR(data); + + switch (hdr.flags & VFIO_SVM_TYPE_MASK) { + case VFIO_SVM_BIND_PASIDTBL: + ret =3D vfio_do_svm_task(iommu, data, + bind_pasid_tbl_fn); + break; + default: + ret =3D -EINVAL; + break; + } + kfree(data); + return ret; } =20 return -ENOTTY; --=20 1.9.1 From nobody Fri May 3 07:10:15 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1493203112258524.4274685919619; Wed, 26 Apr 2017 03:38:32 -0700 (PDT) Received: from localhost ([::1]:54111 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d3KL7-0006rq-6r for importer@patchew.org; Wed, 26 Apr 2017 06:38:29 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52155) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d3KBl-0007GD-Jx for qemu-devel@nongnu.org; Wed, 26 Apr 2017 06:28:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d3KBk-0004Um-N1 for qemu-devel@nongnu.org; Wed, 26 Apr 2017 06:28:49 -0400 Received: from mga03.intel.com ([134.134.136.65]:33549) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d3KBk-0004JF-D9 for qemu-devel@nongnu.org; Wed, 26 Apr 2017 06:28:48 -0400 Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Apr 2017 03:28:47 -0700 Received: from sky-dev.bj.intel.com ([10.238.145.47]) by orsmga004.jf.intel.com with ESMTP; 26 Apr 2017 03:28:45 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.37,254,1488873600"; d="scan'208";a="80992050" From: "Liu, Yi L" To: kvm@vger.kernel.org, iommu@lists.linux-foundation.org, alex.williamson@redhat.com, peterx@redhat.com Date: Wed, 26 Apr 2017 18:12:04 +0800 Message-Id: <1493201525-14418-8-git-send-email-yi.l.liu@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1493201525-14418-1-git-send-email-yi.l.liu@intel.com> References: <1493201525-14418-1-git-send-email-yi.l.liu@intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.65 Subject: [Qemu-devel] [RFC PATCH 7/8] VFIO: Add new IOCTL for IOMMU TLB invalidate propagation X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: tianyu.lan@intel.com, "Liu, Yi L" , kevin.tian@intel.com, yi.l.liu@intel.com, ashok.raj@intel.com, jean-philippe.brucker@arm.com, jasowang@redhat.com, qemu-devel@nongnu.org, jacob.jun.pan@intel.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: "Liu, Yi L" This patch adds VFIO_IOMMU_TLB_INVALIDATE to propagate IOMMU TLB invalidate request from guest to host. In the case of SVM virtualization on VT-d, host IOMMU driver has no knowledge of caching structure updates unless the guest invalidation activities are passed down to the host. So a new IOCTL is needed to propagate the guest cache invalidation through VFIO. Signed-off-by: Liu, Yi L --- include/uapi/linux/vfio.h | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/include/uapi/linux/vfio.h b/include/uapi/linux/vfio.h index 6b97987..50c51f8 100644 --- a/include/uapi/linux/vfio.h +++ b/include/uapi/linux/vfio.h @@ -564,6 +564,15 @@ struct vfio_device_svm { =20 #define VFIO_IOMMU_SVM_BIND_TASK _IO(VFIO_TYPE, VFIO_BASE + 22) =20 +/* For IOMMU TLB Invalidation Propagation */ +struct vfio_iommu_tlb_invalidate { + __u32 argsz; + __u32 length; + __u8 data[]; +}; + +#define VFIO_IOMMU_TLB_INVALIDATE _IO(VFIO_TYPE, VFIO_BASE + 23) + /* -------- Additional API for SPAPR TCE (Server POWERPC) IOMMU -------- */ =20 /* --=20 1.9.1 From nobody Fri May 3 07:10:15 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1493203799177325.36912175940563; Wed, 26 Apr 2017 03:49:59 -0700 (PDT) Received: from localhost ([::1]:54207 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d3KWE-0000Nz-0Z for importer@patchew.org; Wed, 26 Apr 2017 06:49:58 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52202) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d3KBq-0007KR-Ko for qemu-devel@nongnu.org; Wed, 26 Apr 2017 06:28:55 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d3KBo-0004YD-LA for qemu-devel@nongnu.org; Wed, 26 Apr 2017 06:28:54 -0400 Received: from mga03.intel.com ([134.134.136.65]:33549) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d3KBo-0004JF-9h for qemu-devel@nongnu.org; Wed, 26 Apr 2017 06:28:52 -0400 Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Apr 2017 03:28:51 -0700 Received: from sky-dev.bj.intel.com ([10.238.145.47]) by orsmga004.jf.intel.com with ESMTP; 26 Apr 2017 03:28:49 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.37,254,1488873600"; d="scan'208";a="80992061" From: "Liu, Yi L" To: kvm@vger.kernel.org, iommu@lists.linux-foundation.org, alex.williamson@redhat.com, peterx@redhat.com Date: Wed, 26 Apr 2017 18:12:05 +0800 Message-Id: <1493201525-14418-9-git-send-email-yi.l.liu@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1493201525-14418-1-git-send-email-yi.l.liu@intel.com> References: <1493201525-14418-1-git-send-email-yi.l.liu@intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.65 Subject: [Qemu-devel] [RFC PATCH 8/8] VFIO: do IOMMU TLB invalidation from guest X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: tianyu.lan@intel.com, "Liu, Yi L" , kevin.tian@intel.com, yi.l.liu@intel.com, ashok.raj@intel.com, jean-philippe.brucker@arm.com, jasowang@redhat.com, qemu-devel@nongnu.org, jacob.jun.pan@intel.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: "Liu, Yi L" This patch adds support for VFIO_IOMMU_TLB_INVALIDATE cmd in vfio_iommu_type1. For SVM virtualization on VT-d, for VFIO_IOMMU_TLB_INVALIDATE, it calls iommu_ops->do_invalidate() to submit the guest iommu cache invalidation to pIOMMU. Signed-off-by: Liu, Yi L --- drivers/vfio/vfio_iommu_type1.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type= 1.c index 30b6d48..6cebdfd 100644 --- a/drivers/vfio/vfio_iommu_type1.c +++ b/drivers/vfio/vfio_iommu_type1.c @@ -1528,6 +1528,17 @@ static int bind_pasid_tbl_fn(struct device *dev, voi= d *data) return ret; } =20 +static int do_tlb_inv_fn(struct device *dev, void *data) +{ + int ret =3D 0; + struct vfio_svm_task *task =3D data; + struct tlb_invalidate_info *inv_info; + + inv_info =3D task->payload; + ret =3D iommu_do_invalidate(task->domain, dev, inv_info); + return ret; +} + static int vfio_do_svm_task(struct vfio_iommu *iommu, void *data, int (*fn)(struct device *, void *)) { @@ -1654,6 +1665,21 @@ static long vfio_iommu_type1_ioctl(void *iommu_data, } kfree(data); return ret; + } else if (cmd =3D=3D VFIO_IOMMU_TLB_INVALIDATE) { + struct vfio_iommu_tlb_invalidate hdr; + u8 *data =3D NULL; + int ret =3D 0; + + minsz =3D offsetofend(struct vfio_iommu_tlb_invalidate, length); + if (copy_from_user(&hdr, (void __user *)arg, minsz)) + return -EFAULT; + if (hdr.length =3D=3D 0) + return -EINVAL; + data =3D memdup_user((void __user *)(arg + minsz), + hdr.length); + ret =3D vfio_do_svm_task(iommu, data, do_tlb_inv_fn); + kfree(data); + return ret; } =20 return -ENOTTY; --=20 1.9.1