From nobody Tue Feb 10 01:14:42 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1493107490109650.1219635328669; Tue, 25 Apr 2017 01:04:50 -0700 (PDT) Received: from localhost ([::1]:47621 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d2vSq-0000B9-Uj for importer@patchew.org; Tue, 25 Apr 2017 04:04:48 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33998) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d2vIq-0008Ru-DW for qemu-devel@nongnu.org; Tue, 25 Apr 2017 03:54:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d2vIo-0000pV-Vu for qemu-devel@nongnu.org; Tue, 25 Apr 2017 03:54:28 -0400 Received: from out4-smtp.messagingengine.com ([66.111.4.28]:57589) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d2vIj-0000hA-Hx; Tue, 25 Apr 2017 03:54:21 -0400 Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.nyi.internal (Postfix) with ESMTP id 1572321F29; Tue, 25 Apr 2017 03:54:04 -0400 (EDT) Received: from frontend2 ([10.202.2.161]) by compute4.internal (MEProxy); Tue, 25 Apr 2017 03:54:05 -0400 Received: from localhost (flamenco.cs.columbia.edu [128.59.20.216]) by mail.messagingengine.com (Postfix) with ESMTPA id 563BB2479D; Tue, 25 Apr 2017 03:54:04 -0400 (EDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=braap.org; h=cc :date:from:in-reply-to:message-id:references:subject:to :x-me-sender:x-me-sender:x-sasl-enc:x-sasl-enc; s=mesmtp; bh=QVh YawXFcUi8j51QvHUGX9ciyL8i1T4rMyHNPFzXajU=; b=elZBUVy/8/fR5pQRfKV oOJyWf7uFR8bQSM2tVRbJrPnFSSkTRYyt6n1X4ibEoG5R++fBMNP84DFJWGveybp xJd5aZ5QkLIEFlGxhiDmLrD66X6DFjQDjZBLr2mRlmttvh8lG1P5YlJAIoMFDx4H 4VJgPzVP4ZPJl6N2QTfoqiUU= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:in-reply-to:message-id :references:subject:to:x-me-sender:x-me-sender:x-sasl-enc :x-sasl-enc; s=fm1; bh=QVhYawXFcUi8j51QvHUGX9ciyL8i1T4rMyHNPFzXa jU=; b=igjzmFXd8Et9DV5kC4Y8KkYE201ZuCS91+a0MFdNsDOFsNIevNr7KGlmU sOG6N1XsYcPl5KhSHq9uo6Z1S4UvNFosGyDAc09Q+eNTcjnKkInQg8dCQIbdjI+7 HiYDDjPeAhs5TDkKTNVPDZUzEnkssX45jsbIPmW+5bm+U8gCyNEqz6+HGvfoUG03 1wWSzm6F1zcYjuBLQvF8rGxaxRWuNER1Zu2jhk83mtDVCt6PyCyJib+uEumVBKCh KsPmYfNCe+E9k39wuWmPsE8U0JGx5NSv6ibkOZh9Vlrnjg/ATiXRs3yzFkvtwwDy cJhVYW7HLMRb2IB1CJMlF3Afn3bIA== X-ME-Sender: X-Sasl-enc: McDwcYoSOsrgn35+xydR3HgI4wlwRuVbhondrqX23xnS 1493106844 From: "Emilio G. Cota" To: qemu-devel@nongnu.org Date: Tue, 25 Apr 2017 03:53:52 -0400 Message-Id: <1493106839-10438-7-git-send-email-cota@braap.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1493106839-10438-1-git-send-email-cota@braap.org> References: <1493106839-10438-1-git-send-email-cota@braap.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 66.111.4.28 Subject: [Qemu-devel] [PATCH v2 06/13] tcg: add goto_ptr opcode X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Eduardo Habkost , Peter Crosthwaite , Stefan Weil , Alexander Graf , alex.bennee@linaro.org, qemu-arm@nongnu.org, Pranith Kumar , Paolo Bonzini , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Emilio G. Cota --- tcg/README | 11 +++++++++++ tcg/aarch64/tcg-target.h | 1 + tcg/arm/tcg-target.h | 1 + tcg/i386/tcg-target.h | 1 + tcg/ia64/tcg-target.h | 1 + tcg/mips/tcg-target.h | 1 + tcg/ppc/tcg-target.h | 1 + tcg/s390/tcg-target.h | 1 + tcg/sparc/tcg-target.h | 1 + tcg/tcg-op.c | 9 +++++++++ tcg/tcg-op.h | 9 +++++++++ tcg/tcg-opc.h | 1 + tcg/tcg.c | 1 + tcg/tci/tcg-target.h | 1 + 14 files changed, 40 insertions(+) diff --git a/tcg/README b/tcg/README index a9858c2..9cfd422 100644 --- a/tcg/README +++ b/tcg/README @@ -477,6 +477,17 @@ current TB was linked to this TB. Otherwise execute th= e next instructions. Only indices 0 and 1 are valid and tcg_gen_goto_tb may be is= sued at most once with each slot index per TB. =20 +* goto_ptr ptr + +Jump to a host address given by host pointer 'ptr'. Typically ptr is obta= ined +from the lookup_tb_ptr TCG helper. The return value of this helper depends= on +whether the TB is currently valid: if it is, the corresponding host address +is returned; if it is not valid, the helper returns the address of the TCG +epilogue, which restores state to go back to the exec loop. + +Implementing goto_ptr is optional for TCG backends. When not implemented, +calling it is equivalent to calling exit_tb(0). + * qemu_ld_i32/i64 t0, t1, flags, memidx * qemu_st_i32/i64 t0, t1, flags, memidx =20 diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h index 1a5ea23..b82eac4 100644 --- a/tcg/aarch64/tcg-target.h +++ b/tcg/aarch64/tcg-target.h @@ -77,6 +77,7 @@ typedef enum { #define TCG_TARGET_HAS_mulsh_i32 0 #define TCG_TARGET_HAS_extrl_i64_i32 0 #define TCG_TARGET_HAS_extrh_i64_i32 0 +#define TCG_TARGET_HAS_goto_ptr 0 =20 #define TCG_TARGET_HAS_div_i64 1 #define TCG_TARGET_HAS_rem_i64 1 diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h index 09a19c6..2f3ecfd 100644 --- a/tcg/arm/tcg-target.h +++ b/tcg/arm/tcg-target.h @@ -123,6 +123,7 @@ extern bool use_idiv_instructions; #define TCG_TARGET_HAS_mulsh_i32 0 #define TCG_TARGET_HAS_div_i32 use_idiv_instructions #define TCG_TARGET_HAS_rem_i32 0 +#define TCG_TARGET_HAS_goto_ptr 0 =20 enum { TCG_AREG0 =3D TCG_REG_R6, diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h index 4275787..59d9835 100644 --- a/tcg/i386/tcg-target.h +++ b/tcg/i386/tcg-target.h @@ -107,6 +107,7 @@ extern bool have_popcnt; #define TCG_TARGET_HAS_muls2_i32 1 #define TCG_TARGET_HAS_muluh_i32 0 #define TCG_TARGET_HAS_mulsh_i32 0 +#define TCG_TARGET_HAS_goto_ptr 0 =20 #if TCG_TARGET_REG_BITS =3D=3D 64 #define TCG_TARGET_HAS_extrl_i64_i32 0 diff --git a/tcg/ia64/tcg-target.h b/tcg/ia64/tcg-target.h index 42aea03..901bb75 100644 --- a/tcg/ia64/tcg-target.h +++ b/tcg/ia64/tcg-target.h @@ -173,6 +173,7 @@ typedef enum { #define TCG_TARGET_HAS_mulsh_i64 0 #define TCG_TARGET_HAS_extrl_i64_i32 0 #define TCG_TARGET_HAS_extrh_i64_i32 0 +#define TCG_TARGET_HAS_goto_ptr 0 =20 #define TCG_TARGET_deposit_i32_valid(ofs, len) ((len) <=3D 16) #define TCG_TARGET_deposit_i64_valid(ofs, len) ((len) <=3D 16) diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h index f46d64a..e3240cf 100644 --- a/tcg/mips/tcg-target.h +++ b/tcg/mips/tcg-target.h @@ -130,6 +130,7 @@ extern bool use_mips32r2_instructions; #define TCG_TARGET_HAS_muluh_i32 1 #define TCG_TARGET_HAS_mulsh_i32 1 #define TCG_TARGET_HAS_bswap32_i32 1 +#define TCG_TARGET_HAS_goto_ptr 0 =20 #if TCG_TARGET_REG_BITS =3D=3D 64 #define TCG_TARGET_HAS_add2_i32 0 diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h index abd8b3d..a9aa974 100644 --- a/tcg/ppc/tcg-target.h +++ b/tcg/ppc/tcg-target.h @@ -82,6 +82,7 @@ extern bool have_isa_3_00; #define TCG_TARGET_HAS_muls2_i32 0 #define TCG_TARGET_HAS_muluh_i32 1 #define TCG_TARGET_HAS_mulsh_i32 1 +#define TCG_TARGET_HAS_goto_ptr 0 =20 #if TCG_TARGET_REG_BITS =3D=3D 64 #define TCG_TARGET_HAS_add2_i32 0 diff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h index cbdd2a6..6b7bcfb 100644 --- a/tcg/s390/tcg-target.h +++ b/tcg/s390/tcg-target.h @@ -92,6 +92,7 @@ extern uint64_t s390_facilities; #define TCG_TARGET_HAS_mulsh_i32 0 #define TCG_TARGET_HAS_extrl_i64_i32 0 #define TCG_TARGET_HAS_extrh_i64_i32 0 +#define TCG_TARGET_HAS_goto_ptr 0 =20 #define TCG_TARGET_HAS_div2_i64 1 #define TCG_TARGET_HAS_rot_i64 1 diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h index b8b74f9..9348ddd 100644 --- a/tcg/sparc/tcg-target.h +++ b/tcg/sparc/tcg-target.h @@ -123,6 +123,7 @@ extern bool use_vis3_instructions; #define TCG_TARGET_HAS_muls2_i32 1 #define TCG_TARGET_HAS_muluh_i32 0 #define TCG_TARGET_HAS_mulsh_i32 0 +#define TCG_TARGET_HAS_goto_ptr 0 =20 #define TCG_TARGET_HAS_extrl_i64_i32 1 #define TCG_TARGET_HAS_extrh_i64_i32 1 diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index 95a39b7..e8a140b 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -2587,6 +2587,15 @@ void tcg_gen_goto_tb(unsigned idx) tcg_gen_op1i(INDEX_op_goto_tb, idx); } =20 +void tcg_gen_goto_ptr(TCGv_ptr ptr) +{ + if (TCG_TARGET_HAS_goto_ptr) { + tcg_gen_op1i(INDEX_op_goto_ptr, GET_TCGV_PTR(ptr)); + } else { + tcg_gen_exit_tb(0); + } +} + static inline TCGMemOp tcg_canonicalize_memop(TCGMemOp op, bool is64, bool= st) { /* Trigger the asserts within as early as possible. */ diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h index c68e300..d65727e 100644 --- a/tcg/tcg-op.h +++ b/tcg/tcg-op.h @@ -796,6 +796,15 @@ static inline void tcg_gen_exit_tb(uintptr_t val) */ void tcg_gen_goto_tb(unsigned idx); =20 +/** + * tcg_gen_goto_ptr() - output a jump to a host address + * @ptr: pointer with the target host address + * + * Implementing this operation is optional. If the TCG backend does not su= pport + * it, this call is equivalent to tcg_gen_exit_tb() with 0 as the argument. + */ +void tcg_gen_goto_ptr(TCGv_ptr ptr); + #if TARGET_LONG_BITS =3D=3D 32 #define tcg_temp_new() tcg_temp_new_i32() #define tcg_global_reg_new tcg_global_reg_new_i32 diff --git a/tcg/tcg-opc.h b/tcg/tcg-opc.h index f06f894..c64b994 100644 --- a/tcg/tcg-opc.h +++ b/tcg/tcg-opc.h @@ -193,6 +193,7 @@ DEF(insn_start, 0, 0, TLADDR_ARGS * TARGET_INSN_START_W= ORDS, TCG_OPF_NOT_PRESENT) DEF(exit_tb, 0, 0, 1, TCG_OPF_BB_END) DEF(goto_tb, 0, 0, 1, TCG_OPF_BB_END) +DEF(goto_ptr, 0, 1, 0, TCG_OPF_BB_END) =20 DEF(qemu_ld_i32, 1, TLADDR_ARGS, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) diff --git a/tcg/tcg.c b/tcg/tcg.c index cb898f1..0ea57c0 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -1138,6 +1138,7 @@ void tcg_dump_ops(TCGContext *s) } switch (c) { case INDEX_op_set_label: + case INDEX_op_goto_tb: case INDEX_op_br: case INDEX_op_brcond_i32: case INDEX_op_brcond_i64: diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h index 838bf3a..0696328 100644 --- a/tcg/tci/tcg-target.h +++ b/tcg/tci/tcg-target.h @@ -85,6 +85,7 @@ #define TCG_TARGET_HAS_muls2_i32 0 #define TCG_TARGET_HAS_muluh_i32 0 #define TCG_TARGET_HAS_mulsh_i32 0 +#define TCG_TARGET_HAS_goto_ptr 0 =20 #if TCG_TARGET_REG_BITS =3D=3D 64 #define TCG_TARGET_HAS_extrl_i64_i32 0 --=20 2.7.4