From nobody Thu May 2 15:41:41 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1492428994036217.48564772231782; Mon, 17 Apr 2017 04:36:34 -0700 (PDT) Received: from localhost ([::1]:36012 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d04xM-0003xG-Qj for importer@patchew.org; Mon, 17 Apr 2017 07:36:32 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50291) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d04tr-0001O2-Ho for qemu-devel@nongnu.org; Mon, 17 Apr 2017 07:32:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d04tq-0003Wa-7D for qemu-devel@nongnu.org; Mon, 17 Apr 2017 07:32:55 -0400 Received: from mx1.redhat.com ([209.132.183.28]:45592) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d04tp-0003WN-Ud for qemu-devel@nongnu.org; Mon, 17 Apr 2017 07:32:54 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id D2B2931F3FA; Mon, 17 Apr 2017 11:32:52 +0000 (UTC) Received: from pxdev.xzpeter.org.com (ovpn-8-29.pek2.redhat.com [10.72.8.29]) by smtp.corp.redhat.com (Postfix) with ESMTP id 729AB176A8; Mon, 17 Apr 2017 11:32:48 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com D2B2931F3FA Authentication-Results: ext-mx05.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx05.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=peterx@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com D2B2931F3FA From: Peter Xu To: qemu-devel@nongnu.org Date: Mon, 17 Apr 2017 19:32:04 +0800 Message-Id: <1492428730-13438-2-git-send-email-peterx@redhat.com> In-Reply-To: <1492428730-13438-1-git-send-email-peterx@redhat.com> References: <1492428730-13438-1-git-send-email-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.29]); Mon, 17 Apr 2017 11:32:53 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 1/7] memory: tune last param of iommu_ops.translate() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lan Tianyu , "Michael S . Tsirkin" , Jason Wang , peterx@redhat.com, Marcel Apfelbaum , Paolo Bonzini , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This patch converts the old "is_write" bool into IOMMUAccessFlags. The difference is that "is_write" can only express either read/write, but sometimes what we really want is "none" here (neither read nor write). Replay is an good example - during replay, we should not check any RW permission bits since thats not an actual IO at all. CC: Paolo Bonzini CC: David Gibson Signed-off-by: Peter Xu Acked-by: David Gibson Acked-by: Paolo Bonzini Reviewed-by: David Gibson --- exec.c | 6 ++++-- hw/alpha/typhoon.c | 2 +- hw/dma/rc4030.c | 2 +- hw/i386/amd_iommu.c | 4 ++-- hw/i386/intel_iommu.c | 4 ++-- hw/pci-host/apb.c | 2 +- hw/ppc/spapr_iommu.c | 2 +- hw/s390x/s390-pci-bus.c | 2 +- hw/s390x/s390-pci-inst.c | 2 +- include/exec/memory.h | 10 ++++++++-- memory.c | 3 ++- 11 files changed, 24 insertions(+), 15 deletions(-) diff --git a/exec.c b/exec.c index c97ef4a..188892b 100644 --- a/exec.c +++ b/exec.c @@ -475,7 +475,8 @@ IOMMUTLBEntry address_space_get_iotlb_entry(AddressSpac= e *as, hwaddr addr, break; } =20 - iotlb =3D mr->iommu_ops->translate(mr, addr, is_write); + iotlb =3D mr->iommu_ops->translate(mr, addr, is_write ? + IOMMU_WO : IOMMU_RO); if (!(iotlb.perm & (1 << is_write))) { iotlb.target_as =3D NULL; break; @@ -507,7 +508,8 @@ MemoryRegion *address_space_translate(AddressSpace *as,= hwaddr addr, break; } =20 - iotlb =3D mr->iommu_ops->translate(mr, addr, is_write); + iotlb =3D mr->iommu_ops->translate(mr, addr, is_write ? + IOMMU_WO : IOMMU_RO); addr =3D ((iotlb.translated_addr & ~iotlb.addr_mask) | (addr & iotlb.addr_mask)); *plen =3D MIN(*plen, (addr | iotlb.addr_mask) - addr + 1); diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c index f50f5cf..c1cf780 100644 --- a/hw/alpha/typhoon.c +++ b/hw/alpha/typhoon.c @@ -664,7 +664,7 @@ static bool window_translate(TyphoonWindow *win, hwaddr= addr, /* TODO: A translation failure here ought to set PCI error codes on the Pchip and generate a machine check interrupt. */ static IOMMUTLBEntry typhoon_translate_iommu(MemoryRegion *iommu, hwaddr a= ddr, - bool is_write) + IOMMUAccessFlags flag) { TyphoonPchip *pchip =3D container_of(iommu, TyphoonPchip, iommu); IOMMUTLBEntry ret; diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c index 0080141..edf9432 100644 --- a/hw/dma/rc4030.c +++ b/hw/dma/rc4030.c @@ -489,7 +489,7 @@ static const MemoryRegionOps jazzio_ops =3D { }; =20 static IOMMUTLBEntry rc4030_dma_translate(MemoryRegion *iommu, hwaddr addr, - bool is_write) + IOMMUAccessFlags flag) { rc4030State *s =3D container_of(iommu, rc4030State, dma_mr); IOMMUTLBEntry ret =3D { diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c index f86a40a..42b34ef 100644 --- a/hw/i386/amd_iommu.c +++ b/hw/i386/amd_iommu.c @@ -987,7 +987,7 @@ static inline bool amdvi_is_interrupt_addr(hwaddr addr) } =20 static IOMMUTLBEntry amdvi_translate(MemoryRegion *iommu, hwaddr addr, - bool is_write) + IOMMUAccessFlags flag) { AMDVIAddressSpace *as =3D container_of(iommu, AMDVIAddressSpace, iommu= ); AMDVIState *s =3D as->iommu_state; @@ -1016,7 +1016,7 @@ static IOMMUTLBEntry amdvi_translate(MemoryRegion *io= mmu, hwaddr addr, return ret; } =20 - amdvi_do_translate(as, addr, is_write, &ret); + amdvi_do_translate(as, addr, flag & IOMMU_WO, &ret); trace_amdvi_translation_result(as->bus_num, PCI_SLOT(as->devfn), PCI_FUNC(as->devfn), addr, ret.translated_addr); return ret; diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 02f047c..ea54ec3 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -2221,7 +2221,7 @@ static void vtd_mem_write(void *opaque, hwaddr addr, } =20 static IOMMUTLBEntry vtd_iommu_translate(MemoryRegion *iommu, hwaddr addr, - bool is_write) + IOMMUAccessFlags flag) { VTDAddressSpace *vtd_as =3D container_of(iommu, VTDAddressSpace, iommu= ); IntelIOMMUState *s =3D vtd_as->iommu_state; @@ -2243,7 +2243,7 @@ static IOMMUTLBEntry vtd_iommu_translate(MemoryRegion= *iommu, hwaddr addr, } =20 vtd_do_iommu_translate(vtd_as, vtd_as->bus, vtd_as->devfn, addr, - is_write, &ret); + flag & IOMMU_WO, &ret); VTD_DPRINTF(MMU, "bus %"PRIu8 " slot %"PRIu8 " func %"PRIu8 " devfn %"PRIu8 " iova 0x%"PRIx64 " hpa 0x%"PRIx64, pci_bus_num(vtd_as->bu= s), diff --git a/hw/pci-host/apb.c b/hw/pci-host/apb.c index 653e711..ad7abb2 100644 --- a/hw/pci-host/apb.c +++ b/hw/pci-host/apb.c @@ -209,7 +209,7 @@ static AddressSpace *pbm_pci_dma_iommu(PCIBus *bus, voi= d *opaque, int devfn) =20 /* Called from RCU critical section */ static IOMMUTLBEntry pbm_translate_iommu(MemoryRegion *iommu, hwaddr addr, - bool is_write) + IOMMUAccessFlags flag) { IOMMUState *is =3D container_of(iommu, IOMMUState, iommu); hwaddr baseaddr, offset; diff --git a/hw/ppc/spapr_iommu.c b/hw/ppc/spapr_iommu.c index ae30bbe..a3ae78d 100644 --- a/hw/ppc/spapr_iommu.c +++ b/hw/ppc/spapr_iommu.c @@ -110,7 +110,7 @@ static void spapr_tce_free_table(uint64_t *table, int f= d, uint32_t nb_table) =20 /* Called from RCU critical section */ static IOMMUTLBEntry spapr_tce_translate_iommu(MemoryRegion *iommu, hwaddr= addr, - bool is_write) + IOMMUAccessFlags flag) { sPAPRTCETable *tcet =3D container_of(iommu, sPAPRTCETable, iommu); uint64_t tce; diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c index 69b0291..9b2c344 100644 --- a/hw/s390x/s390-pci-bus.c +++ b/hw/s390x/s390-pci-bus.c @@ -355,7 +355,7 @@ out: } =20 static IOMMUTLBEntry s390_translate_iommu(MemoryRegion *mr, hwaddr addr, - bool is_write) + IOMMUAccessFlags flag) { uint64_t pte; uint32_t flags; diff --git a/hw/s390x/s390-pci-inst.c b/hw/s390x/s390-pci-inst.c index d2a8c0a..0087aa7 100644 --- a/hw/s390x/s390-pci-inst.c +++ b/hw/s390x/s390-pci-inst.c @@ -622,7 +622,7 @@ int rpcit_service_call(S390CPU *cpu, uint8_t r1, uint8_= t r2) =20 mr =3D &iommu->iommu_mr; while (start < end) { - entry =3D mr->iommu_ops->translate(mr, start, 0); + entry =3D mr->iommu_ops->translate(mr, start, IOMMU_NONE); =20 if (!entry.translated_addr) { pbdev->state =3D ZPCI_FS_ERROR; diff --git a/include/exec/memory.h b/include/exec/memory.h index c4fc94d..9047bf3 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -185,8 +185,14 @@ struct MemoryRegionOps { typedef struct MemoryRegionIOMMUOps MemoryRegionIOMMUOps; =20 struct MemoryRegionIOMMUOps { - /* Return a TLB entry that contains a given address. */ - IOMMUTLBEntry (*translate)(MemoryRegion *iommu, hwaddr addr, bool is_w= rite); + /* + * Return a TLB entry that contains a given address. Flag should + * be the access permission of this translation operation. We can + * set flag to IOMMU_NONE to mean that we don't need any + * read/write permission checks, like, when for region replay. + */ + IOMMUTLBEntry (*translate)(MemoryRegion *iommu, hwaddr addr, + IOMMUAccessFlags flag); /* Returns minimum supported page size */ uint64_t (*get_min_page_size)(MemoryRegion *iommu); /* Called when IOMMU Notifier flag changed */ diff --git a/memory.c b/memory.c index b782d5b..47dc107 100644 --- a/memory.c +++ b/memory.c @@ -1625,6 +1625,7 @@ void memory_region_iommu_replay(MemoryRegion *mr, IOM= MUNotifier *n, { hwaddr addr, granularity; IOMMUTLBEntry iotlb; + IOMMUAccessFlags flag =3D is_write ? IOMMU_WO : IOMMU_RO; =20 /* If the IOMMU has its own replay callback, override */ if (mr->iommu_ops->replay) { @@ -1635,7 +1636,7 @@ void memory_region_iommu_replay(MemoryRegion *mr, IOM= MUNotifier *n, granularity =3D memory_region_iommu_get_min_page_size(mr); =20 for (addr =3D 0; addr < memory_region_size(mr); addr +=3D granularity)= { - iotlb =3D mr->iommu_ops->translate(mr, addr, is_write); + iotlb =3D mr->iommu_ops->translate(mr, addr, flag); if (iotlb.perm !=3D IOMMU_NONE) { n->notify(n, &iotlb); } --=20 2.7.4 From nobody Thu May 2 15:41:41 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 14924288846209.326177160672046; Mon, 17 Apr 2017 04:34:44 -0700 (PDT) Received: from localhost ([::1]:35997 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d04va-0002VA-6H for importer@patchew.org; Mon, 17 Apr 2017 07:34:42 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50319) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d04tu-0001Q4-T8 for qemu-devel@nongnu.org; Mon, 17 Apr 2017 07:33:03 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d04tt-0003Xc-WD for qemu-devel@nongnu.org; Mon, 17 Apr 2017 07:32:58 -0400 Received: from mx1.redhat.com ([209.132.183.28]:41548) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d04tt-0003XM-N8 for qemu-devel@nongnu.org; Mon, 17 Apr 2017 07:32:57 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id AD4B661D20; Mon, 17 Apr 2017 11:32:56 +0000 (UTC) Received: from pxdev.xzpeter.org.com (ovpn-8-29.pek2.redhat.com [10.72.8.29]) by smtp.corp.redhat.com (Postfix) with ESMTP id 7328B176A8; Mon, 17 Apr 2017 11:32:53 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com AD4B661D20 Authentication-Results: ext-mx10.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx10.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=peterx@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com AD4B661D20 From: Peter Xu To: qemu-devel@nongnu.org Date: Mon, 17 Apr 2017 19:32:05 +0800 Message-Id: <1492428730-13438-3-git-send-email-peterx@redhat.com> In-Reply-To: <1492428730-13438-1-git-send-email-peterx@redhat.com> References: <1492428730-13438-1-git-send-email-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Mon, 17 Apr 2017 11:32:56 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 2/7] memory: remove the last param in memory_region_iommu_replay() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lan Tianyu , "Michael S . Tsirkin" , Jason Wang , peterx@redhat.com, Marcel Apfelbaum , Paolo Bonzini , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" We were always passing in that one as "false" to assume that's an read operation, and we also assume that IOMMU translation would always have that read permission. A better permission would be IOMMU_NONE since the replay is after all not a real read operation, but just a page table rebuilding process. CC: David Gibson CC: Paolo Bonzini Signed-off-by: Peter Xu Acked-by: Paolo Bonzini Reviewed-by: David Gibson --- hw/vfio/common.c | 2 +- include/exec/memory.h | 5 +---- memory.c | 8 +++----- 3 files changed, 5 insertions(+), 10 deletions(-) diff --git a/hw/vfio/common.c b/hw/vfio/common.c index 6b33b9f..d008a4b 100644 --- a/hw/vfio/common.c +++ b/hw/vfio/common.c @@ -488,7 +488,7 @@ static void vfio_listener_region_add(MemoryListener *li= stener, QLIST_INSERT_HEAD(&container->giommu_list, giommu, giommu_next); =20 memory_region_register_iommu_notifier(giommu->iommu, &giommu->n); - memory_region_iommu_replay(giommu->iommu, &giommu->n, false); + memory_region_iommu_replay(giommu->iommu, &giommu->n); =20 return; } diff --git a/include/exec/memory.h b/include/exec/memory.h index 9047bf3..8721d53 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -731,11 +731,8 @@ void memory_region_register_iommu_notifier(MemoryRegio= n *mr, * * @mr: the memory region to observe * @n: the notifier to which to replay iommu mappings - * @is_write: Whether to treat the replay as a translate "write" - * through the iommu */ -void memory_region_iommu_replay(MemoryRegion *mr, IOMMUNotifier *n, - bool is_write); +void memory_region_iommu_replay(MemoryRegion *mr, IOMMUNotifier *n); =20 /** * memory_region_iommu_replay_all: replay existing IOMMU translations diff --git a/memory.c b/memory.c index 47dc107..6b2fdb7 100644 --- a/memory.c +++ b/memory.c @@ -1620,12 +1620,10 @@ uint64_t memory_region_iommu_get_min_page_size(Memo= ryRegion *mr) return TARGET_PAGE_SIZE; } =20 -void memory_region_iommu_replay(MemoryRegion *mr, IOMMUNotifier *n, - bool is_write) +void memory_region_iommu_replay(MemoryRegion *mr, IOMMUNotifier *n) { hwaddr addr, granularity; IOMMUTLBEntry iotlb; - IOMMUAccessFlags flag =3D is_write ? IOMMU_WO : IOMMU_RO; =20 /* If the IOMMU has its own replay callback, override */ if (mr->iommu_ops->replay) { @@ -1636,7 +1634,7 @@ void memory_region_iommu_replay(MemoryRegion *mr, IOM= MUNotifier *n, granularity =3D memory_region_iommu_get_min_page_size(mr); =20 for (addr =3D 0; addr < memory_region_size(mr); addr +=3D granularity)= { - iotlb =3D mr->iommu_ops->translate(mr, addr, flag); + iotlb =3D mr->iommu_ops->translate(mr, addr, IOMMU_NONE); if (iotlb.perm !=3D IOMMU_NONE) { n->notify(n, &iotlb); } @@ -1654,7 +1652,7 @@ void memory_region_iommu_replay_all(MemoryRegion *mr) IOMMUNotifier *notifier; =20 IOMMU_NOTIFIER_FOREACH(notifier, mr) { - memory_region_iommu_replay(mr, notifier, false); + memory_region_iommu_replay(mr, notifier); } } =20 --=20 2.7.4 From nobody Thu May 2 15:41:41 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1492429102001453.99943249911234; Mon, 17 Apr 2017 04:38:22 -0700 (PDT) Received: from localhost ([::1]:36018 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d04z6-0005NA-Qj for importer@patchew.org; Mon, 17 Apr 2017 07:38:20 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50405) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d04u5-0001YP-7w for qemu-devel@nongnu.org; Mon, 17 Apr 2017 07:33:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d04u4-0003fE-56 for qemu-devel@nongnu.org; Mon, 17 Apr 2017 07:33:09 -0400 Received: from mx1.redhat.com ([209.132.183.28]:42860) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d04u3-0003eq-ST for qemu-devel@nongnu.org; Mon, 17 Apr 2017 07:33:08 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id D05CD7F3EB; Mon, 17 Apr 2017 11:33:06 +0000 (UTC) Received: from pxdev.xzpeter.org.com (ovpn-8-29.pek2.redhat.com [10.72.8.29]) by smtp.corp.redhat.com (Postfix) with ESMTP id 580C07DFCF; Mon, 17 Apr 2017 11:32:57 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com D05CD7F3EB Authentication-Results: ext-mx01.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx01.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=peterx@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com D05CD7F3EB From: Peter Xu To: qemu-devel@nongnu.org Date: Mon, 17 Apr 2017 19:32:06 +0800 Message-Id: <1492428730-13438-4-git-send-email-peterx@redhat.com> In-Reply-To: <1492428730-13438-1-git-send-email-peterx@redhat.com> References: <1492428730-13438-1-git-send-email-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Mon, 17 Apr 2017 11:33:07 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 3/7] x86-iommu: use DeviceClass properties X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lan Tianyu , "Michael S . Tsirkin" , Jason Wang , peterx@redhat.com, Marcel Apfelbaum , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" No reason to keep tens of lines if we can do it actually far shorter. Signed-off-by: Peter Xu Acked-by: Paolo Bonzini --- hw/i386/x86-iommu.c | 47 +++++++---------------------------------------- 1 file changed, 7 insertions(+), 40 deletions(-) diff --git a/hw/i386/x86-iommu.c b/hw/i386/x86-iommu.c index 23dcd3f..02b8825 100644 --- a/hw/i386/x86-iommu.c +++ b/hw/i386/x86-iommu.c @@ -88,55 +88,22 @@ static void x86_iommu_realize(DeviceState *dev, Error *= *errp) x86_iommu_set_default(X86_IOMMU_DEVICE(dev)); } =20 +static Property x86_iommu_properties[] =3D { + DEFINE_PROP_BOOL("intremap", X86IOMMUState, intr_supported, false), + DEFINE_PROP_BOOL("device-iotlb", X86IOMMUState, dt_supported, false), + DEFINE_PROP_END_OF_LIST(), +}; + static void x86_iommu_class_init(ObjectClass *klass, void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); dc->realize =3D x86_iommu_realize; -} - -static bool x86_iommu_intremap_prop_get(Object *o, Error **errp) -{ - X86IOMMUState *s =3D X86_IOMMU_DEVICE(o); - return s->intr_supported; -} - -static void x86_iommu_intremap_prop_set(Object *o, bool value, Error **err= p) -{ - X86IOMMUState *s =3D X86_IOMMU_DEVICE(o); - s->intr_supported =3D value; -} - -static bool x86_iommu_device_iotlb_prop_get(Object *o, Error **errp) -{ - X86IOMMUState *s =3D X86_IOMMU_DEVICE(o); - return s->dt_supported; -} - -static void x86_iommu_device_iotlb_prop_set(Object *o, bool value, Error *= *errp) -{ - X86IOMMUState *s =3D X86_IOMMU_DEVICE(o); - s->dt_supported =3D value; -} - -static void x86_iommu_instance_init(Object *o) -{ - X86IOMMUState *s =3D X86_IOMMU_DEVICE(o); - - /* By default, do not support IR */ - s->intr_supported =3D false; - object_property_add_bool(o, "intremap", x86_iommu_intremap_prop_get, - x86_iommu_intremap_prop_set, NULL); - s->dt_supported =3D false; - object_property_add_bool(o, "device-iotlb", - x86_iommu_device_iotlb_prop_get, - x86_iommu_device_iotlb_prop_set, - NULL); + dc->props =3D x86_iommu_properties; } =20 static const TypeInfo x86_iommu_info =3D { .name =3D TYPE_X86_IOMMU_DEVICE, .parent =3D TYPE_SYS_BUS_DEVICE, - .instance_init =3D x86_iommu_instance_init, .instance_size =3D sizeof(X86IOMMUState), .class_init =3D x86_iommu_class_init, .class_size =3D sizeof(X86IOMMUClass), --=20 2.7.4 From nobody Thu May 2 15:41:41 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 149242919037345.55218670609861; Mon, 17 Apr 2017 04:39:50 -0700 (PDT) Received: from localhost ([::1]:36024 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d050W-0006Ni-Nq for importer@patchew.org; Mon, 17 Apr 2017 07:39:48 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50472) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d04uA-0001dM-VP for qemu-devel@nongnu.org; Mon, 17 Apr 2017 07:33:16 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d04u9-0003kb-OL for qemu-devel@nongnu.org; Mon, 17 Apr 2017 07:33:14 -0400 Received: from mx1.redhat.com ([209.132.183.28]:32085) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d04u9-0003jB-Fp for qemu-devel@nongnu.org; Mon, 17 Apr 2017 07:33:13 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 7BC833D958; Mon, 17 Apr 2017 11:33:12 +0000 (UTC) Received: from pxdev.xzpeter.org.com (ovpn-8-29.pek2.redhat.com [10.72.8.29]) by smtp.corp.redhat.com (Postfix) with ESMTP id C0FAE176A8; Mon, 17 Apr 2017 11:33:07 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 7BC833D958 Authentication-Results: ext-mx06.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx06.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=peterx@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 7BC833D958 From: Peter Xu To: qemu-devel@nongnu.org Date: Mon, 17 Apr 2017 19:32:07 +0800 Message-Id: <1492428730-13438-5-git-send-email-peterx@redhat.com> In-Reply-To: <1492428730-13438-1-git-send-email-peterx@redhat.com> References: <1492428730-13438-1-git-send-email-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Mon, 17 Apr 2017 11:33:12 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 4/7] intel_iommu: renaming context entry helpers X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lan Tianyu , "Michael S . Tsirkin" , Jason Wang , peterx@redhat.com, Marcel Apfelbaum , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The old names are too long and less ordered. Let's start to use vtd_ce_*() as a pattern. Signed-off-by: Peter Xu Acked-by: Paolo Bonzini --- hw/i386/intel_iommu.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index ea54ec3..4628f04 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -512,7 +512,7 @@ static int vtd_get_root_entry(IntelIOMMUState *s, uint8= _t index, return 0; } =20 -static inline bool vtd_context_entry_present(VTDContextEntry *context) +static inline bool vtd_ce_present(VTDContextEntry *context) { return context->lo & VTD_CONTEXT_ENTRY_P; } @@ -533,7 +533,7 @@ static int vtd_get_context_entry_from_root(VTDRootEntry= *root, uint8_t index, return 0; } =20 -static inline dma_addr_t vtd_get_slpt_base_from_context(VTDContextEntry *c= e) +static inline dma_addr_t vtd_ce_get_slpt_base(VTDContextEntry *ce) { return ce->lo & VTD_CONTEXT_ENTRY_SLPTPTR; } @@ -585,19 +585,19 @@ static inline bool vtd_is_level_supported(IntelIOMMUS= tate *s, uint32_t level) /* Get the page-table level that hardware should use for the second-level * page-table walk from the Address Width field of context-entry. */ -static inline uint32_t vtd_get_level_from_context_entry(VTDContextEntry *c= e) +static inline uint32_t vtd_ce_get_level(VTDContextEntry *ce) { return 2 + (ce->hi & VTD_CONTEXT_ENTRY_AW); } =20 -static inline uint32_t vtd_get_agaw_from_context_entry(VTDContextEntry *ce) +static inline uint32_t vtd_ce_get_agaw(VTDContextEntry *ce) { return 30 + (ce->hi & VTD_CONTEXT_ENTRY_AW) * 9; } =20 static inline uint64_t vtd_iova_limit(VTDContextEntry *ce) { - uint32_t ce_agaw =3D vtd_get_agaw_from_context_entry(ce); + uint32_t ce_agaw =3D vtd_ce_get_agaw(ce); return 1ULL << MIN(ce_agaw, VTD_MGAW); } =20 @@ -642,8 +642,8 @@ static int vtd_iova_to_slpte(VTDContextEntry *ce, uint6= 4_t iova, bool is_write, uint64_t *slptep, uint32_t *slpte_level, bool *reads, bool *writes) { - dma_addr_t addr =3D vtd_get_slpt_base_from_context(ce); - uint32_t level =3D vtd_get_level_from_context_entry(ce); + dma_addr_t addr =3D vtd_ce_get_slpt_base(ce); + uint32_t level =3D vtd_ce_get_level(ce); uint32_t offset; uint64_t slpte; uint64_t access_right_check; @@ -664,7 +664,7 @@ static int vtd_iova_to_slpte(VTDContextEntry *ce, uint6= 4_t iova, bool is_write, VTD_DPRINTF(GENERAL, "error: fail to access second-level pagin= g " "entry at level %"PRIu32 " for iova 0x%"PRIx64, level, iova); - if (level =3D=3D vtd_get_level_from_context_entry(ce)) { + if (level =3D=3D vtd_ce_get_level(ce)) { /* Invalid programming of context-entry */ return -VTD_FR_CONTEXT_ENTRY_INV; } else { @@ -809,8 +809,8 @@ static int vtd_page_walk(VTDContextEntry *ce, uint64_t = start, uint64_t end, vtd_page_walk_hook hook_fn, void *private, bool notify_unmap) { - dma_addr_t addr =3D vtd_get_slpt_base_from_context(ce); - uint32_t level =3D vtd_get_level_from_context_entry(ce); + dma_addr_t addr =3D vtd_ce_get_slpt_base(ce); + uint32_t level =3D vtd_ce_get_level(ce); =20 if (!vtd_iova_range_check(start, ce)) { return -VTD_FR_ADDR_BEYOND_MGAW; @@ -851,7 +851,7 @@ static int vtd_dev_to_context_entry(IntelIOMMUState *s,= uint8_t bus_num, return ret_fr; } =20 - if (!vtd_context_entry_present(ce)) { + if (!vtd_ce_present(ce)) { /* Not error - it's okay we don't have context entry. */ trace_vtd_ce_not_present(bus_num, devfn); return -VTD_FR_CONTEXT_ENTRY_P; @@ -861,7 +861,7 @@ static int vtd_dev_to_context_entry(IntelIOMMUState *s,= uint8_t bus_num, return -VTD_FR_CONTEXT_ENTRY_RSVD; } /* Check if the programming of context-entry is valid */ - if (!vtd_is_level_supported(s, vtd_get_level_from_context_entry(ce))) { + if (!vtd_is_level_supported(s, vtd_ce_get_level(ce))) { trace_vtd_ce_invalid(ce->hi, ce->lo); return -VTD_FR_CONTEXT_ENTRY_INV; } else { --=20 2.7.4 From nobody Thu May 2 15:41:41 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 149242890597316.223511210363995; Mon, 17 Apr 2017 04:35:05 -0700 (PDT) Received: from localhost ([::1]:35998 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d04vv-0002nV-Dc for importer@patchew.org; Mon, 17 Apr 2017 07:35:03 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50537) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d04uG-0001i0-Ev for qemu-devel@nongnu.org; Mon, 17 Apr 2017 07:33:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d04uF-0003qC-Mk for qemu-devel@nongnu.org; Mon, 17 Apr 2017 07:33:20 -0400 Received: from mx1.redhat.com ([209.132.183.28]:52130) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d04uF-0003pk-Gd for qemu-devel@nongnu.org; Mon, 17 Apr 2017 07:33:19 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 7A5628F28E; Mon, 17 Apr 2017 11:33:18 +0000 (UTC) Received: from pxdev.xzpeter.org.com (ovpn-8-29.pek2.redhat.com [10.72.8.29]) by smtp.corp.redhat.com (Postfix) with ESMTP id 26CD6176A8; Mon, 17 Apr 2017 11:33:12 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 7A5628F28E Authentication-Results: ext-mx03.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx03.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=peterx@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 7A5628F28E From: Peter Xu To: qemu-devel@nongnu.org Date: Mon, 17 Apr 2017 19:32:08 +0800 Message-Id: <1492428730-13438-6-git-send-email-peterx@redhat.com> In-Reply-To: <1492428730-13438-1-git-send-email-peterx@redhat.com> References: <1492428730-13438-1-git-send-email-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Mon, 17 Apr 2017 11:33:18 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 5/7] intel_iommu: provide vtd_ce_get_type() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lan Tianyu , "Michael S . Tsirkin" , Jason Wang , peterx@redhat.com, Marcel Apfelbaum , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Helper to fetch VT-d context entry type. Signed-off-by: Peter Xu Acked-by: Paolo Bonzini --- hw/i386/intel_iommu.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 4628f04..c8751ba 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -595,6 +595,11 @@ static inline uint32_t vtd_ce_get_agaw(VTDContextEntry= *ce) return 30 + (ce->hi & VTD_CONTEXT_ENTRY_AW) * 9; } =20 +static inline uint32_t vtd_ce_get_type(VTDContextEntry *ce) +{ + return ce->lo & VTD_CONTEXT_ENTRY_TT; +} + static inline uint64_t vtd_iova_limit(VTDContextEntry *ce) { uint32_t ce_agaw =3D vtd_ce_get_agaw(ce); @@ -865,7 +870,7 @@ static int vtd_dev_to_context_entry(IntelIOMMUState *s,= uint8_t bus_num, trace_vtd_ce_invalid(ce->hi, ce->lo); return -VTD_FR_CONTEXT_ENTRY_INV; } else { - switch (ce->lo & VTD_CONTEXT_ENTRY_TT) { + switch (vtd_ce_get_type(ce)) { case VTD_CONTEXT_TT_MULTI_LEVEL: /* fall through */ case VTD_CONTEXT_TT_DEV_IOTLB: --=20 2.7.4 From nobody Thu May 2 15:41:41 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 149242900580750.68549672187248; Mon, 17 Apr 2017 04:36:45 -0700 (PDT) Received: from localhost ([::1]:36013 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d04xY-00047a-GU for importer@patchew.org; Mon, 17 Apr 2017 07:36:44 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50593) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d04uQ-0001ob-AV for qemu-devel@nongnu.org; Mon, 17 Apr 2017 07:33:31 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d04uP-0003wH-Gb for qemu-devel@nongnu.org; Mon, 17 Apr 2017 07:33:30 -0400 Received: from mx1.redhat.com ([209.132.183.28]:41836) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d04uP-0003vo-As for qemu-devel@nongnu.org; Mon, 17 Apr 2017 07:33:29 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 49BDBC04B936; Mon, 17 Apr 2017 11:33:28 +0000 (UTC) Received: from pxdev.xzpeter.org.com (ovpn-8-29.pek2.redhat.com [10.72.8.29]) by smtp.corp.redhat.com (Postfix) with ESMTP id 617C97DFCF; Mon, 17 Apr 2017 11:33:19 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 49BDBC04B936 Authentication-Results: ext-mx07.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx07.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=peterx@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 49BDBC04B936 From: Peter Xu To: qemu-devel@nongnu.org Date: Mon, 17 Apr 2017 19:32:09 +0800 Message-Id: <1492428730-13438-7-git-send-email-peterx@redhat.com> In-Reply-To: <1492428730-13438-1-git-send-email-peterx@redhat.com> References: <1492428730-13438-1-git-send-email-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.31]); Mon, 17 Apr 2017 11:33:28 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 6/7] intel_iommu: use IOMMU_ACCESS_FLAG() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lan Tianyu , "Michael S . Tsirkin" , Jason Wang , peterx@redhat.com, Marcel Apfelbaum , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" We have that now, so why not use it. Signed-off-by: Peter Xu Acked-by: Paolo Bonzini --- hw/i386/intel_iommu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index c8751ba..05ae631 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -1010,7 +1010,7 @@ out: entry->iova =3D addr & page_mask; entry->translated_addr =3D vtd_get_slpte_addr(slpte) & page_mask; entry->addr_mask =3D ~page_mask; - entry->perm =3D (writes ? 2 : 0) + (reads ? 1 : 0); + entry->perm =3D IOMMU_ACCESS_FLAG(reads, writes); } =20 static void vtd_root_table_setup(IntelIOMMUState *s) --=20 2.7.4 From nobody Thu May 2 15:41:41 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1492429027412694.4928059123536; Mon, 17 Apr 2017 04:37:07 -0700 (PDT) Received: from localhost ([::1]:36014 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d04xu-0004OX-5m for importer@patchew.org; Mon, 17 Apr 2017 07:37:06 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50657) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d04uZ-0001ua-8n for qemu-devel@nongnu.org; Mon, 17 Apr 2017 07:33:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d04uU-0003yy-8W for qemu-devel@nongnu.org; Mon, 17 Apr 2017 07:33:39 -0400 Received: from mx1.redhat.com ([209.132.183.28]:43312) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d04uT-0003yL-Vm for qemu-devel@nongnu.org; Mon, 17 Apr 2017 07:33:34 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id E8BEB7F3EB; Mon, 17 Apr 2017 11:33:32 +0000 (UTC) Received: from pxdev.xzpeter.org.com (ovpn-8-29.pek2.redhat.com [10.72.8.29]) by smtp.corp.redhat.com (Postfix) with ESMTP id 54440176A8; Mon, 17 Apr 2017 11:33:28 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com E8BEB7F3EB Authentication-Results: ext-mx01.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx01.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=peterx@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com E8BEB7F3EB From: Peter Xu To: qemu-devel@nongnu.org Date: Mon, 17 Apr 2017 19:32:10 +0800 Message-Id: <1492428730-13438-8-git-send-email-peterx@redhat.com> In-Reply-To: <1492428730-13438-1-git-send-email-peterx@redhat.com> References: <1492428730-13438-1-git-send-email-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Mon, 17 Apr 2017 11:33:33 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 7/7] intel_iommu: support passthrough (PT) X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lan Tianyu , "Michael S . Tsirkin" , Jason Wang , peterx@redhat.com, Marcel Apfelbaum , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Peter Xu Acked-by: Paolo Bonzini --- hw/i386/intel_iommu.c | 109 +++++++++++++++++++++++++++++++++----= ---- hw/i386/intel_iommu_internal.h | 1 + hw/i386/trace-events | 1 + hw/i386/x86-iommu.c | 1 + include/hw/i386/x86-iommu.h | 1 + 5 files changed, 93 insertions(+), 20 deletions(-) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 05ae631..deb2007 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -872,7 +872,7 @@ static int vtd_dev_to_context_entry(IntelIOMMUState *s,= uint8_t bus_num, } else { switch (vtd_ce_get_type(ce)) { case VTD_CONTEXT_TT_MULTI_LEVEL: - /* fall through */ + case VTD_CONTEXT_TT_PASS_THROUGH: case VTD_CONTEXT_TT_DEV_IOTLB: break; default: @@ -883,6 +883,73 @@ static int vtd_dev_to_context_entry(IntelIOMMUState *s= , uint8_t bus_num, return 0; } =20 +/* Fetch translation type for specific device. Returns <0 if error + * happens, otherwise return the shifted type to check against + * VTD_CONTEXT_TT_*. */ +static int vtd_dev_get_trans_type(VTDAddressSpace *as) +{ + IntelIOMMUState *s; + VTDContextEntry ce; + int ret; + + s =3D as->iommu_state; + + ret =3D vtd_dev_to_context_entry(s, pci_bus_num(as->bus), + as->devfn, &ce); + if (ret) { + return ret; + } + + return vtd_ce_get_type(&ce); +} + +static bool vtd_dev_pt_enabled(VTDAddressSpace *as) +{ + int ret; + + assert(as); + + ret =3D vtd_dev_get_trans_type(as); + if (ret < 0) { + /* + * Possibly failed to parse the context entry for some reason + * (e.g., during init, or any guest configuration errors on + * context entries). We should assume PT not enabled for + * safety. + */ + return false; + } + + return ret =3D=3D VTD_CONTEXT_TT_PASS_THROUGH; +} + +static void vtd_switch_address_space(VTDAddressSpace *as) +{ + bool use_iommu; + + assert(as); + + use_iommu =3D as->iommu_state->dmar_enabled; + if (use_iommu) { + /* Further checks per-device configuration */ + use_iommu &=3D !vtd_dev_pt_enabled(as); + } + + trace_vtd_switch_address_space(pci_bus_num(as->bus), + VTD_PCI_SLOT(as->devfn), + VTD_PCI_FUNC(as->devfn), + use_iommu); + + /* Turn off first then on the other */ + if (use_iommu) { + memory_region_set_enabled(&as->sys_alias, false); + memory_region_set_enabled(&as->iommu, true); + } else { + memory_region_set_enabled(&as->iommu, false); + memory_region_set_enabled(&as->sys_alias, true); + } +} + static inline uint16_t vtd_make_source_id(uint8_t bus_num, uint8_t devfn) { return ((bus_num & 0xffUL) << 8) | (devfn & 0xffUL); @@ -991,6 +1058,18 @@ static void vtd_do_iommu_translate(VTDAddressSpace *v= td_as, PCIBus *bus, cc_entry->context_cache_gen =3D s->context_cache_gen; } =20 + /* + * We don't need to translate for pass-through context entries. + * Also, let's ignore IOTLB caching as well for PT devices. + */ + if (vtd_ce_get_type(&ce) =3D=3D VTD_CONTEXT_TT_PASS_THROUGH) { + entry->translated_addr =3D entry->iova; + entry->addr_mask =3D VTD_PAGE_SIZE - 1; + entry->perm =3D IOMMU_RW; + trace_vtd_translate_pt(source_id, entry->iova); + return; + } + ret_fr =3D vtd_iova_to_slpte(&ce, addr, is_write, &slpte, &level, &reads, &writes); if (ret_fr) { @@ -1135,6 +1214,11 @@ static void vtd_context_device_invalidate(IntelIOMMU= State *s, VTD_PCI_FUNC(devfn_it)); vtd_as->context_cache_entry.context_cache_gen =3D 0; /* + * Do switch address space when needed, in case if the + * device passthrough bit is switched. + */ + vtd_switch_address_space(vtd_as); + /* * So a device is moving out of (or moving into) a * domain, a replay() suites here to notify all the * IOMMU_NOTIFIER_MAP registers about this change. @@ -1366,25 +1450,6 @@ static void vtd_handle_gcmd_sirtp(IntelIOMMUState *s) vtd_set_clear_mask_long(s, DMAR_GSTS_REG, 0, VTD_GSTS_IRTPS); } =20 -static void vtd_switch_address_space(VTDAddressSpace *as) -{ - assert(as); - - trace_vtd_switch_address_space(pci_bus_num(as->bus), - VTD_PCI_SLOT(as->devfn), - VTD_PCI_FUNC(as->devfn), - as->iommu_state->dmar_enabled); - - /* Turn off first then on the other */ - if (as->iommu_state->dmar_enabled) { - memory_region_set_enabled(&as->sys_alias, false); - memory_region_set_enabled(&as->iommu, true); - } else { - memory_region_set_enabled(&as->iommu, false); - memory_region_set_enabled(&as->sys_alias, true); - } -} - static void vtd_switch_address_space_all(IntelIOMMUState *s) { GHashTableIter iter; @@ -2849,6 +2914,10 @@ static void vtd_init(IntelIOMMUState *s) s->ecap |=3D VTD_ECAP_DT; } =20 + if (x86_iommu->pt_supported) { + s->ecap |=3D VTD_ECAP_PT; + } + if (s->caching_mode) { s->cap |=3D VTD_CAP_CM; } diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h index 29d6707..0e73a65 100644 --- a/hw/i386/intel_iommu_internal.h +++ b/hw/i386/intel_iommu_internal.h @@ -187,6 +187,7 @@ /* Interrupt Remapping support */ #define VTD_ECAP_IR (1ULL << 3) #define VTD_ECAP_EIM (1ULL << 4) +#define VTD_ECAP_PT (1ULL << 6) #define VTD_ECAP_MHMV (15ULL << 20) =20 /* CAP_REG */ diff --git a/hw/i386/trace-events b/hw/i386/trace-events index 04a6980..867ad0b 100644 --- a/hw/i386/trace-events +++ b/hw/i386/trace-events @@ -38,6 +38,7 @@ vtd_page_walk_skip_perm(uint64_t iova, uint64_t next) "Pa= ge walk skip iova 0x%"P vtd_page_walk_skip_reserve(uint64_t iova, uint64_t next) "Page walk skip i= ova 0x%"PRIx64" - 0x%"PRIx64" due to rsrv set" vtd_switch_address_space(uint8_t bus, uint8_t slot, uint8_t fn, bool on) "= Device %02x:%02x.%x switching address space (iommu enabled=3D%d)" vtd_as_unmap_whole(uint8_t bus, uint8_t slot, uint8_t fn, uint64_t iova, u= int64_t size) "Device %02x:%02x.%x start 0x%"PRIx64" size 0x%"PRIx64 +vtd_translate_pt(uint16_t sid, uint64_t addr) "source id 0x%"PRIu16", iova= 0x%"PRIx64 =20 # hw/i386/amd_iommu.c amdvi_evntlog_fail(uint64_t addr, uint32_t head) "error: fail to write at = addr 0x%"PRIx64" + offset 0x%"PRIx32 diff --git a/hw/i386/x86-iommu.c b/hw/i386/x86-iommu.c index 02b8825..293caf8 100644 --- a/hw/i386/x86-iommu.c +++ b/hw/i386/x86-iommu.c @@ -91,6 +91,7 @@ static void x86_iommu_realize(DeviceState *dev, Error **e= rrp) static Property x86_iommu_properties[] =3D { DEFINE_PROP_BOOL("intremap", X86IOMMUState, intr_supported, false), DEFINE_PROP_BOOL("device-iotlb", X86IOMMUState, dt_supported, false), + DEFINE_PROP_BOOL("pt", X86IOMMUState, pt_supported, true), DEFINE_PROP_END_OF_LIST(), }; =20 diff --git a/include/hw/i386/x86-iommu.h b/include/hw/i386/x86-iommu.h index 361c07c..ef89c0c 100644 --- a/include/hw/i386/x86-iommu.h +++ b/include/hw/i386/x86-iommu.h @@ -74,6 +74,7 @@ struct X86IOMMUState { SysBusDevice busdev; bool intr_supported; /* Whether vIOMMU supports IR */ bool dt_supported; /* Whether vIOMMU supports DT */ + bool pt_supported; /* Whether vIOMMU supports pass-through */ IommuType type; /* IOMMU type - AMD/Intel */ QLIST_HEAD(, IEC_Notifier) iec_notifiers; /* IEC notify list */ }; --=20 2.7.4