From nobody Mon Feb 9 10:12:03 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1492077112536144.45568502487515; Thu, 13 Apr 2017 02:51:52 -0700 (PDT) Received: from localhost ([::1]:48339 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cybPq-0000cZ-V7 for importer@patchew.org; Thu, 13 Apr 2017 05:51:50 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40932) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cybH7-0002Ja-Qi for qemu-devel@nongnu.org; Thu, 13 Apr 2017 05:42:53 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cybH3-0000vz-T7 for qemu-devel@nongnu.org; Thu, 13 Apr 2017 05:42:49 -0400 Received: from 10.mo178.mail-out.ovh.net ([46.105.76.150]:54526) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cybH3-0000vl-Mo for qemu-devel@nongnu.org; Thu, 13 Apr 2017 05:42:45 -0400 Received: from player715.ha.ovh.net (b9.ovh.net [213.186.33.59]) by mo178.mail-out.ovh.net (Postfix) with ESMTP id 01939317E8 for ; Thu, 13 Apr 2017 11:42:43 +0200 (CEST) Received: from zorba.kaod.org.com (LFbn-1-10647-27.w90-89.abo.wanadoo.fr [90.89.233.27]) (Authenticated sender: clg@kaod.org) by player715.ha.ovh.net (Postfix) with ESMTPSA id C22781C0091; Thu, 13 Apr 2017 11:42:35 +0200 (CEST) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: Peter Maydell Date: Thu, 13 Apr 2017 11:41:53 +0200 Message-Id: <1492076514-28821-5-git-send-email-clg@kaod.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1492076514-28821-1-git-send-email-clg@kaod.org> References: <1492076514-28821-1-git-send-email-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 5193494799208975121 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeeliedrudekgddujecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 46.105.76.150 Subject: [Qemu-devel] [PATCH v2 4/5] aspeed: add a FTGMAC100 nic X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jan Kiszka , Jason Wang , qemu-devel@nongnu.org, qemu-arm@nongnu.org, =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Dmitry Fleytman , Samuel Thibault Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" There is a second NIC but we do not use it for the moment. We use the 'aspeed' property to tune the definition of the end of ring buffer bit for the Aspeed SoCs. Signed-off-by: C=C3=A9dric Le Goater --- hw/arm/aspeed_soc.c | 21 +++++++++++++++++++++ include/hw/arm/aspeed_soc.h | 2 ++ 2 files changed, 23 insertions(+) diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c index 712ae9d6c54d..af0964cf6add 100644 --- a/hw/arm/aspeed_soc.c +++ b/hw/arm/aspeed_soc.c @@ -19,6 +19,7 @@ #include "hw/char/serial.h" #include "qemu/log.h" #include "hw/i2c/aspeed_i2c.h" +#include "net/net.h" =20 #define ASPEED_SOC_UART_5_BASE 0x00184000 #define ASPEED_SOC_IOMEM_SIZE 0x00200000 @@ -33,6 +34,8 @@ #define ASPEED_SOC_TIMER_BASE 0x1E782000 #define ASPEED_SOC_WDT_BASE 0x1E785000 #define ASPEED_SOC_I2C_BASE 0x1E78A000 +#define ASPEED_SOC_ETH1_BASE 0x1E660000 +#define ASPEED_SOC_ETH2_BASE 0x1E680000 =20 static const int uart_irqs[] =3D { 9, 32, 33, 34, 10 }; static const int timer_irqs[] =3D { 16, 17, 18, 35, 36, 37, 38, 39, }; @@ -177,6 +180,10 @@ static void aspeed_soc_init(Object *obj) qdev_set_parent_bus(DEVICE(&s->wdt), sysbus_get_default()); object_property_add_const_link(OBJECT(&s->wdt), "scu", OBJECT(&s->scu), NULL); + + object_initialize(&s->ftgmac100, sizeof(s->ftgmac100), TYPE_FTGMAC100); + object_property_add_child(obj, "ftgmac100", OBJECT(&s->ftgmac100), NUL= L); + qdev_set_parent_bus(DEVICE(&s->ftgmac100), sysbus_get_default()); } =20 static void aspeed_soc_realize(DeviceState *dev, Error **errp) @@ -304,6 +311,20 @@ static void aspeed_soc_realize(DeviceState *dev, Error= **errp) return; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt), 0, ASPEED_SOC_WDT_BASE); + + /* Net */ + qdev_set_nic_properties(DEVICE(&s->ftgmac100), &nd_table[0]); + object_property_set_bool(OBJECT(&s->ftgmac100), true, "aspeed", &err); + object_property_set_bool(OBJECT(&s->ftgmac100), true, "realized", + &local_err); + error_propagate(&err, local_err); + if (err) { + error_propagate(errp, err); + return; + } + sysbus_mmio_map(SYS_BUS_DEVICE(&s->ftgmac100), 0, ASPEED_SOC_ETH1_BASE= ); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->ftgmac100), 0, + qdev_get_gpio_in(DEVICE(&s->vic), 2)); } =20 static void aspeed_soc_class_init(ObjectClass *oc, void *data) diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index dbec0c159885..4c5fc66a1ee0 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -20,6 +20,7 @@ #include "hw/i2c/aspeed_i2c.h" #include "hw/ssi/aspeed_smc.h" #include "hw/watchdog/wdt_aspeed.h" +#include "hw/net/ftgmac100.h" =20 #define ASPEED_SPIS_NUM 2 =20 @@ -39,6 +40,7 @@ typedef struct AspeedSoCState { AspeedSMCState spi[ASPEED_SPIS_NUM]; AspeedSDMCState sdmc; AspeedWDTState wdt; + FTGMAC100State ftgmac100; } AspeedSoCState; =20 #define TYPE_ASPEED_SOC "aspeed-soc" --=20 2.7.4