From nobody Mon Feb 9 15:10:54 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1491821322137159.24703364162053; Mon, 10 Apr 2017 03:48:42 -0700 (PDT) Received: from localhost ([::1]:33659 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cxWsC-0004Cu-Rp for importer@patchew.org; Mon, 10 Apr 2017 06:48:40 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54068) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cxWoi-0001TV-4m for qemu-devel@nongnu.org; Mon, 10 Apr 2017 06:45:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cxWoh-00084D-5A for qemu-devel@nongnu.org; Mon, 10 Apr 2017 06:45:04 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:49107) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1cxWoe-000826-T4; Mon, 10 Apr 2017 06:45:01 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1cxWjk-0005RL-GP; Mon, 10 Apr 2017 11:39:56 +0100 From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Mon, 10 Apr 2017 11:39:51 +0100 Message-Id: <1491820793-5348-6-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1491820793-5348-1-git-send-email-peter.maydell@linaro.org> References: <1491820793-5348-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PATCH 5/7] arm: Move condition-failed codepath generation out of if() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , patches@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Move the code to generate the "condition failed" instruction codepath out of the if (singlestepping) {} else {}. This will allow adding support for handling a new is_jmp type which can't be neatly split into "singlestepping case" versus "not singlestepping case". Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- target/arm/translate.c | 24 +++++++++++------------- 1 file changed, 11 insertions(+), 13 deletions(-) diff --git a/target/arm/translate.c b/target/arm/translate.c index a1a0e73..87fd702 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -11988,9 +11988,9 @@ void gen_intermediate_code(CPUARMState *env, Transl= ationBlock *tb) /* At this stage dc->condjmp will only be set when the skipped instruction was a conditional branch or trap, and the PC has already been written. */ + gen_set_condexec(dc); if (unlikely(cs->singlestep_enabled || dc->ss_active)) { /* Unconditional and "condition passed" instruction codepath. */ - gen_set_condexec(dc); switch (dc->is_jmp) { case DISAS_SWI: gen_ss_advance(dc); @@ -12013,13 +12013,6 @@ void gen_intermediate_code(CPUARMState *env, Trans= lationBlock *tb) /* FIXME: Single stepping a WFI insn will not halt the CPU. */ gen_singlestep_exception(dc); } - if (dc->condjmp) { - /* "Condition failed" instruction codepath. */ - gen_set_label(dc->condlabel); - gen_set_condexec(dc); - gen_set_pc_im(dc, dc->pc); - gen_singlestep_exception(dc); - } } else { /* While branches must always occur at the end of an IT block, there are a few other things that can cause us to terminate @@ -12029,7 +12022,6 @@ void gen_intermediate_code(CPUARMState *env, Transl= ationBlock *tb) - Hardware watchpoints. Hardware breakpoints have already been handled and skip this co= de. */ - gen_set_condexec(dc); switch(dc->is_jmp) { case DISAS_NEXT: gen_goto_tb(dc, 1, dc->pc); @@ -12069,11 +12061,17 @@ void gen_intermediate_code(CPUARMState *env, Tran= slationBlock *tb) gen_exception(EXCP_SMC, syn_aa32_smc(), 3); break; } - if (dc->condjmp) { - gen_set_label(dc->condlabel); - gen_set_condexec(dc); + } + + if (dc->condjmp) { + /* "Condition failed" instruction codepath for the branch/trap ins= n */ + gen_set_label(dc->condlabel); + gen_set_condexec(dc); + if (unlikely(cs->singlestep_enabled || dc->ss_active)) { + gen_set_pc_im(dc, dc->pc); + gen_singlestep_exception(dc); + } else { gen_goto_tb(dc, 1, dc->pc); - dc->condjmp =3D 0; } } =20 --=20 2.7.4