From nobody Tue Feb 10 05:10:42 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1498467727841672.4321094734406; Mon, 26 Jun 2017 02:02:07 -0700 (PDT) Received: from localhost ([::1]:45381 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dPPuI-00048h-AE for importer@patchew.org; Mon, 26 Jun 2017 05:02:06 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46306) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dPPrT-0001vP-KJ for qemu-devel@nongnu.org; Mon, 26 Jun 2017 04:59:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dPPrQ-0004Ph-6x for qemu-devel@nongnu.org; Mon, 26 Jun 2017 04:59:11 -0400 Received: from mga11.intel.com ([192.55.52.93]:49171) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dPPrP-0004Oi-Th for qemu-devel@nongnu.org; Mon, 26 Jun 2017 04:59:08 -0400 Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Jun 2017 01:59:06 -0700 Received: from yzhang13-kvm.sh.intel.com ([10.239.36.121]) by fmsmga006.fm.intel.com with ESMTP; 26 Jun 2017 01:58:39 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.39,394,1493708400"; d="scan'208";a="119263337" From: Yulei Zhang To: qemu-devel@nongnu.org Date: Tue, 4 Apr 2017 18:32:49 +0800 Message-Id: <1491301977-24481-2-git-send-email-yulei.zhang@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1491301977-24481-1-git-send-email-yulei.zhang@intel.com> References: <1491301977-24481-1-git-send-email-yulei.zhang@intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 192.55.52.93 Subject: [Qemu-devel] [Intel-gfx][RFC 1/9] drm/i915/gvt: Apply g2h adjust for GTT mmio access X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kevin.tian@intel.com, joonas.lahtinen@linux.intel.com, zhenyuw@linux.intel.com, Yulei Zhang , xiao.zheng@intel.com, zhi.a.wang@intel.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Apply guest to host gma conversion while guest try to access the GTT mmio registers, as after enable live migration the host gma will be changed due to the resourece re-allocation, but guest gma should be remaining unchanged, thus g2h conversion is request for it. Signed-off-by: Yulei Zhang --- drivers/gpu/drm/i915/gvt/gtt.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/gvt/gtt.c b/drivers/gpu/drm/i915/gvt/gtt.c index 66374db..df596a6 100644 --- a/drivers/gpu/drm/i915/gvt/gtt.c +++ b/drivers/gpu/drm/i915/gvt/gtt.c @@ -59,8 +59,7 @@ bool intel_gvt_ggtt_validate_range(struct intel_vgpu *vgp= u, u64 addr, u32 size) /* translate a guest gmadr to host gmadr */ int intel_gvt_ggtt_gmadr_g2h(struct intel_vgpu *vgpu, u64 g_addr, u64 *h_a= ddr) { - if (WARN(!vgpu_gmadr_is_valid(vgpu, g_addr), - "invalid guest gmadr %llx\n", g_addr)) + if (!vgpu_gmadr_is_valid(vgpu, g_addr)) return -EACCES; =20 if (vgpu_gmadr_is_aperture(vgpu, g_addr)) @@ -1819,17 +1818,15 @@ static int emulate_gtt_mmio_write(struct intel_vgpu= *vgpu, unsigned int off, struct intel_vgpu_mm *ggtt_mm =3D vgpu->gtt.ggtt_mm; struct intel_gvt_gtt_pte_ops *ops =3D gvt->gtt.pte_ops; unsigned long g_gtt_index =3D off >> info->gtt_entry_size_shift; - unsigned long gma; + unsigned long h_gtt_index; struct intel_gvt_gtt_entry e, m; int ret; =20 if (bytes !=3D 4 && bytes !=3D 8) return -EINVAL; =20 - gma =3D g_gtt_index << GTT_PAGE_SHIFT; - /* the VM may configure the whole GM space when ballooning is used */ - if (!vgpu_gmadr_is_valid(vgpu, gma)) + if (intel_gvt_ggtt_index_g2h(vgpu, g_gtt_index, &h_gtt_index)) return 0; =20 ggtt_get_guest_entry(ggtt_mm, &e, g_gtt_index); @@ -1852,7 +1849,7 @@ static int emulate_gtt_mmio_write(struct intel_vgpu *= vgpu, unsigned int off, ops->set_pfn(&m, gvt->gtt.scratch_ggtt_mfn); } =20 - ggtt_set_shadow_entry(ggtt_mm, &m, g_gtt_index); + ggtt_set_shadow_entry(ggtt_mm, &m, h_gtt_index); gtt_invalidate(gvt->dev_priv); ggtt_set_guest_entry(ggtt_mm, &e, g_gtt_index); return 0; --=20 2.7.4