From nobody Tue Dec 16 16:18:44 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1490189856637926.789204953266; Wed, 22 Mar 2017 06:37:36 -0700 (PDT) Received: from localhost ([::1]:51132 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cqgSF-0002KT-4X for importer@patchew.org; Wed, 22 Mar 2017 09:37:35 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44270) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cqgNq-0006wS-QL for qemu-devel@nongnu.org; Wed, 22 Mar 2017 09:33:04 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cqgNp-0001j2-Sq for qemu-devel@nongnu.org; Wed, 22 Mar 2017 09:33:02 -0400 Received: from mx1.redhat.com ([209.132.183.28]:57298) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cqgNn-0001i4-AI; Wed, 22 Mar 2017 09:32:59 -0400 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 4930B43A42; Wed, 22 Mar 2017 13:32:59 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 489C96046C; Wed, 22 Mar 2017 13:32:57 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 4930B43A42 Authentication-Results: ext-mx06.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx06.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 4930B43A42 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Wed, 22 Mar 2017 14:32:28 +0100 Message-Id: <1490189568-167621-4-git-send-email-imammedo@redhat.com> In-Reply-To: <1490189568-167621-1-git-send-email-imammedo@redhat.com> References: <1490189568-167621-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Wed, 22 Mar 2017 13:32:59 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH for-2.10 03/23] hw/arm/virt: use machine->possible_cpus for storing possible topology info X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Andrew Jones , Eduardo Habkost , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Shannon Zhao , Paolo Bonzini , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" for now precalculate and store mp_afinity in possible_cpus as ARM cpus don't have socket/core/thread-id properties yet. In follow patches possible_cpus will be used for storing and setting NUMA node mapping and replace legacy bitmap based numa_info[node_id].node_cpu/numa_get_node_for_cpu() For the lack of better idea, this patch cannibalizes possible_cpus.cpus[x].props.thread_id so that *_cpu_index_to_props() callback could return addressable by props CPU which will used by machine_set_cpu_numa_node() in follow up patches to assign a CPU to node. But cannibalizing is fine for now as that thread_id isn't exposed to users (no hotpluggable_cpus callback support for ARM yet) and it will be used only internally until 'device_add cpu' is supported where we can decide on which properties to use. Signed-off-by: Igor Mammedov --- hw/arm/virt.c | 39 ++++++++++++++++++++++++++++++++++++--- 1 file changed, 36 insertions(+), 3 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 484754e..4de46b1 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1237,6 +1237,7 @@ static void machvirt_init(MachineState *machine) { VirtMachineState *vms =3D VIRT_MACHINE(machine); VirtMachineClass *vmc =3D VIRT_MACHINE_GET_CLASS(machine); + MachineClass *mc =3D MACHINE_GET_CLASS(machine); qemu_irq pic[NUM_IRQS]; MemoryRegion *sysmem =3D get_system_memory(); MemoryRegion *secure_sysmem =3D NULL; @@ -1360,10 +1361,16 @@ static void machvirt_init(MachineState *machine) exit(1); } =20 - for (n =3D 0; n < smp_cpus; n++) { - Object *cpuobj =3D object_new(typename); + mc->possible_cpu_arch_ids(machine); + for (n =3D 0; n < machine->possible_cpus->len; n++) { + Object *cpuobj; =20 - object_property_set_int(cpuobj, virt_idx2mp_affinity(vms, n), + if (n >=3D smp_cpus) { + break; + } + + cpuobj =3D object_new(typename); + object_property_set_int(cpuobj, machine->possible_cpus->cpus[n].ar= ch_id, "mp-affinity", NULL); =20 if (!vms->secure) { @@ -1543,6 +1550,31 @@ static void virt_set_gic_version(Object *obj, const = char *value, Error **errp) } } =20 +static const CPUArchIdList *virt_possible_cpu_arch_ids(MachineState *ms) +{ + int n; + VirtMachineState *vms =3D VIRT_MACHINE(ms); + + if (ms->possible_cpus) { + assert(ms->possible_cpus->len =3D=3D max_cpus); + return ms->possible_cpus; + } + + ms->possible_cpus =3D g_malloc0(sizeof(CPUArchIdList) + + sizeof(CPUArchId) * max_cpus); + ms->possible_cpus->len =3D max_cpus; + for (n =3D 0; n < ms->possible_cpus->len; n++) { + ms->possible_cpus->cpus[n].arch_id =3D + virt_idx2mp_affinity(vms, n); + ms->possible_cpus->cpus[n].props.has_thread_id =3D true; + ms->possible_cpus->cpus[n].props.thread_id =3D n; + + /* TODO: add 'has_node/node' here to describe + to which node core belongs */ + } + return ms->possible_cpus; +} + static void virt_machine_class_init(ObjectClass *oc, void *data) { MachineClass *mc =3D MACHINE_CLASS(oc); @@ -1559,6 +1591,7 @@ static void virt_machine_class_init(ObjectClass *oc, = void *data) mc->pci_allow_0_address =3D true; /* We know we will never create a pre-ARMv7 CPU which needs 1K pages */ mc->minimum_page_bits =3D 12; + mc->possible_cpu_arch_ids =3D virt_possible_cpu_arch_ids; } =20 static const TypeInfo virt_machine_info =3D { --=20 2.7.4