From nobody Tue Dec 16 16:35:14 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1490190203945620.2902063015409; Wed, 22 Mar 2017 06:43:23 -0700 (PDT) Received: from localhost ([::1]:51182 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cqgXp-0007QK-VO for importer@patchew.org; Wed, 22 Mar 2017 09:43:22 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44898) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cqgOw-0007zc-5b for qemu-devel@nongnu.org; Wed, 22 Mar 2017 09:34:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cqgOs-00020W-4M for qemu-devel@nongnu.org; Wed, 22 Mar 2017 09:34:10 -0400 Received: from mx1.redhat.com ([209.132.183.28]:58902) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cqgOk-0001yH-BM; Wed, 22 Mar 2017 09:33:58 -0400 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 46AF4254A; Wed, 22 Mar 2017 13:33:58 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id E61BDA5660; Wed, 22 Mar 2017 13:33:47 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 46AF4254A Authentication-Results: ext-mx06.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx06.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 46AF4254A From: Igor Mammedov To: qemu-devel@nongnu.org Date: Wed, 22 Mar 2017 14:32:35 +0100 Message-Id: <1490189568-167621-11-git-send-email-imammedo@redhat.com> In-Reply-To: <1490189568-167621-1-git-send-email-imammedo@redhat.com> References: <1490189568-167621-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Wed, 22 Mar 2017 13:33:58 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH for-2.10 10/23] numa: mirror cpu to node mapping in MachineState::possible_cpus X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Andrew Jones , Eduardo Habkost , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Shannon Zhao , Paolo Bonzini , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Introduce machine_set_cpu_numa_node() helper that stores node mapping for CPU in MachineState::possible_cpus. CPU and node it belongs to is specified by 'props' argument. Patch doesn't remove old way of storing mapping in numa_info[X].node_cpu as removing it at the same time makes patch rather big. Instead it just mirrors mapping in possible_cpus and follow up per target patches will switch to possible_cpus and numa_info[X].node_cpu will be removed once there isn't any users left. Signed-off-by: Igor Mammedov Reviewed-by: David Gibson --- include/hw/boards.h | 2 ++ hw/core/machine.c | 68 +++++++++++++++++++++++++++++++++++++++++++++++++= ++++ numa.c | 8 +++++++ 3 files changed, 78 insertions(+) diff --git a/include/hw/boards.h b/include/hw/boards.h index 1dd0fde..40f30f1 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -42,6 +42,8 @@ bool machine_dump_guest_core(MachineState *machine); bool machine_mem_merge(MachineState *machine); void machine_register_compat_props(MachineState *machine); HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine= ); +void machine_set_cpu_numa_node(MachineState *machine, + CpuInstanceProperties *props, Error **errp); =20 /** * CPUArchId: diff --git a/hw/core/machine.c b/hw/core/machine.c index 0d92672..6ff0b45 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -388,6 +388,74 @@ HotpluggableCPUList *machine_query_hotpluggable_cpus(M= achineState *machine) return head; } =20 +void machine_set_cpu_numa_node(MachineState *machine, + CpuInstanceProperties *props, Error **errp) +{ + MachineClass *mc =3D MACHINE_GET_CLASS(machine); + bool match =3D false; + int i; + + if (!mc->possible_cpu_arch_ids) { + error_setg(errp, "mapping of CPUs to NUMA node is not supported"); + return; + } + + /* force board to initialize possible_cpus if it hasn't been done yet = */ + mc->possible_cpu_arch_ids(machine); + + for (i =3D 0; i < machine->possible_cpus->len; i++) { + CPUArchId *slot =3D &machine->possible_cpus->cpus[i]; + + /* reject unsupported by board properties */ + if (props->has_thread_id && !slot->props.has_thread_id) { + error_setg(errp, "thread-id is not supported"); + return; + } + + if (props->has_core_id && !slot->props.has_core_id) { + error_setg(errp, "core-id is not supported"); + return; + } + + if (props->has_socket_id && !slot->props.has_socket_id) { + error_setg(errp, "socket-id is not supported"); + return; + } + + /* skip slots with explicit mismatch */ + if (props->has_thread_id && props->thread_id !=3D slot->props.thre= ad_id) { + continue; + } + + if (props->has_core_id && props->core_id !=3D slot->props.core_id)= { + continue; + } + + if (props->has_socket_id && props->socket_id !=3D slot->props.sock= et_id) { + continue; + } + + /* reject assignment if slot is already assigned, for compatibility + * of legacy cpu_index mapping with SPAPR core based mapping do not + * error out if cpu thread and matched core have the same node-id = */ + if (slot->props.has_node_id && + slot->props.node_id !=3D props->node_id) { + error_setg(errp, "CPU is already assigned to node-id: %" PRId6= 4, + slot->props.node_id); + return; + } + + /* assign slot to node as it's matched '-numa cpu' key */ + match =3D true; + slot->props.node_id =3D props->node_id; + slot->props.has_node_id =3D props->has_node_id; + } + + if (!match) { + error_setg(errp, "no match found"); + } +} + static void machine_class_init(ObjectClass *oc, void *data) { MachineClass *mc =3D MACHINE_CLASS(oc); diff --git a/numa.c b/numa.c index 24c596d..44057f1 100644 --- a/numa.c +++ b/numa.c @@ -169,6 +169,7 @@ static void numa_node_parse(MachineState *ms, NumaNodeO= ptions *node, exit(1); } for (cpus =3D node->cpus; cpus; cpus =3D cpus->next) { + CpuInstanceProperties props; if (cpus->value >=3D max_cpus) { error_setg(errp, "CPU index (%" PRIu16 ")" @@ -177,6 +178,10 @@ static void numa_node_parse(MachineState *ms, NumaNode= Options *node, return; } bitmap_set(numa_info[nodenr].node_cpu, cpus->value, 1); + props =3D mc->cpu_index_to_instance_props(ms, cpus->value); + props.node_id =3D nodenr; + props.has_node_id =3D true; + machine_set_cpu_numa_node(ms, &props, &error_fatal); } =20 if (node->has_mem && node->has_memdev) { @@ -393,9 +398,12 @@ void parse_numa_opts(MachineState *ms) if (i =3D=3D nb_numa_nodes) { for (i =3D 0; i < max_cpus; i++) { CpuInstanceProperties props; + /* fetch default mapping from board and enable it */ props =3D mc->cpu_index_to_instance_props(ms, i); + props.has_node_id =3D true; =20 set_bit(i, numa_info[props.node_id].node_cpu); + machine_set_cpu_numa_node(ms, &props, &error_fatal); } } =20 --=20 2.7.4