From nobody Tue May 7 21:52:37 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1489750687597108.74407141280733; Fri, 17 Mar 2017 04:38:07 -0700 (PDT) Received: from localhost ([::1]:48374 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1coqCr-0003nz-Um for importer@patchew.org; Fri, 17 Mar 2017 07:38:05 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56821) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1coqBq-0003mM-QR for qemu-devel@nongnu.org; Fri, 17 Mar 2017 07:37:03 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1coqBl-000733-US for qemu-devel@nongnu.org; Fri, 17 Mar 2017 07:37:02 -0400 Received: from mga09.intel.com ([134.134.136.24]:35779) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1coqBl-00071r-Jn for qemu-devel@nongnu.org; Fri, 17 Mar 2017 07:36:57 -0400 Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 17 Mar 2017 04:36:55 -0700 Received: from lantianyu-ws.sh.intel.com (HELO localhost) ([10.239.159.159]) by orsmga002.jf.intel.com with ESMTP; 17 Mar 2017 04:36:54 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=intel.com; i=@intel.com; q=dns/txt; s=intel; t=1489750617; x=1521286617; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=5vvLra+IsVOnGrZXgXFsNLi4Y1ZxUU9+Pd4IK6lHhCU=; b=n/Jtiv2UshecyZtNa2FIrNl8mFpDos2wH7GFPVFJIJdvQMLXmMZiw1Nf f6T4sTzXBPjCNkj49O9tTiqF1M6qzQ==; X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.36,176,1486454400"; d="scan'208";a="61628326" From: Lan Tianyu To: qemu-devel@nongnu.org Date: Fri, 17 Mar 2017 19:29:14 +0800 Message-Id: <1489750157-17401-2-git-send-email-tianyu.lan@intel.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1489750157-17401-1-git-send-email-tianyu.lan@intel.com> References: <1489750157-17401-1-git-send-email-tianyu.lan@intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.24 Subject: [Qemu-devel] [RFC PATCH 1/4] I440: Allow adding sysbus devices with -device on I440 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lan Tianyu , kevin.tian@intel.com, ehabkost@redhat.com, mst@redhat.com, pbonzini@redhat.com, chao.gao@intel.com, rth@twiddle.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Chao Gao xen-viommu will be a sysbus device and the device model will be enabled via "-device" parameter. Signed-off-by: Chao Gao Signed-off-by: Lan Tianyu --- hw/i386/pc_piix.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index a07dc81..3289593 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -436,6 +436,7 @@ static void pc_i440fx_machine_options(MachineClass *m) m->hot_add_cpu =3D pc_hot_add_cpu; m->default_machine_opts =3D "firmware=3Dbios-256k.bin"; m->default_display =3D "std"; + m->has_dynamic_sysbus =3D true; } =20 static void pc_i440fx_2_7_machine_options(MachineClass *m) --=20 1.8.3.1 From nobody Tue May 7 21:52:37 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 148975069460471.8212567776468; Fri, 17 Mar 2017 04:38:14 -0700 (PDT) Received: from localhost ([::1]:48376 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1coqCz-0003tc-8Q for importer@patchew.org; Fri, 17 Mar 2017 07:38:13 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56850) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1coqBs-0003nq-Ul for qemu-devel@nongnu.org; Fri, 17 Mar 2017 07:37:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1coqBo-00079R-HI for qemu-devel@nongnu.org; Fri, 17 Mar 2017 07:37:04 -0400 Received: from mga03.intel.com ([134.134.136.65]:56985) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1coqBo-00076s-5s for qemu-devel@nongnu.org; Fri, 17 Mar 2017 07:37:00 -0400 Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 17 Mar 2017 04:36:59 -0700 Received: from lantianyu-ws.sh.intel.com (HELO localhost) ([10.239.159.159]) by orsmga005.jf.intel.com with ESMTP; 17 Mar 2017 04:36:57 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=intel.com; i=@intel.com; q=dns/txt; s=intel; t=1489750620; x=1521286620; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=FJn+QHsAGjc/hwhMYdxcpzF/yDLppitdiY2JCZnxdjU=; b=gRQL6WHek6Oe+FMZA/fu6R3WDmJiOEnD0nSMStEnSLM6/vk9dz68Ttzx fWuQ3Ao4nVxRRO76faDyzGqT2HDBJQ==; X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.36,176,1486454400"; d="scan'208";a="76518137" From: Lan Tianyu To: xen-devel@lists.xensource.com, qemu-devel@nongnu.org Date: Fri, 17 Mar 2017 19:29:15 +0800 Message-Id: <1489750157-17401-3-git-send-email-tianyu.lan@intel.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1489750157-17401-1-git-send-email-tianyu.lan@intel.com> References: <1489750157-17401-1-git-send-email-tianyu.lan@intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.65 Subject: [Qemu-devel] [RFC PATCH 2/4] Xen: add a dummy vIOMMU to create/destroy vIOMMU in Xen X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: anthony.perard@citrix.com, Lan Tianyu , kevin.tian@intel.com, sstabellini@kernel.org, chao.gao@intel.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Chao Gao Since adding a dynamic sysbus device is forbidden, so choose TYPE_DEVICE as parent class. Signed-off-by: Chao Gao Signed-off-by: Lan Tianyu --- hw/xen/Makefile.objs | 1 + hw/xen/xen_viommu.c | 116 +++++++++++++++++++++++++++++++++++++++++++++++= ++++ 2 files changed, 117 insertions(+) create mode 100644 hw/xen/xen_viommu.c diff --git a/hw/xen/Makefile.objs b/hw/xen/Makefile.objs index d367094..e37d808 100644 --- a/hw/xen/Makefile.objs +++ b/hw/xen/Makefile.objs @@ -3,3 +3,4 @@ common-obj-$(CONFIG_XEN_BACKEND) +=3D xen_backend.o xen_dev= config.o =20 obj-$(CONFIG_XEN_PCI_PASSTHROUGH) +=3D xen-host-pci-device.o obj-$(CONFIG_XEN_PCI_PASSTHROUGH) +=3D xen_pt.o xen_pt_config_init.o xen_p= t_graphics.o xen_pt_msi.o +obj-$(CONFIG_XEN) +=3D xen_viommu.o diff --git a/hw/xen/xen_viommu.c b/hw/xen/xen_viommu.c new file mode 100644 index 0000000..9bf9158 --- /dev/null +++ b/hw/xen/xen_viommu.c @@ -0,0 +1,116 @@ +/* + * Xen virtual IOMMU (virtual VT-D) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, see . + */ + +#include "qemu/osdep.h" +#include "qemu/error-report.h" + +#include "hw/qdev-core.h" +#include "hw/sysbus.h" +#include "hw/xen/xen.h" +#include "hw/xen/xen_backend.h" + +#define TYPE_XEN_VIOMMU_DEVICE "xen_viommu" +#define XEN_VIOMMU_DEVICE(obj) \ + OBJECT_CHECK(XenVIOMMUState, (obj), TYPE_XEN_VIOMMU_DEVICE) + +typedef struct XenVIOMMUState XenVIOMMUState; + +struct XenVIOMMUState { + DeviceState dev; + uint32_t id; + uint64_t cap; + uint64_t base_addr; +}; + +static void xen_viommu_realize(DeviceState *dev, Error **errp) +{ + int rc; + uint64_t cap; + char *dom; + char viommu_path[1024]; + XenVIOMMUState *s =3D XEN_VIOMMU_DEVICE(dev); + + s->id =3D -1; + =20 + /* Read vIOMMU attributes from Xenstore. */ + dom =3D xs_get_domain_path(xenstore, xen_domid); + snprintf(viommu_path, sizeof(viommu_path), "%s/viommu", dom); + rc =3D xenstore_read_uint64(viommu_path, "base_addr", &s->base_addr); =20 + if (rc) { + error_report("Can't get base address of vIOMMU"); + exit(1); + } + + rc =3D xenstore_read_uint64(viommu_path, "cap", &s->cap); + if (rc) { + error_report("Can't get capabilities of vIOMMU"); + exit(1); + } + + rc =3D xc_viommu_query_cap(xen_xc, xen_domid, &cap); + if (rc) { + exit(1); + } + + + if ((cap & s->cap) !=3D cap) { + error_report("xen: Unsupported capability %lx", s->cap); + exit(1); + } + + rc =3D xc_viommu_create(xen_xc, xen_domid, s->base_addr, s->cap, &s->i= d); + if (rc) { + s->id =3D -1; + error_report("xen: failed(%d) to create viommu ", rc); + exit(1); + } +} + +static void xen_viommu_instance_finalize(Object *o) +{ + int rc; + XenVIOMMUState *s =3D XEN_VIOMMU_DEVICE(o); + + if (s->id !=3D -1) { + rc =3D xc_viommu_destroy(xen_xc, xen_domid, s->id);=20 + if (rc) { + error_report("xen: failed(%d) to destroy viommu ", rc); + } + } +} + +static void xen_viommu_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + dc->hotpluggable =3D false; + dc->realize =3D xen_viommu_realize; +} + +static const TypeInfo xen_viommu_info =3D { + .name =3D TYPE_XEN_VIOMMU_DEVICE, + .parent =3D TYPE_SYS_BUS_DEVICE, + .instance_size =3D sizeof(XenVIOMMUState), + .instance_finalize =3D xen_viommu_instance_finalize, + .class_init =3D xen_viommu_class_init, +}; + +static void xen_viommu_register_types(void) +{ + type_register_static(&xen_viommu_info);=20 +} + +type_init(xen_viommu_register_types); --=20 1.8.3.1 From nobody Tue May 7 21:52:37 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1489750691750868.7607295818872; Fri, 17 Mar 2017 04:38:11 -0700 (PDT) Received: from localhost ([::1]:48375 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1coqCw-0003rg-Av for importer@patchew.org; Fri, 17 Mar 2017 07:38:10 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56867) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1coqBt-0003oT-KO for qemu-devel@nongnu.org; Fri, 17 Mar 2017 07:37:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1coqBs-0007Dy-Lq for qemu-devel@nongnu.org; Fri, 17 Mar 2017 07:37:05 -0400 Received: from mga04.intel.com ([192.55.52.120]:37369) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1coqBs-0007DC-9m for qemu-devel@nongnu.org; Fri, 17 Mar 2017 07:37:04 -0400 Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 17 Mar 2017 04:37:03 -0700 Received: from lantianyu-ws.sh.intel.com (HELO localhost) ([10.239.159.159]) by fmsmga005.fm.intel.com with ESMTP; 17 Mar 2017 04:36:59 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=intel.com; i=@intel.com; q=dns/txt; s=intel; t=1489750624; x=1521286624; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=jqV/ruj5d6LzkA6SfRc3tg9uH9kQ3eeC6CX6Orkw+eM=; b=KfmN0GUPFXWV7wDIzgGW/0k3bYVnnbAqWIkSyU7f3tG7LPaUYUO+xOWL VHMwodgZ0gobioMU/7wxcYhyr6FISA==; X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.36,176,1486454400"; d="scan'208";a="77573860" From: Lan Tianyu To: xen-devel@lists.xensource.com, qemu-devel@nongnu.org Date: Fri, 17 Mar 2017 19:29:16 +0800 Message-Id: <1489750157-17401-4-git-send-email-tianyu.lan@intel.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1489750157-17401-1-git-send-email-tianyu.lan@intel.com> References: <1489750157-17401-1-git-send-email-tianyu.lan@intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 192.55.52.120 Subject: [Qemu-devel] [RFC PATCH 3/4] xen-pt: bind/unbind interrupt remapping format MSI X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lan Tianyu , kevin.tian@intel.com, sstabellini@kernel.org, mst@redhat.com, anthony.perard@citrix.com, chao.gao@intel.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Chao Gao If a vIOMMU is exposed to guest, guest will configure the msi to remapping format. The original code isn't suitable to the new format. A new pair bind/unbind interfaces are added for this usage. This patch recognizes this case and use new interfaces to bind/unbind msi. Signed-off-by: Chao Gao Signed-off-by: Lan Tianyu --- hw/xen/xen_pt_msi.c | 36 ++++++++++++++++++++++++++++-------- include/hw/i386/apic-msidef.h | 1 + 2 files changed, 29 insertions(+), 8 deletions(-) diff --git a/hw/xen/xen_pt_msi.c b/hw/xen/xen_pt_msi.c index 62add06..8b0d7fc 100644 --- a/hw/xen/xen_pt_msi.c +++ b/hw/xen/xen_pt_msi.c @@ -161,6 +161,7 @@ static int msi_msix_update(XenPCIPassthroughState *s, uint8_t gvec =3D msi_vector(data); uint32_t gflags =3D msi_gflags(data, addr); int rc =3D 0; + bool ir =3D !!(addr & MSI_ADDR_IM_MASK); uint64_t table_addr =3D 0; =20 XEN_PT_LOG(d, "Updating MSI%s with pirq %d gvec %#x gflags %#x" @@ -171,8 +172,14 @@ static int msi_msix_update(XenPCIPassthroughState *s, table_addr =3D s->msix->mmio_base_addr; } =20 - rc =3D xc_domain_update_msi_irq(xen_xc, xen_domid, gvec, + if (ir) { + rc =3D xc_domain_update_msi_irq_remapping(xen_xc, xen_domid, pirq, + d->devfn, data, addr, table_addr); + } + else { + rc =3D xc_domain_update_msi_irq(xen_xc, xen_domid, gvec, pirq, gflags, table_addr); + } =20 if (rc) { XEN_PT_ERR(d, "Updating of MSI%s failed. (err: %d)\n", @@ -204,13 +211,26 @@ static int msi_msix_disable(XenPCIPassthroughState *s, } =20 if (is_binded) { - XEN_PT_LOG(d, "Unbind MSI%s with pirq %d, gvec %#x\n", - is_msix ? "-X" : "", pirq, gvec); - rc =3D xc_domain_unbind_msi_irq(xen_xc, xen_domid, gvec, pirq, gfl= ags); - if (rc) { - XEN_PT_ERR(d, "Unbinding of MSI%s failed. (err: %d, pirq: %d, = gvec: %#x)\n", - is_msix ? "-X" : "", errno, pirq, gvec); - return rc; + if ( addr & MSI_ADDR_IM_MASK ) { + XEN_PT_LOG(d, "Unbinding of MSI%s . ( pirq: %d, data: %x, addr= : %lx)\n", + is_msix ? "-X" : "", pirq, data, addr); + rc =3D xc_domain_unbind_msi_irq_remapping(xen_xc, xen_domid, p= irq, + d->devfn, data, addr); + if (rc) { + XEN_PT_ERR(d, "Unbinding of MSI%s . (error: %d, pirq: %d, = data: %x, addr: %lx)\n", + is_msix ? "-X" : "", rc, pirq, data, addr); + return rc; + } + + } else { + XEN_PT_LOG(d, "Unbind MSI%s with pirq %d, gvec %#x\n", + is_msix ? "-X" : "", pirq, gvec); + rc =3D xc_domain_unbind_msi_irq(xen_xc, xen_domid, gvec, pirq,= gflags); + if (rc) { + XEN_PT_ERR(d, "Unbinding of MSI%s failed. (err: %d, pirq: = %d, gvec: %#x)\n", + is_msix ? "-X" : "", errno, pirq, gvec); + return rc; + } } } =20 diff --git a/include/hw/i386/apic-msidef.h b/include/hw/i386/apic-msidef.h index 8b4d4cc..08b584f 100644 --- a/include/hw/i386/apic-msidef.h +++ b/include/hw/i386/apic-msidef.h @@ -27,5 +27,6 @@ #define MSI_ADDR_DEST_ID_SHIFT 12 #define MSI_ADDR_DEST_IDX_SHIFT 4 #define MSI_ADDR_DEST_ID_MASK 0x00ffff0 +#define MSI_ADDR_IM_MASK 0x00000010 =20 #endif /* HW_APIC_MSIDEF_H */ --=20 1.8.3.1 From nobody Tue May 7 21:52:37 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1489750815647782.9300779231188; Fri, 17 Mar 2017 04:40:15 -0700 (PDT) Received: from localhost ([::1]:48384 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1coqEw-00066Y-53 for importer@patchew.org; Fri, 17 Mar 2017 07:40:14 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56974) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1coqBy-0003uM-Sh for qemu-devel@nongnu.org; Fri, 17 Mar 2017 07:37:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1coqBt-0007GD-W9 for qemu-devel@nongnu.org; Fri, 17 Mar 2017 07:37:10 -0400 Received: from mga02.intel.com ([134.134.136.20]:17799) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1coqBt-0007E2-Jy for qemu-devel@nongnu.org; Fri, 17 Mar 2017 07:37:05 -0400 Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 17 Mar 2017 04:37:04 -0700 Received: from lantianyu-ws.sh.intel.com (HELO localhost) ([10.239.159.159]) by FMSMGA003.fm.intel.com with ESMTP; 17 Mar 2017 04:37:02 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=intel.com; i=@intel.com; q=dns/txt; s=intel; t=1489750625; x=1521286625; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=6Gk3BaiuFTv0k/Cr/Wy/ZESn9c3IbDjF9nnsUCXRcc8=; b=AjFfQ1lx3Eb+LxWJ400wjfFMi4rmD5IHVDGN95JcdbI3O70DQlPOM/X1 r5wMXb8+VlM+fhTG433eYTFO41rrmg==; X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.36,176,1486454400"; d="scan'208";a="835822781" From: Lan Tianyu To: qemu-devel@nongnu.org, xen-devel@lists.xensource.com Date: Fri, 17 Mar 2017 19:29:17 +0800 Message-Id: <1489750157-17401-5-git-send-email-tianyu.lan@intel.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1489750157-17401-1-git-send-email-tianyu.lan@intel.com> References: <1489750157-17401-1-git-send-email-tianyu.lan@intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.20 Subject: [Qemu-devel] [RFC PATCH 4/4] msi: taking interrupt format into consideration during judging a pirq is binded with a event channel X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lan Tianyu , kevin.tian@intel.com, sstabellini@kernel.org, mst@redhat.com, anthony.perard@citrix.com, marcel@redhat.com, chao.gao@intel.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Chao Gao As remapping format interrupt has been introduced, the vector in msi remapp= ing format can also be 0, same as a interrupt is binded with a event channel. So we can't just use whether vector is 0 or not to judge a msi is binded to a event channel or not. This patch takes the msi interrupt format into consideration. Signed-off-by: Chao Gao Signed-off-by: Lan Tianyu --- hw/pci/msi.c | 5 +++-- hw/pci/msix.c | 4 +++- hw/xen/xen_pt_msi.c | 2 +- include/hw/xen/xen.h | 2 +- xen-hvm-stub.c | 2 +- xen-hvm.c | 7 ++++++- 6 files changed, 15 insertions(+), 7 deletions(-) diff --git a/hw/pci/msi.c b/hw/pci/msi.c index a87b227..8d1ac9e 100644 --- a/hw/pci/msi.c +++ b/hw/pci/msi.c @@ -289,7 +289,7 @@ void msi_reset(PCIDevice *dev) static bool msi_is_masked(const PCIDevice *dev, unsigned int vector) { uint16_t flags =3D pci_get_word(dev->config + msi_flags_off(dev)); - uint32_t mask, data; + uint32_t mask, data, addr_lo; bool msi64bit =3D flags & PCI_MSI_FLAGS_64BIT; assert(vector < PCI_MSI_VECTORS_MAX); =20 @@ -298,7 +298,8 @@ static bool msi_is_masked(const PCIDevice *dev, unsigne= d int vector) } =20 data =3D pci_get_word(dev->config + msi_data_off(dev, msi64bit)); - if (xen_is_pirq_msi(data)) { + addr_lo =3D pci_get_word(dev->config + msi_address_lo_off(dev)); + if (xen_is_pirq_msi(data, addr_lo)) { return false; } =20 diff --git a/hw/pci/msix.c b/hw/pci/msix.c index 0ec1cb1..6b8045a 100644 --- a/hw/pci/msix.c +++ b/hw/pci/msix.c @@ -81,9 +81,11 @@ static bool msix_vector_masked(PCIDevice *dev, unsigned = int vector, bool fmask) { unsigned offset =3D vector * PCI_MSIX_ENTRY_SIZE; uint8_t *data =3D &dev->msix_table[offset + PCI_MSIX_ENTRY_DATA]; + uint8_t *addr_lo =3D &dev->msix_table[offset + PCI_MSIX_ENTRY_LOWER_AD= DR]; /* MSIs on Xen can be remapped into pirqs. In those cases, masking * and unmasking go through the PV evtchn path. */ - if (xen_enabled() && xen_is_pirq_msi(pci_get_long(data))) { + if (xen_enabled() && xen_is_pirq_msi(pci_get_long(data), + pci_get_long(addr_lo))) { return false; } return fmask || dev->msix_table[offset + PCI_MSIX_ENTRY_VECTOR_CTRL] & diff --git a/hw/xen/xen_pt_msi.c b/hw/xen/xen_pt_msi.c index 8b0d7fc..f799fed 100644 --- a/hw/xen/xen_pt_msi.c +++ b/hw/xen/xen_pt_msi.c @@ -114,7 +114,7 @@ static int msi_msix_setup(XenPCIPassthroughState *s, =20 assert((!is_msix && msix_entry =3D=3D 0) || is_msix); =20 - if (xen_is_pirq_msi(data)) { + if (xen_is_pirq_msi(data, (uint32_t)(addr & 0xffffffff))) { *ppirq =3D msi_ext_dest_id(addr >> 32) | msi_dest_id(addr); if (!*ppirq) { /* this probably identifies an misconfiguration of the guest, diff --git a/include/hw/xen/xen.h b/include/hw/xen/xen.h index a8f3afb..c15beb5 100644 --- a/include/hw/xen/xen.h +++ b/include/hw/xen/xen.h @@ -33,7 +33,7 @@ int xen_pci_slot_get_pirq(PCIDevice *pci_dev, int irq_num= ); void xen_piix3_set_irq(void *opaque, int irq_num, int level); void xen_piix_pci_write_config_client(uint32_t address, uint32_t val, int = len); void xen_hvm_inject_msi(uint64_t addr, uint32_t data); -int xen_is_pirq_msi(uint32_t msi_data); +int xen_is_pirq_msi(uint32_t msi_data, uint32_t msi_addr_lo); =20 qemu_irq *xen_interrupt_controller_init(void); =20 diff --git a/xen-hvm-stub.c b/xen-hvm-stub.c index c500325..dae421c 100644 --- a/xen-hvm-stub.c +++ b/xen-hvm-stub.c @@ -31,7 +31,7 @@ void xen_hvm_inject_msi(uint64_t addr, uint32_t data) { } =20 -int xen_is_pirq_msi(uint32_t msi_data) +int xen_is_pirq_msi(uint32_t msi_data, uint32_t msi_addr_lo) { return 0; } diff --git a/xen-hvm.c b/xen-hvm.c index 2f348ed..9e78b23 100644 --- a/xen-hvm.c +++ b/xen-hvm.c @@ -146,8 +146,13 @@ void xen_piix_pci_write_config_client(uint32_t address= , uint32_t val, int len) } } =20 -int xen_is_pirq_msi(uint32_t msi_data) +int xen_is_pirq_msi(uint32_t msi_data, uint32_t msi_addr_lo) { + /* If msi address is configurate to remapping format, the msi will not + * remapped into a pirq. + */ + if ( msi_addr_lo & 0x10 ) + return 0; /* If vector is 0, the msi is remapped into a pirq, passed as * dest_id. */ --=20 1.8.3.1