From nobody Sat Feb 7 07:10:00 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 14896319468681006.8675866615107; Wed, 15 Mar 2017 19:39:06 -0700 (PDT) Received: from localhost ([::1]:40500 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1coLJh-0002W2-Nz for importer@patchew.org; Wed, 15 Mar 2017 22:39:05 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48864) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1coLFz-0000KZ-TA for qemu-devel@nongnu.org; Wed, 15 Mar 2017 22:35:16 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1coLFw-00018K-Pj for qemu-devel@nongnu.org; Wed, 15 Mar 2017 22:35:15 -0400 Received: from mail.kernel.org ([198.145.29.136]:32808) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1coLFw-000184-G6 for qemu-devel@nongnu.org; Wed, 15 Mar 2017 22:35:12 -0400 Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 97AAA203F1; Thu, 16 Mar 2017 02:35:10 +0000 (UTC) Received: from redhat.com (pool-96-237-235-121.bstnma.fios.verizon.net [96.237.235.121]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 4BF5F203E1; Thu, 16 Mar 2017 02:35:09 +0000 (UTC) Date: Thu, 16 Mar 2017 04:35:08 +0200 From: "Michael S. Tsirkin" To: qemu-devel@nongnu.org Message-ID: <1489631689-6382-5-git-send-email-mst@redhat.com> References: <1489631689-6382-1-git-send-email-mst@redhat.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1489631689-6382-1-git-send-email-mst@redhat.com> X-Mailer: git-send-email 2.8.0.287.g0deeb61 X-Mutt-Fcc: =sent X-Virus-Scanned: ClamAV using ClamSMTP X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 198.145.29.136 Subject: [Qemu-devel] [PULL 4/5] hw/virtio: fix Power Management Control Register for PCI Express virtio devices X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marcel Apfelbaum , Peter Maydell Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Marcel Apfelbaum Make Power Management State flag writable to conform with the PCI Express spec. Signed-off-by: Marcel Apfelbaum Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/virtio/virtio-pci.h | 4 ++++ include/hw/compat.h | 4 ++++ include/hw/pci/pcie.h | 2 ++ hw/virtio/virtio-pci.c | 11 +++++++++++ 4 files changed, 21 insertions(+) diff --git a/hw/virtio/virtio-pci.h b/hw/virtio/virtio-pci.h index 9b5dd5a..b095dfc 100644 --- a/hw/virtio/virtio-pci.h +++ b/hw/virtio/virtio-pci.h @@ -75,6 +75,7 @@ enum { VIRTIO_PCI_FLAG_ATS_BIT, VIRTIO_PCI_FLAG_INIT_DEVERR_BIT, VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT, + VIRTIO_PCI_FLAG_INIT_PM_BIT, }; =20 /* Need to activate work-arounds for buggy guests at vmstate load. */ @@ -108,6 +109,9 @@ enum { /* Init Link Control register */ #define VIRTIO_PCI_FLAG_INIT_LNKCTL (1 << VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT) =20 +/* Init Power Management */ +#define VIRTIO_PCI_FLAG_INIT_PM (1 << VIRTIO_PCI_FLAG_INIT_PM_BIT) + typedef struct { MSIMessage msg; int virq; diff --git a/include/hw/compat.h b/include/hw/compat.h index 0931aa5..90606f9 100644 --- a/include/hw/compat.h +++ b/include/hw/compat.h @@ -30,6 +30,10 @@ .driver =3D "virtio-pci",\ .property =3D "x-pcie-lnkctl-init",\ .value =3D "off",\ + },{\ + .driver =3D "virtio-pci",\ + .property =3D "x-pcie-pm-init",\ + .value =3D "off",\ }, =20 #define HW_COMPAT_2_7 \ diff --git a/include/hw/pci/pcie.h b/include/hw/pci/pcie.h index 11c6247..3d8f24b 100644 --- a/include/hw/pci/pcie.h +++ b/include/hw/pci/pcie.h @@ -63,6 +63,8 @@ typedef enum { struct PCIExpressDevice { /* Offset of express capability in config space */ uint8_t exp_cap; + /* Offset of Power Management capability in config space */ + uint8_t pm_cap; =20 /* SLOT */ bool hpev_notified; /* Logical AND of conditions for hot plug event. diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index 300aa4a..f9b7244 100644 --- a/hw/virtio/virtio-pci.c +++ b/hw/virtio/virtio-pci.c @@ -1812,6 +1812,7 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Er= ror **errp) =20 pos =3D pci_add_capability(pci_dev, PCI_CAP_ID_PM, 0, PCI_PM_SIZEO= F); assert(pos > 0); + pci_dev->exp.pm_cap =3D pos; =20 /* * Indicates that this function complies with revision 1.2 of the @@ -1829,6 +1830,12 @@ static void virtio_pci_realize(PCIDevice *pci_dev, E= rror **errp) pcie_cap_lnkctl_init(pci_dev); } =20 + if (proxy->flags & VIRTIO_PCI_FLAG_INIT_PM) { + /* Init Power Management Control Register */ + pci_set_word(pci_dev->wmask + pos + PCI_PM_CTRL, + PCI_PM_CTRL_STATE_MASK); + } + if (proxy->flags & VIRTIO_PCI_FLAG_ATS) { pcie_ats_init(pci_dev, 256); } @@ -1877,6 +1884,8 @@ static void virtio_pci_reset(DeviceState *qdev) if (pci_is_express(dev)) { pcie_cap_deverr_reset(dev); pcie_cap_lnkctl_reset(dev); + + pci_set_word(dev->config + dev->exp.pm_cap + PCI_PM_CTRL, 0); } } =20 @@ -1902,6 +1911,8 @@ static Property virtio_pci_properties[] =3D { VIRTIO_PCI_FLAG_INIT_DEVERR_BIT, true), DEFINE_PROP_BIT("x-pcie-lnkctl-init", VirtIOPCIProxy, flags, VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT, true), + DEFINE_PROP_BIT("x-pcie-pm-init", VirtIOPCIProxy, flags, + VIRTIO_PCI_FLAG_INIT_PM_BIT, true), DEFINE_PROP_END_OF_LIST(), }; =20 --=20 MST