From nobody Sat Feb 7 07:10:11 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 148963185478397.62207471471538; Wed, 15 Mar 2017 19:37:34 -0700 (PDT) Received: from localhost ([::1]:40496 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1coLID-0001Hy-8U for importer@patchew.org; Wed, 15 Mar 2017 22:37:33 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48840) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1coLFv-0000HX-F5 for qemu-devel@nongnu.org; Wed, 15 Mar 2017 22:35:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1coLFu-00017D-C0 for qemu-devel@nongnu.org; Wed, 15 Mar 2017 22:35:11 -0400 Received: from mail.kernel.org ([198.145.29.136]:32776) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1coLFu-00016Y-2e for qemu-devel@nongnu.org; Wed, 15 Mar 2017 22:35:10 -0400 Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0E536203F1; Thu, 16 Mar 2017 02:35:08 +0000 (UTC) Received: from redhat.com (pool-96-237-235-121.bstnma.fios.verizon.net [96.237.235.121]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id B7B67203E1; Thu, 16 Mar 2017 02:35:06 +0000 (UTC) Date: Thu, 16 Mar 2017 04:35:05 +0200 From: "Michael S. Tsirkin" To: qemu-devel@nongnu.org Message-ID: <1489631689-6382-4-git-send-email-mst@redhat.com> References: <1489631689-6382-1-git-send-email-mst@redhat.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1489631689-6382-1-git-send-email-mst@redhat.com> X-Mailer: git-send-email 2.8.0.287.g0deeb61 X-Mutt-Fcc: =sent X-Virus-Scanned: ClamAV using ClamSMTP X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 198.145.29.136 Subject: [Qemu-devel] [PULL 3/5] hw/virtio: fix Link Control Register for PCI Express virtio devices X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marcel Apfelbaum , Peter Maydell Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Marcel Apfelbaum Make several Link Control Register flags writable to conform with the PCI Express spec. Signed-off-by: Marcel Apfelbaum Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/virtio/virtio-pci.h | 4 ++++ include/hw/compat.h | 4 ++++ include/hw/pci/pcie.h | 3 +++ hw/pci/pcie.c | 14 ++++++++++++++ hw/virtio/virtio-pci.c | 8 ++++++++ 5 files changed, 33 insertions(+) diff --git a/hw/virtio/virtio-pci.h b/hw/virtio/virtio-pci.h index 120661d..9b5dd5a 100644 --- a/hw/virtio/virtio-pci.h +++ b/hw/virtio/virtio-pci.h @@ -74,6 +74,7 @@ enum { VIRTIO_PCI_FLAG_PAGE_PER_VQ_BIT, VIRTIO_PCI_FLAG_ATS_BIT, VIRTIO_PCI_FLAG_INIT_DEVERR_BIT, + VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT, }; =20 /* Need to activate work-arounds for buggy guests at vmstate load. */ @@ -104,6 +105,9 @@ enum { /* Init error enabling flags */ #define VIRTIO_PCI_FLAG_INIT_DEVERR (1 << VIRTIO_PCI_FLAG_INIT_DEVERR_BIT) =20 +/* Init Link Control register */ +#define VIRTIO_PCI_FLAG_INIT_LNKCTL (1 << VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT) + typedef struct { MSIMessage msg; int virq; diff --git a/include/hw/compat.h b/include/hw/compat.h index c98776a..0931aa5 100644 --- a/include/hw/compat.h +++ b/include/hw/compat.h @@ -26,6 +26,10 @@ .driver =3D "virtio-pci",\ .property =3D "x-pcie-deverr-init",\ .value =3D "off",\ + },{\ + .driver =3D "virtio-pci",\ + .property =3D "x-pcie-lnkctl-init",\ + .value =3D "off",\ }, =20 #define HW_COMPAT_2_7 \ diff --git a/include/hw/pci/pcie.h b/include/hw/pci/pcie.h index 163c519..11c6247 100644 --- a/include/hw/pci/pcie.h +++ b/include/hw/pci/pcie.h @@ -96,6 +96,9 @@ uint8_t pcie_cap_flags_get_vector(PCIDevice *dev); void pcie_cap_deverr_init(PCIDevice *dev); void pcie_cap_deverr_reset(PCIDevice *dev); =20 +void pcie_cap_lnkctl_init(PCIDevice *dev); +void pcie_cap_lnkctl_reset(PCIDevice *dev); + void pcie_cap_slot_init(PCIDevice *dev, uint16_t slot); void pcie_cap_slot_reset(PCIDevice *dev); void pcie_cap_slot_write_config(PCIDevice *dev, diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c index 82a8902..18e634f 100644 --- a/hw/pci/pcie.c +++ b/hw/pci/pcie.c @@ -223,6 +223,20 @@ void pcie_cap_deverr_reset(PCIDevice *dev) PCI_EXP_DEVCTL_FERE | PCI_EXP_DEVCTL_URRE= ); } =20 +void pcie_cap_lnkctl_init(PCIDevice *dev) +{ + uint32_t pos =3D dev->exp.exp_cap; + pci_long_test_and_set_mask(dev->wmask + pos + PCI_EXP_LNKCTL, + PCI_EXP_LNKCTL_CCC | PCI_EXP_LNKCTL_ES); +} + +void pcie_cap_lnkctl_reset(PCIDevice *dev) +{ + uint8_t *lnkctl =3D dev->config + dev->exp.exp_cap + PCI_EXP_LNKCTL; + pci_long_test_and_clear_mask(lnkctl, + PCI_EXP_LNKCTL_CCC | PCI_EXP_LNKCTL_ES); +} + static void hotplug_event_update_event_status(PCIDevice *dev) { uint32_t pos =3D dev->exp.exp_cap; diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index f6de5ee..300aa4a 100644 --- a/hw/virtio/virtio-pci.c +++ b/hw/virtio/virtio-pci.c @@ -1824,6 +1824,11 @@ static void virtio_pci_realize(PCIDevice *pci_dev, E= rror **errp) pcie_cap_deverr_init(pci_dev); } =20 + if (proxy->flags & VIRTIO_PCI_FLAG_INIT_LNKCTL) { + /* Init Link Control Register */ + pcie_cap_lnkctl_init(pci_dev); + } + if (proxy->flags & VIRTIO_PCI_FLAG_ATS) { pcie_ats_init(pci_dev, 256); } @@ -1871,6 +1876,7 @@ static void virtio_pci_reset(DeviceState *qdev) =20 if (pci_is_express(dev)) { pcie_cap_deverr_reset(dev); + pcie_cap_lnkctl_reset(dev); } } =20 @@ -1894,6 +1900,8 @@ static Property virtio_pci_properties[] =3D { VIRTIO_PCI_FLAG_ATS_BIT, false), DEFINE_PROP_BIT("x-pcie-deverr-init", VirtIOPCIProxy, flags, VIRTIO_PCI_FLAG_INIT_DEVERR_BIT, true), + DEFINE_PROP_BIT("x-pcie-lnkctl-init", VirtIOPCIProxy, flags, + VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT, true), DEFINE_PROP_END_OF_LIST(), }; =20 --=20 MST