Series comparison

v1->v2 changes: drop the sd card-reparenting patch
and the 2 raspi2 patches that depend on it.

-- PMM

The following changes since commit 6181478f6395cdd9d6ffd99623d0c9f39ea53606:

Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into staging (2017-02-28 08:46:03 +0000)

are available in the git repository at:

git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20170228

for you to fetch changes up to f3a6339a5bbc160d327299c67bb68c6d07fa4a61:

hw/arm/exynos: Fix proper mapping of CPUs by providing real cluster ID (2017-02-28 12:08:20 +0000)

----------------------------------------------------------------
target-arm queue:
 * raspi2: implement RNG module
 * raspi2: implement new SD card controller (but don't wire it up)
 * sdhci: bugfixes for block transfers
 * virt: fix cpu object reference leak
 * Add missing fp_access_check() to aarch64 crypto instructions
 * cputlb: Don't assume do_unassigned_access() never returns
 * virt: Add a user option to disallow ITS instantiation
 * i.MX timers: fix reset handling
 * ARMv7M NVIC: rewrite to fix broken priority handling and masking
 * exynos: Fix proper mapping of CPUs by providing real cluster ID
 * exynos: Fix Linux kernel division by zero for PLLs

----------------------------------------------------------------
Clement Deschamps (1):
      bcm2835_sdhost: add bcm2835 sdhost controller

Eric Auger (1):
      hw/arm/virt: Add a user option to disallow ITS instantiation

Igor Mammedov (1):
      hw/arm/virt: fix cpu object reference leak

Krzysztof Kozlowski (2):
      hw/arm/exynos: Fix Linux kernel division by zero for PLLs
      hw/arm/exynos: Fix proper mapping of CPUs by providing real cluster ID

Kurban Mallachiev (1):
      ARM i.MX timers: fix reset handling

Marcin Chojnacki (1):
      target-arm: Implement BCM2835 hardware RNG

Michael Davidsaver (5):
      armv7m: Rewrite NVIC to not use any GIC code
      arm: gic: Remove references to NVIC
      armv7m: Escalate exceptions to HardFault if necessary
      armv7m: Simpler and faster exception start
      armv7m: VECTCLRACTIVE and VECTRESET are UNPREDICTABLE

Nick Reilly (1):
      Add missing fp_access_check() to aarch64 crypto instructions

Peter Maydell (10):
      bcm2835_rng: Use qcrypto_random_bytes() rather than rand()
      cputlb: Don't assume do_unassigned_access() never returns
      armv7m: Rename nvic_state to NVICState
      armv7m: Implement reading and writing of PRIGROUP
      armv7m: Fix condition check for taking exceptions
      armv7m: Remove unused armv7m_nvic_acknowledge_irq() return value
      armv7m: Extract "exception taken" code into functions
      armv7m: Check exception return consistency
      armv7m: Raise correct kind of UsageFault for attempts to execute ARM code
      armv7m: Allow SHCSR writes to change pending and active bits

Prasad J Pandit (4):
      sd: sdhci: mask transfer mode register value
      sd: sdhci: check transfer mode register in multi block transfer
      sd: sdhci: conditionally invoke multi block transfer
      sd: sdhci: Remove block count enable check in single block transfers

v3->v4: Windows headers define an INT type which clashed
with an enum value name in arm_gicv3_its.c...

The following changes since commit eae587e8e3694b1aceab23239493fb4c7e1a80f5:

Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2021-09-13' into staging (2021-09-13 11:00:30 +0100)

are available in the Git repository at:

https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210913-3

for you to fetch changes up to 28e987a7e7edaa3ca7feeac65edca26145df8814:

hw/arm/mps2.c: Mark internal-only I2C buses as 'full' (2021-09-13 21:01:08 +0100)

----------------------------------------------------------------
target-arm queue:
 * mark MPS2/MPS3 board-internal i2c buses as 'full' so that command
   line user-created devices are not plugged into them
 * Take an exception if PSTATE.IL is set
 * Support an emulated ITS in the virt board
 * Add support for kudo-bmc board
 * Probe for KVM_CAP_ARM_VM_IPA_SIZE when creating scratch VM
 * cadence_uart: Fix clock handling issues that prevented
   u-boot from running

----------------------------------------------------------------
Bin Meng (6):
      hw/misc: zynq_slcr: Correctly compute output clocks in the reset exit phase
      hw/char: cadence_uart: Disable transmit when input clock is disabled
      hw/char: cadence_uart: Move clock/reset check to uart_can_receive()
      hw/char: cadence_uart: Convert to memop_with_attrs() ops
      hw/char: cadence_uart: Ignore access when unclocked or in reset for uart_{read, write}()
      hw/char: cadence_uart: Log a guest error when device is unclocked or in reset

Chris Rauer (1):
      hw/arm: Add support for kudo-bmc board.

Marc Zyngier (1):
      hw/arm/virt: KVM: Probe for KVM_CAP_ARM_VM_IPA_SIZE when creating scratch VM

Peter Maydell (5):
      target/arm: Take an exception if PSTATE.IL is set
      qdev: Support marking individual buses as 'full'
      hw/arm/mps2-tz.c: Add extra data parameter to MakeDevFn
      hw/arm/mps2-tz.c: Mark internal-only I2C buses as 'full'
      hw/arm/mps2.c: Mark internal-only I2C buses as 'full'

Richard Henderson (1):
      target/arm: Merge disas_a64_insn into aarch64_tr_translate_insn

Shashi Mallela (9):
      hw/intc: GICv3 ITS initial framework
      hw/intc: GICv3 ITS register definitions added
      hw/intc: GICv3 ITS command queue framework
      hw/intc: GICv3 ITS Command processing
      hw/intc: GICv3 ITS Feature enablement
      hw/intc: GICv3 redistributor ITS processing
      tests/data/acpi/virt: Add IORT files for ITS
      hw/arm/virt: add ITS support in virt GIC
      tests/data/acpi/virt: Update IORT files for ITS