From nobody Mon Feb 9 15:46:10 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487958690058941.7808358162376; Fri, 24 Feb 2017 09:51:30 -0800 (PST) Received: from localhost ([::1]:38943 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1chK1g-00036K-QC for importer@patchew.org; Fri, 24 Feb 2017 12:51:28 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35182) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1chJmS-0003u8-F9 for qemu-devel@nongnu.org; Fri, 24 Feb 2017 12:35:46 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1chJmR-0005Cl-Am for qemu-devel@nongnu.org; Fri, 24 Feb 2017 12:35:44 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:48641) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1chJmQ-0004Og-Ux for qemu-devel@nongnu.org; Fri, 24 Feb 2017 12:35:43 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1chJmE-0008Kx-RX; Fri, 24 Feb 2017 17:35:30 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Fri, 24 Feb 2017 17:35:22 +0000 Message-Id: <1487957728-8354-4-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1487957728-8354-1-git-send-email-peter.maydell@linaro.org> References: <1487957728-8354-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PATCH risu 3/9] Make get_risuop() a formal part of the CPU interface X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Nikunj A Dadhania Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Peter Maydell Make get_risuop() a formal part of the CPU interface rather than just a de-facto common routine. Signed-off-by: Peter Maydell --- risu.h | 5 +++++ risu_aarch64.c | 7 ++++--- risu_arm.c | 9 +++++---- risu_m68k.c | 7 ++++--- risu_ppc64le.c | 7 ++++--- 5 files changed, 22 insertions(+), 13 deletions(-) diff --git a/risu.h b/risu.h index 4f923b2..1525b3e 100644 --- a/risu.h +++ b/risu.h @@ -74,4 +74,9 @@ void set_ucontext_paramreg(void *vuc, uint64_t value); /* Return the value of the parameter register from a reginfo. */ uint64_t get_reginfo_paramreg(struct reginfo *ri); =20 +/* Return the risu operation number we have been asked to do, + * or -1 if this was a SIGILL for a non-risuop insn. + */ +int get_risuop(struct reginfo *ri); + #endif /* RISU_H */ diff --git a/risu_aarch64.c b/risu_aarch64.c index f13338d..81573e3 100644 --- a/risu_aarch64.c +++ b/risu_aarch64.c @@ -41,11 +41,12 @@ uint64_t get_reginfo_paramreg(struct reginfo *ri) return ri->regs[0]; } =20 -static int get_risuop(uint32_t insn) +int get_risuop(struct reginfo *ri) { /* Return the risuop we have been asked to do * (or -1 if this was a SIGILL for a non-risuop insn) */ + uint32_t insn =3D ri->faulting_insn; uint32_t op =3D insn & 0xf; uint32_t key =3D insn & ~0xf; uint32_t risukey =3D 0x00005af0; @@ -57,7 +58,7 @@ int send_register_info(int sock, void *uc) struct reginfo ri; int op; reginfo_init(&ri, uc); - op =3D get_risuop(ri.faulting_insn); + op =3D get_risuop(&ri); =20 switch (op) { case OP_COMPARE: @@ -94,7 +95,7 @@ int recv_and_compare_register_info(int sock, void *uc) int resp =3D 0, op; =20 reginfo_init(&master_ri, uc); - op =3D get_risuop(master_ri.faulting_insn); + op =3D get_risuop(&master_ri); =20 switch (op) { case OP_COMPARE: diff --git a/risu_arm.c b/risu_arm.c index c2b79a5..36ac3c8 100644 --- a/risu_arm.c +++ b/risu_arm.c @@ -64,24 +64,25 @@ uint64_t get_reginfo_paramreg(struct reginfo *ri) return ri->gpreg[0]; } =20 -static int get_risuop(uint32_t insn, int isz) +int get_risuop(struct reginfo *ri) { /* Return the risuop we have been asked to do * (or -1 if this was a SIGILL for a non-risuop insn) */ + uint32_t insn =3D ri->faulting_insn; + int isz =3D ri->faulting_insn_size; uint32_t op =3D insn & 0xf; uint32_t key =3D insn & ~0xf; uint32_t risukey =3D (isz =3D=3D 2) ? 0xdee0 : 0xe7fe5af0; return (key !=3D risukey) ? -1 : op; } =20 - int send_register_info(int sock, void *uc) { struct reginfo ri; int op; reginfo_init(&ri, uc); - op =3D get_risuop(ri.faulting_insn, ri.faulting_insn_size); + op =3D get_risuop(&ri); =20 switch (op) { @@ -119,7 +120,7 @@ int recv_and_compare_register_info(int sock, void *uc) int resp =3D 0, op; =20 reginfo_init(&master_ri, uc); - op =3D get_risuop(master_ri.faulting_insn, master_ri.faulting_insn_size= ); + op =3D get_risuop(&master_ri); =20 switch (op) { diff --git a/risu_m68k.c b/risu_m68k.c index feb3912..8c138dd 100644 --- a/risu_m68k.c +++ b/risu_m68k.c @@ -36,8 +36,9 @@ uint64_t get_reginfo_paramreg(struct reginfo *ri) return ri->gregs[R_A0]; } =20 -static int get_risuop(uint32_t insn) +int get_risuop(struct reginfo *ri) { + uint32_t insn =3D ri->faulting_insn; uint32_t op =3D insn & 0xf; uint32_t key =3D insn & ~0xf; uint32_t risukey =3D 0x4afc7000; @@ -50,7 +51,7 @@ int send_register_info(int sock, void *uc) int op; =20 reginfo_init(&ri, uc); - op =3D get_risuop(ri.faulting_insn); + op =3D get_risuop(&ri); =20 switch (op) { case OP_COMPARE: @@ -81,7 +82,7 @@ int recv_and_compare_register_info(int sock, void *uc) int op; =20 reginfo_init(&master_ri, uc); - op =3D get_risuop(master_ri.faulting_insn); + op =3D get_risuop(&master_ri); =20 switch (op) { case OP_COMPARE: diff --git a/risu_ppc64le.c b/risu_ppc64le.c index 05b0294..43170ea 100644 --- a/risu_ppc64le.c +++ b/risu_ppc64le.c @@ -41,8 +41,9 @@ uint64_t get_reginfo_paramreg(struct reginfo *ri) return ri->gregs[0]; } =20 -static int get_risuop(uint32_t insn) +int get_risuop(struct reginfo *ri) { + uint32_t insn =3D ri->faulting_insn; uint32_t op =3D insn & 0xf; uint32_t key =3D insn & ~0xf; uint32_t risukey =3D 0x00005af0; @@ -55,7 +56,7 @@ int send_register_info(int sock, void *uc) int op; =20 reginfo_init(&ri, uc); - op =3D get_risuop(ri.faulting_insn); + op =3D get_risuop(&ri); =20 switch (op) { case OP_COMPARE: @@ -86,7 +87,7 @@ int recv_and_compare_register_info(int sock, void *uc) int op; =20 reginfo_init(&master_ri, uc); - op =3D get_risuop(master_ri.faulting_insn); + op =3D get_risuop(&master_ri); =20 switch (op) { case OP_COMPARE: --=20 2.7.4