From nobody Thu Nov 6 18:50:49 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 148774263383280.41545100921155; Tue, 21 Feb 2017 21:50:33 -0800 (PST) Received: from localhost ([::1]:50015 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgPot-00074h-Jn for importer@patchew.org; Wed, 22 Feb 2017 00:50:31 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58630) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgPo0-0006iL-Tt for qemu-devel@nongnu.org; Wed, 22 Feb 2017 00:49:37 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cgPnz-0005bi-KA for qemu-devel@nongnu.org; Wed, 22 Feb 2017 00:49:37 -0500 Received: from mx1.redhat.com ([209.132.183.28]:56348) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cgPnz-0005ba-BT for qemu-devel@nongnu.org; Wed, 22 Feb 2017 00:49:35 -0500 Received: from smtp.corp.redhat.com (int-mx16.intmail.prod.int.phx2.redhat.com [10.5.11.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 2D082C057FA5; Wed, 22 Feb 2017 05:49:35 +0000 (UTC) Received: from pxdev.xzpeter.org.com (ovpn-8-39.pek2.redhat.com [10.72.8.39]) by smtp.corp.redhat.com (Postfix) with ESMTP id D9EC2899CA; Wed, 22 Feb 2017 05:49:32 +0000 (UTC) From: Peter Xu To: qemu-devel@nongnu.org Date: Wed, 22 Feb 2017 13:49:25 +0800 Message-Id: <1487742565-2513-1-git-send-email-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.74 on 10.5.11.28 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Wed, 22 Feb 2017 05:49:35 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH] intel_iommu: make sure its init before PCI dev X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alex Williamson , yi.l.liu@intel.com, Jintack Lim , peterx@redhat.com, "\\ Michael S . Tsirkin \\ " Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Intel vIOMMU devices are created with "-device" parameter, while here actually we need to make sure this device will be created before some other PCI devices (like vfio-pci devices) so that we know iommu_fn will be setup correctly before realizations of those PCI devices. Here we do explicit check to make sure intel-iommu device will be inited before all the rest of the PCI devices. This is done by checking against the devices dangled under current root PCIe bus and we should see nothing there besides integrated ICH9 ones. If the user violated this rule, we abort the program. Maybe one day we will be able to manage the ordering of device initialization, and then we can grant VT-d devices a higher init priority. But before that, let's have this explicit check to make sure of it. Signed-off-by: Peter Xu --- hw/i386/intel_iommu.c | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 22d8226..db74124 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -31,6 +31,7 @@ #include "hw/i386/apic-msidef.h" #include "hw/boards.h" #include "hw/i386/x86-iommu.h" +#include "hw/i386/ich9.h" #include "hw/pci-host/q35.h" #include "sysemu/kvm.h" #include "hw/i386/apic_internal.h" @@ -2560,6 +2561,41 @@ static bool vtd_decide_config(IntelIOMMUState *s, Er= ror **errp) return true; } =20 +static bool vtd_has_inited_pci_devices(PCIBus *bus, Error **errp) +{ + int i; + uint8_t func; + + /* We check against root bus */ + assert(bus && pci_bus_is_root(bus)); + + /* + * We need to make sure vIOMMU device is created before other PCI + * devices other than the integrated ICH9 ones, so that they can + * get correct iommu_fn setup even during its realize(). Some + * devices (e.g., vfio-pci) will need a correct iommu_fn to work. + */ + for (i =3D 1; i < PCI_FUNC_MAX * PCI_SLOT_MAX; i++) { + /* Skip the checking against ICH9 integrated devices */ + if (PCI_SLOT(i) =3D=3D ICH9_LPC_DEV) { + func =3D PCI_FUNC(i); + if (func =3D=3D ICH9_LPC_FUNC || + func =3D=3D ICH9_SATA1_FUNC || + func =3D=3D ICH9_SMB_FUNC) { + continue; + } + } + + if (bus->devices[i]) { + error_setg(errp, "Please init intel-iommu before " + "other PCI devices"); + return true; + } + } + + return false; +} + static void vtd_realize(DeviceState *dev, Error **errp) { PCMachineState *pcms =3D PC_MACHINE(qdev_get_machine()); @@ -2567,6 +2603,10 @@ static void vtd_realize(DeviceState *dev, Error **er= rp) IntelIOMMUState *s =3D INTEL_IOMMU_DEVICE(dev); X86IOMMUState *x86_iommu =3D X86_IOMMU_DEVICE(dev); =20 + if (vtd_has_inited_pci_devices(bus, errp)) { + return; + } + VTD_DPRINTF(GENERAL, ""); x86_iommu->type =3D TYPE_INTEL; =20 --=20 2.7.4