From nobody Tue Feb 10 04:29:36 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487623669870585.2599133311246; Mon, 20 Feb 2017 12:47:49 -0800 (PST) Received: from localhost ([::1]:41009 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cfus8-0004iH-AA for importer@patchew.org; Mon, 20 Feb 2017 15:47:48 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38980) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cfunt-0001a5-Ru for qemu-devel@nongnu.org; Mon, 20 Feb 2017 15:43:26 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cfuns-0008VR-Tc for qemu-devel@nongnu.org; Mon, 20 Feb 2017 15:43:25 -0500 Received: from mx1.redhat.com ([209.132.183.28]:34272) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cfuns-0008Uc-No for qemu-devel@nongnu.org; Mon, 20 Feb 2017 15:43:24 -0500 Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id D2BD68047A for ; Mon, 20 Feb 2017 20:43:24 +0000 (UTC) Received: from work.redhat.com (ovpn-116-63.ams2.redhat.com [10.36.116.63]) by int-mx10.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id v1KKhGNr027258; Mon, 20 Feb 2017 15:43:21 -0500 From: Marcel Apfelbaum To: qemu-devel@nongnu.org Date: Mon, 20 Feb 2017 22:43:10 +0200 Message-Id: <1487623393-2492-2-git-send-email-marcel@redhat.com> In-Reply-To: <1487623393-2492-1-git-send-email-marcel@redhat.com> References: <1487623393-2492-1-git-send-email-marcel@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Mon, 20 Feb 2017 20:43:24 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH V2 1/4] hw/pcie: fix Extended Configuration Space for devices with no Extended Capabilities X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marcel@redhat.com, mst@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Absence of any Extended Capabilities is required to be indicated by an Extended Capability header with a Capability ID of 0000h, a Capability Version of 0h, and a Next Capability Offset of 000h. Instead of inserting a 'NULL' capability is simpler to mark the start of the Extended Configuration Space as read-only to achieve the same behaviour. Signed-off-by: Marcel Apfelbaum --- hw/pci/pci.c | 2 ++ hw/pci/pcie.c | 6 ++++++ include/hw/compat.h | 4 ++++ include/hw/pci/pci.h | 2 ++ 4 files changed, 14 insertions(+) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index a563555..4d2c0e1 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -64,6 +64,8 @@ static Property pci_props[] =3D { QEMU_PCI_CAP_SERR_BITNR, true), DEFINE_PROP_BIT("x-pcie-lnksta-dllla", PCIDevice, cap_present, QEMU_PCIE_LNKSTA_DLLLA_BITNR, true), + DEFINE_PROP_BIT("x-pcie-extcap-init", PCIDevice, cap_present, + QEMU_PCIE_EXTCAP_INIT_BITNR, true), DEFINE_PROP_END_OF_LIST() }; =20 diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c index cbd4bb4..2526e3a 100644 --- a/hw/pci/pcie.c +++ b/hw/pci/pcie.c @@ -109,6 +109,12 @@ int pcie_cap_init(PCIDevice *dev, uint8_t offset, uint= 8_t type, uint8_t port) PCI_EXP_DEVCAP2_EFF | PCI_EXP_DEVCAP2_EETLPP); =20 pci_set_word(dev->wmask + pos + PCI_EXP_DEVCTL2, PCI_EXP_DEVCTL2_EETLP= PB); + + if (dev->cap_present & QEMU_PCIE_EXTCAP_INIT) { + /* read-only to behave like a 'NULL' Extended Capability Header */ + pci_set_long(dev->wmask + PCI_CONFIG_SPACE_SIZE, 0); + } + return pos; } =20 diff --git a/include/hw/compat.h b/include/hw/compat.h index b7db438..ce3bfe3 100644 --- a/include/hw/compat.h +++ b/include/hw/compat.h @@ -18,6 +18,10 @@ .driver =3D "pci-bridge",\ .property =3D "shpc",\ .value =3D "on",\ + },{\ + .driver =3D TYPE_PCI_DEVICE,\ + .property =3D "x-pcie-extcap-init",\ + .value =3D "off",\ }, =20 #define HW_COMPAT_2_7 \ diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index cbc1fdf..ded978c 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -182,6 +182,8 @@ enum { /* Link active status in endpoint capability is always set */ #define QEMU_PCIE_LNKSTA_DLLLA_BITNR 8 QEMU_PCIE_LNKSTA_DLLLA =3D (1 << QEMU_PCIE_LNKSTA_DLLLA_BITNR), +#define QEMU_PCIE_EXTCAP_INIT_BITNR 9 + QEMU_PCIE_EXTCAP_INIT =3D (1 << QEMU_PCIE_EXTCAP_INIT_BITNR), }; =20 #define TYPE_PCI_DEVICE "pci-device" --=20 2.5.5