From nobody Wed Feb 11 03:26:04 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487607109790761.058115875769; Mon, 20 Feb 2017 08:11:49 -0800 (PST) Received: from localhost ([::1]:39485 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cfqZ0-0004S6-9w for importer@patchew.org; Mon, 20 Feb 2017 11:11:46 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40414) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cfq0q-0006fY-9j for qemu-devel@nongnu.org; Mon, 20 Feb 2017 10:36:36 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cfq0p-0003UX-Bq for qemu-devel@nongnu.org; Mon, 20 Feb 2017 10:36:28 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:48583) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1cfq0j-0003Lw-L9; Mon, 20 Feb 2017 10:36:21 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1cfq0W-0005gv-8h; Mon, 20 Feb 2017 15:36:08 +0000 From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Mon, 20 Feb 2017 15:35:58 +0000 Message-Id: <1487604965-23220-5-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1487604965-23220-1-git-send-email-peter.maydell@linaro.org> References: <1487604965-23220-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PATCH 04/11] armv7m: Use QOMified armv7m object in armv7m_init() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alistair Francis , Michael Davidsaver , =?UTF-8?q?Alex=20Benn=C3=A9e?= , patches@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Make the legacy armv7m_init() function use the newly QOMified armv7m object rather than doing everything by hand. We can return the armv7m object rather than the NVIC from armv7m_init() because its interface to the rest of the board (GPIOs, etc) is identical. Signed-off-by: Peter Maydell Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/arm/armv7m.c | 49 ++++++++++++------------------------------------- 1 file changed, 12 insertions(+), 37 deletions(-) diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c index 56d02d4..36f213c 100644 --- a/hw/arm/armv7m.c +++ b/hw/arm/armv7m.c @@ -131,21 +131,6 @@ static void bitband_init(Object *obj) sysbus_init_mmio(dev, &s->iomem); } =20 -static void armv7m_bitband_init(void) -{ - DeviceState *dev; - - dev =3D qdev_create(NULL, TYPE_BITBAND); - qdev_prop_set_uint32(dev, "base", 0x20000000); - qdev_init_nofail(dev); - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x22000000); - - dev =3D qdev_create(NULL, TYPE_BITBAND); - qdev_prop_set_uint32(dev, "base", 0x40000000); - qdev_init_nofail(dev); - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x42000000); -} - /* Board init. */ =20 static const hwaddr bitband_input_addr[ARMV7M_NUM_BITBANDS] =3D { @@ -283,35 +268,25 @@ static void armv7m_reset(void *opaque) =20 /* Init CPU and memory for a v7-M based board. mem_size is in bytes. - Returns the NVIC array. */ + Returns the ARMv7M device. */ =20 DeviceState *armv7m_init(MemoryRegion *system_memory, int mem_size, int nu= m_irq, const char *kernel_filename, const char *cpu_model) { - ARMCPU *cpu; - CPUARMState *env; - DeviceState *nvic; + DeviceState *armv7m; =20 if (cpu_model =3D=3D NULL) { - cpu_model =3D "cortex-m3"; + cpu_model =3D "cortex-m3"; } - cpu =3D cpu_arm_init(cpu_model); - if (cpu =3D=3D NULL) { - fprintf(stderr, "Unable to find CPU definition\n"); - exit(1); - } - env =3D &cpu->env; - - armv7m_bitband_init(); - - nvic =3D qdev_create(NULL, "armv7m_nvic"); - qdev_prop_set_uint32(nvic, "num-irq", num_irq); - env->nvic =3D nvic; - qdev_init_nofail(nvic); - sysbus_connect_irq(SYS_BUS_DEVICE(nvic), 0, - qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_IRQ)); - armv7m_load_kernel(cpu, kernel_filename, mem_size); - return nvic; + + armv7m =3D qdev_create(NULL, "armv7m"); + qdev_prop_set_uint32(armv7m, "num-irq", num_irq); + qdev_prop_set_string(armv7m, "cpu-model", cpu_model); + /* This will exit with an error if the user passed us a bad cpu_model = */ + qdev_init_nofail(armv7m); + + armv7m_load_kernel(ARM_CPU(first_cpu), kernel_filename, mem_size); + return armv7m; } =20 void armv7m_load_kernel(ARMCPU *cpu, const char *kernel_filename, int mem_= size) --=20 2.7.4