From nobody Mon Feb 9 00:55:55 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487364694365939.5240046906083; Fri, 17 Feb 2017 12:51:34 -0800 (PST) Received: from localhost ([::1]:55850 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cepV6-0005x9-IJ for importer@patchew.org; Fri, 17 Feb 2017 15:51:32 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44607) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ceocS-0004dI-0c for qemu-devel@nongnu.org; Fri, 17 Feb 2017 14:55:05 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ceocN-000607-5y for qemu-devel@nongnu.org; Fri, 17 Feb 2017 14:55:04 -0500 Received: from mail.kernel.org ([198.145.29.136]:34678) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ceocM-0005zF-SA for qemu-devel@nongnu.org; Fri, 17 Feb 2017 14:54:58 -0500 Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D395520220; Fri, 17 Feb 2017 19:54:56 +0000 (UTC) Received: from redhat.com (pool-96-237-235-121.bstnma.fios.verizon.net [96.237.235.121]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 3508E201FE; Fri, 17 Feb 2017 19:54:55 +0000 (UTC) Date: Fri, 17 Feb 2017 21:54:54 +0200 From: "Michael S. Tsirkin" To: qemu-devel@nongnu.org Message-ID: <1487361200-29966-20-git-send-email-mst@redhat.com> References: <1487361200-29966-1-git-send-email-mst@redhat.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1487361200-29966-1-git-send-email-mst@redhat.com> X-Mailer: git-send-email 2.8.0.287.g0deeb61 X-Mutt-Fcc: =sent X-Virus-Scanned: ClamAV using ClamSMTP X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 198.145.29.136 Subject: [Qemu-devel] [PULL 19/23] intel_iommu: simplify irq region translation X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Eduardo Habkost , Jason Wang , Peter Xu , Paolo Bonzini , David Gibson , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Peter Xu Now we have a standalone memory region for MSI, all the irq region requests should be redirected there. Cleaning up the block with an assertion instead. Reviewed-by: Jason Wang Signed-off-by: Peter Xu Reviewed-by: David Gibson Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/i386/intel_iommu.c | 28 ++++++---------------------- 1 file changed, 6 insertions(+), 22 deletions(-) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 50251c3..86d19bb 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -818,28 +818,12 @@ static void vtd_do_iommu_translate(VTDAddressSpace *v= td_as, PCIBus *bus, bool writes =3D true; VTDIOTLBEntry *iotlb_entry; =20 - /* Check if the request is in interrupt address range */ - if (vtd_is_interrupt_addr(addr)) { - if (is_write) { - /* FIXME: since we don't know the length of the access here, we - * treat Non-DWORD length write requests without PASID as - * interrupt requests, too. Withoud interrupt remapping suppor= t, - * we just use 1:1 mapping. - */ - VTD_DPRINTF(MMU, "write request to interrupt address " - "gpa 0x%"PRIx64, addr); - entry->iova =3D addr & VTD_PAGE_MASK_4K; - entry->translated_addr =3D addr & VTD_PAGE_MASK_4K; - entry->addr_mask =3D ~VTD_PAGE_MASK_4K; - entry->perm =3D IOMMU_WO; - return; - } else { - VTD_DPRINTF(GENERAL, "error: read request from interrupt addre= ss " - "gpa 0x%"PRIx64, addr); - vtd_report_dmar_fault(s, source_id, addr, VTD_FR_READ, is_writ= e); - return; - } - } + /* + * We have standalone memory region for interrupt addresses, we + * should never receive translation requests in this region. + */ + assert(!vtd_is_interrupt_addr(addr)); + /* Try to fetch slpte form IOTLB */ iotlb_entry =3D vtd_lookup_iotlb(s, source_id, addr); if (iotlb_entry) { --=20 MST