From nobody Thu Dec 18 17:50:18 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1486493578353943.1819272634266; Tue, 7 Feb 2017 10:52:58 -0800 (PST) Received: from localhost ([::1]:55927 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cbAsq-0003r7-Vf for importer@patchew.org; Tue, 07 Feb 2017 13:52:57 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:32860) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cbAe7-0007dk-IJ for qemu-devel@nongnu.org; Tue, 07 Feb 2017 13:37:44 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cbAe6-0002ni-D7 for qemu-devel@nongnu.org; Tue, 07 Feb 2017 13:37:43 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:48440) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1cbAe6-0002gg-6A for qemu-devel@nongnu.org; Tue, 07 Feb 2017 13:37:42 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1cbAds-0005TG-Lw for qemu-devel@nongnu.org; Tue, 07 Feb 2017 18:37:28 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 7 Feb 2017 18:37:17 +0000 Message-Id: <1486492645-27803-6-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1486492645-27803-1-git-send-email-peter.maydell@linaro.org> References: <1486492645-27803-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 05/13] hw/arm/integratorcp: Support specifying features via -cpu X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Julian Brown Since the integratorcp board creates the CPU object directly rather than via cpu_arm_init(), we have to call the CPU class parse_features() method ourselves if we want to support the user passing features via the -cpu command line argument as well as just the cpu name. Do so. Signed-off-by: Julian Brown [PMM: split out into its own patch] Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- hw/arm/integratorcp.c | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c index f81634d..5610ffc 100644 --- a/hw/arm/integratorcp.c +++ b/hw/arm/integratorcp.c @@ -577,27 +577,42 @@ static void integratorcp_init(MachineState *machine) const char *kernel_filename =3D machine->kernel_filename; const char *kernel_cmdline =3D machine->kernel_cmdline; const char *initrd_filename =3D machine->initrd_filename; + char **cpustr; ObjectClass *cpu_oc; + CPUClass *cc; Object *cpuobj; ARMCPU *cpu; + const char *typename; MemoryRegion *address_space_mem =3D get_system_memory(); MemoryRegion *ram =3D g_new(MemoryRegion, 1); MemoryRegion *ram_alias =3D g_new(MemoryRegion, 1); qemu_irq pic[32]; DeviceState *dev, *sic, *icp; int i; + Error *err =3D NULL; =20 if (!cpu_model) { cpu_model =3D "arm926"; } =20 - cpu_oc =3D cpu_class_by_name(TYPE_ARM_CPU, cpu_model); + cpustr =3D g_strsplit(cpu_model, ",", 2); + + cpu_oc =3D cpu_class_by_name(TYPE_ARM_CPU, cpustr[0]); if (!cpu_oc) { fprintf(stderr, "Unable to find CPU definition\n"); exit(1); } + typename =3D object_class_get_name(cpu_oc); + + cc =3D CPU_CLASS(cpu_oc); + cc->parse_features(typename, cpustr[1], &err); + g_strfreev(cpustr); + if (err) { + error_report_err(err); + exit(1); + } =20 - cpuobj =3D object_new(object_class_get_name(cpu_oc)); + cpuobj =3D object_new(typename); =20 /* By default ARM1176 CPUs have EL3 enabled. This board does not * currently support EL3 so the CPU EL3 property is disabled before --=20 2.7.4