[Qemu-devel] [PATCH v2 0/2] target/arm: Support EL1 AArch32 guest under AArch64 EL2

Peter Maydell posted 2 patches 7 years, 1 month ago
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git fetch https://github.com/patchew-project/qemu tags/patchew/1486144135-4894-1-git-send-email-peter.maydell@linaro.org
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target/arm/translate.c | 207 ++++++++++++++++++++++++++++++++++++-------------
1 file changed, 155 insertions(+), 52 deletions(-)
[Qemu-devel] [PATCH v2 0/2] target/arm: Support EL1 AArch32 guest under AArch64 EL2
Posted by Peter Maydell 7 years, 1 month ago
Add support for generating the ISS (Instruction Specific Syndrome)
for Data Abort exceptions taken from AArch32. These syndromes are
used by hypervisors for example to trap and emulate memory accesses.

This is a respin of patch 1/3 from the previous series.
Changes v1->v2:
 * other 2 patches are now in QEMU master
 * split out the "use pbit/wbit variables" change into its own patch
 * dropped a few stray blank line changes

Otherwise unchanged.

thanks
-- PMM


Peter Maydell (2):
  target/arm: Abstract out pbit/wbit tests in ARM ldr/str decode
  target/arm: A32, T32: Create Instruction Syndromes for Data Aborts

 target/arm/translate.c | 207 ++++++++++++++++++++++++++++++++++++-------------
 1 file changed, 155 insertions(+), 52 deletions(-)

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2.7.4