From nobody Mon Feb 9 06:34:08 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1486110571269945.5943530516281; Fri, 3 Feb 2017 00:29:31 -0800 (PST) Received: from localhost ([::1]:60776 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cZZFJ-0002kO-6p for importer@patchew.org; Fri, 03 Feb 2017 03:29:29 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59505) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cZZ9R-0006B7-RL for qemu-devel@nongnu.org; Fri, 03 Feb 2017 03:23:26 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cZZ9Q-0004dB-Uh for qemu-devel@nongnu.org; Fri, 03 Feb 2017 03:23:25 -0500 Received: from mx1.redhat.com ([209.132.183.28]:53328) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cZZ9Q-0004cs-O4 for qemu-devel@nongnu.org; Fri, 03 Feb 2017 03:23:24 -0500 Received: from int-mx14.intmail.prod.int.phx2.redhat.com (int-mx14.intmail.prod.int.phx2.redhat.com [10.5.11.27]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id E1074C04BD5D; Fri, 3 Feb 2017 08:23:24 +0000 (UTC) Received: from pxdev.xzpeter.org.com (ovpn-8-19.pek2.redhat.com [10.72.8.19]) by int-mx14.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id v138MwkX005045; Fri, 3 Feb 2017 03:23:21 -0500 From: Peter Xu To: qemu-devel@nongnu.org Date: Fri, 3 Feb 2017 16:22:31 +0800 Message-Id: <1486110164-13797-6-git-send-email-peterx@redhat.com> In-Reply-To: <1486110164-13797-1-git-send-email-peterx@redhat.com> References: <1486110164-13797-1-git-send-email-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.27 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.31]); Fri, 03 Feb 2017 08:23:24 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v6 05/18] intel_iommu: simplify irq region translation X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: tianyu.lan@intel.com, kevin.tian@intel.com, mst@redhat.com, jan.kiszka@siemens.com, jasowang@redhat.com, peterx@redhat.com, alex.williamson@redhat.com, bd.aviv@gmail.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Now we have a standalone memory region for MSI, all the irq region requests should be redirected there. Cleaning up the block with an assertion instead. Signed-off-by: Peter Xu Reviewed-by: Jason Wang --- hw/i386/intel_iommu.c | 28 ++++++---------------------- 1 file changed, 6 insertions(+), 22 deletions(-) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 50251c3..86d19bb 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -818,28 +818,12 @@ static void vtd_do_iommu_translate(VTDAddressSpace *v= td_as, PCIBus *bus, bool writes =3D true; VTDIOTLBEntry *iotlb_entry; =20 - /* Check if the request is in interrupt address range */ - if (vtd_is_interrupt_addr(addr)) { - if (is_write) { - /* FIXME: since we don't know the length of the access here, we - * treat Non-DWORD length write requests without PASID as - * interrupt requests, too. Withoud interrupt remapping suppor= t, - * we just use 1:1 mapping. - */ - VTD_DPRINTF(MMU, "write request to interrupt address " - "gpa 0x%"PRIx64, addr); - entry->iova =3D addr & VTD_PAGE_MASK_4K; - entry->translated_addr =3D addr & VTD_PAGE_MASK_4K; - entry->addr_mask =3D ~VTD_PAGE_MASK_4K; - entry->perm =3D IOMMU_WO; - return; - } else { - VTD_DPRINTF(GENERAL, "error: read request from interrupt addre= ss " - "gpa 0x%"PRIx64, addr); - vtd_report_dmar_fault(s, source_id, addr, VTD_FR_READ, is_writ= e); - return; - } - } + /* + * We have standalone memory region for interrupt addresses, we + * should never receive translation requests in this region. + */ + assert(!vtd_is_interrupt_addr(addr)); + /* Try to fetch slpte form IOTLB */ iotlb_entry =3D vtd_lookup_iotlb(s, source_id, addr); if (iotlb_entry) { --=20 2.7.4