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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=57.103.84.201; envelope-from=elisey.konstantinov@icloud.com; helo=outbound.qs.icloud.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-Mailman-Approved-At: Tue, 27 May 2025 15:19:15 -0400 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @icloud.com) X-ZM-MESSAGEID: 1748373580416116600 Content-Type: text/plain; charset="utf-8" From e2f3eab60e9b9787c5c8f87bea5d1bd7079d982e Mon Sep 17 00:00:00 2001 From: Elisey Date: Tue, 27 May 2025 17:17:35 +0300 Subject: [PATCH] Revert "i386/cpu: Set up CPUID_HT in x86_cpu_expand_featur= es() instead of cpu_x86_cpuid()" This reverts commit c6bd2dd634208ca717b6dc010064fe34d1359080. The original change caused a regression where macOS guests (XNU kernel) would panic during boot with a divide error (type=3D0) when using SMP configuration. This affects multiple macOS versions from 10.6 to 10.14 and possibly others. The issue occurs during kernel TSC initialization and can be worked around by using single-core configuration (-smp 1), but reverting this change restores proper multi-core functionality. Buglink: https://gitlab.com/qemu-project/qemu/-/issues/2933 Tested-by: Elisey Konstantinov Signed-off-by: Elisey Konstantinov --- target/i386/cpu.c | 15 +-------------- 1 file changed, 1 insertion(+), 14 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 9689f6374e..c648a1cf04 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -6859,6 +6859,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, = uint32_t count, *edx =3D env->features[FEAT_1_EDX]; if (threads_per_pkg > 1) { *ebx |=3D threads_per_pkg << 16; + *edx |=3D CPUID_HT; } if (!cpu->enable_pmu) { *ecx &=3D ~CPUID_EXT_PDCM; @@ -7838,20 +7839,6 @@ void x86_cpu_expand_features(X86CPU *cpu, Error **er= rp) } } - if (x86_threads_per_pkg(&env->topo_info) > 1) { - env->features[FEAT_1_EDX] |=3D CPUID_HT; - - /* - * The Linux kernel checks for the CMPLegacy bit and - * discards multiple thread information if it is set. - * So don't set it here for Intel (and other processors - * following Intel's behavior) to make Linux guests happy. - */ - if (!IS_INTEL_CPU(env) && !IS_ZHAOXIN_CPU(env)) { - env->features[FEAT_8000_0001_ECX] |=3D CPUID_EXT3_CMP_LEG; - } - } - for (i =3D 0; i < ARRAY_SIZE(feature_dependencies); i++) { FeatureDep *d =3D &feature_dependencies[i]; if (!(env->features[d->from.index] & d->from.mask)) { --=20 2.39.5 (Apple Git-154)