From nobody Mon Nov 25 11:41:54 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=eik.bme.hu Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1715556673905687.7120637051869; Sun, 12 May 2024 16:31:13 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s6Ibf-00014V-5f; Sun, 12 May 2024 19:27:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s6Ibc-00012H-9Y; Sun, 12 May 2024 19:27:48 -0400 Received: from zero.eik.bme.hu ([2001:738:2001:2001::2001]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s6Iba-0000FV-8i; Sun, 12 May 2024 19:27:48 -0400 Received: from zero.eik.bme.hu (localhost [127.0.0.1]) by zero.eik.bme.hu (Postfix) with ESMTP id A87534E6765; Mon, 13 May 2024 01:27:44 +0200 (CEST) Received: from zero.eik.bme.hu ([127.0.0.1]) by zero.eik.bme.hu (zero.eik.bme.hu [127.0.0.1]) (amavisd-new, port 10028) with ESMTP id 7Vf7p-UMReRo; Mon, 13 May 2024 01:27:42 +0200 (CEST) Received: by zero.eik.bme.hu (Postfix, from userid 432) id B4DBD4E6778; Mon, 13 May 2024 01:27:42 +0200 (CEST) X-Virus-Scanned: amavisd-new at eik.bme.hu Message-Id: <050892766bc82a2fedbf09364278503b5fe5b8ed.1715555763.git.balaton@eik.bme.hu> In-Reply-To: References: From: BALATON Zoltan Subject: [PATCH v7 10/61] target/ppc/mmu_common.c: Eliminate ret from mmu6xx_get_physical_address() MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Cc: Nicholas Piggin , Daniel Henrique Barboza Date: Mon, 13 May 2024 01:27:42 +0200 (CEST) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:738:2001:2001::2001; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1715556674611100003 Content-Type: text/plain; charset="utf-8" Return directly, which is simpler than dragging a return value through multpile if and else blocks. Signed-off-by: BALATON Zoltan Reviewed-by: Nicholas Piggin --- target/ppc/mmu_common.c | 84 +++++++++++++++++++---------------------- 1 file changed, 39 insertions(+), 45 deletions(-) diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c index 89bfd9aa45..03d9e6bfda 100644 --- a/target/ppc/mmu_common.c +++ b/target/ppc/mmu_common.c @@ -386,7 +386,6 @@ static int mmu6xx_get_physical_address(CPUPPCState *env= , mmu_ctx_t *ctx, target_ulong vsid, sr, pgidx; int ds, target_page_bits; bool pr; - int ret; =20 /* First try to find a BAT entry if there are any */ if (env->nb_BATs && get_bat_6xx_tlb(env, ctx, eaddr, access_type) =3D= =3D 0) { @@ -419,7 +418,6 @@ static int mmu6xx_get_physical_address(CPUPPCState *env= , mmu_ctx_t *ctx, qemu_log_mask(CPU_LOG_MMU, "pte segment: key=3D%d ds %d nx %d vsid " TARGET_FMT_lx "\n", ctx->key, ds, ctx->nx, vsid); - ret =3D -1; if (!ds) { /* Check if instruction fetch is allowed, if needed */ if (type =3D=3D ACCESS_CODE && ctx->nx) { @@ -436,51 +434,47 @@ static int mmu6xx_get_physical_address(CPUPPCState *e= nv, mmu_ctx_t *ctx, /* Initialize real address with an invalid value */ ctx->raddr =3D (hwaddr)-1ULL; /* Software TLB search */ - ret =3D ppc6xx_tlb_check(env, ctx, eaddr, access_type); - } else { - qemu_log_mask(CPU_LOG_MMU, "direct store...\n"); - /* Direct-store segment : absolutely *BUGGY* for now */ - - switch (type) { - case ACCESS_INT: - /* Integer load/store : only access allowed */ - break; - case ACCESS_CODE: - /* No code fetch is allowed in direct-store areas */ - return -4; - case ACCESS_FLOAT: - /* Floating point load/store */ - return -4; - case ACCESS_RES: - /* lwarx, ldarx or srwcx. */ - return -4; - case ACCESS_CACHE: - /* - * dcba, dcbt, dcbtst, dcbf, dcbi, dcbst, dcbz, or icbi - * - * Should make the instruction do no-op. As it already do - * no-op, it's quite easy :-) - */ - ctx->raddr =3D eaddr; - return 0; - case ACCESS_EXT: - /* eciwx or ecowx */ - return -4; - default: - qemu_log_mask(CPU_LOG_MMU, "ERROR: instruction should not need= " - "address translation\n"); - return -4; - } - if ((access_type =3D=3D MMU_DATA_STORE || ctx->key !=3D 1) && - (access_type =3D=3D MMU_DATA_LOAD || ctx->key !=3D 0)) { - ctx->raddr =3D eaddr; - ret =3D 2; - } else { - ret =3D -2; - } + return ppc6xx_tlb_check(env, ctx, eaddr, access_type); } =20 - return ret; + /* Direct-store segment : absolutely *BUGGY* for now */ + qemu_log_mask(CPU_LOG_MMU, "direct store...\n"); + switch (type) { + case ACCESS_INT: + /* Integer load/store : only access allowed */ + break; + case ACCESS_CODE: + /* No code fetch is allowed in direct-store areas */ + return -4; + case ACCESS_FLOAT: + /* Floating point load/store */ + return -4; + case ACCESS_RES: + /* lwarx, ldarx or srwcx. */ + return -4; + case ACCESS_CACHE: + /* + * dcba, dcbt, dcbtst, dcbf, dcbi, dcbst, dcbz, or icbi + * + * Should make the instruction do no-op. As it already do + * no-op, it's quite easy :-) + */ + ctx->raddr =3D eaddr; + return 0; + case ACCESS_EXT: + /* eciwx or ecowx */ + return -4; + default: + qemu_log_mask(CPU_LOG_MMU, "ERROR: instruction should not need add= ress" + " translation\n"); + return -4; + } + if ((access_type =3D=3D MMU_DATA_STORE || ctx->key !=3D 1) && + (access_type =3D=3D MMU_DATA_LOAD || ctx->key !=3D 0)) { + ctx->raddr =3D eaddr; + return 2; + } + return -2; } =20 /* Generic TLB check function for embedded PowerPC implementations */ --=20 2.30.9