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From: Chao Liu <lc00631@tecorigin.com>
To: bmeng.cn@gmail.com, liwei1518@gmail.com, palmer@dabbelt.com,
alistair.francis@wdc.com, dbarboza@ventanamicro.com,
zhiwei_liu@linux.alibaba.com, max.chou@sifive.com, alistair23@gmail.com
Cc: qemu-riscv@nongnu.org, qemu-devel@nongnu.org, zqz00548@tecorigin.com,
Chao Liu <lc00631@tecorigin.com>
Subject: [PATCH v2 2/2] target/riscv: fix handling of nop for vstart >= vl in
some vector instruction
Date: Wed, 18 Dec 2024 15:15:31 +0800
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fix: https://lore.kernel.org/all/20240322085319.1758843-8-alistair.francis@=
wdc.com/
Signed-off-by: Chao Liu <lc00631@tecorigin.com>
---
target/riscv/vector_helper.c | 18 ++++++++++++++----
1 file changed, 14 insertions(+), 4 deletions(-)
diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
index 4f14395808..5f1fc24d99 100644
--- a/target/riscv/vector_helper.c
+++ b/target/riscv/vector_helper.c
@@ -2151,8 +2151,6 @@ vext_vv_rm_1(void *vd, void *v0, void *vs1, void *vs2,
uint32_t vl, uint32_t vm, int vxrm,
opivv2_rm_fn *fn, uint32_t vma, uint32_t esz)
{
- VSTART_CHECK_EARLY_EXIT(env, vl);
-
for (uint32_t i =3D env->vstart; i < vl; i++) {
if (!vm && !vext_elem_mask(v0, i)) {
/* set masked-off elements to 1s */
@@ -2176,6 +2174,8 @@ vext_vv_rm_2(void *vd, void *v0, void *vs1, void *vs2,
uint32_t vta =3D vext_vta(desc);
uint32_t vma =3D vext_vma(desc);
=20
+ VSTART_CHECK_EARLY_EXIT(env, vl);
+
switch (env->vxrm) {
case 0: /* rnu */
vext_vv_rm_1(vd, v0, vs1, vs2,
@@ -2278,8 +2278,6 @@ vext_vx_rm_1(void *vd, void *v0, target_long s1, void=
*vs2,
uint32_t vl, uint32_t vm, int vxrm,
opivx2_rm_fn *fn, uint32_t vma, uint32_t esz)
{
- VSTART_CHECK_EARLY_EXIT(env, vl);
-
for (uint32_t i =3D env->vstart; i < vl; i++) {
if (!vm && !vext_elem_mask(v0, i)) {
/* set masked-off elements to 1s */
@@ -2303,6 +2301,8 @@ vext_vx_rm_2(void *vd, void *v0, target_long s1, void=
*vs2,
uint32_t vta =3D vext_vta(desc);
uint32_t vma =3D vext_vma(desc);
=20
+ VSTART_CHECK_EARLY_EXIT(env, vl);
+
switch (env->vxrm) {
case 0: /* rnu */
vext_vx_rm_1(vd, v0, s1, vs2,
@@ -4638,6 +4638,8 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, =
\
uint32_t i; \
TD s1 =3D *((TD *)vs1 + HD(0)); \
\
+ VSTART_CHECK_EARLY_EXIT(env, vl); \
+ \
for (i =3D env->vstart; i < vl; i++) { \
TS2 s2 =3D *((TS2 *)vs2 + HS2(i)); \
if (!vm && !vext_elem_mask(v0, i)) { \
@@ -4724,6 +4726,8 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, =
\
uint32_t i; \
TD s1 =3D *((TD *)vs1 + HD(0)); \
\
+ VSTART_CHECK_EARLY_EXIT(env, vl); \
+ \
for (i =3D env->vstart; i < vl; i++) { \
TS2 s2 =3D *((TS2 *)vs2 + HS2(i)); \
if (!vm && !vext_elem_mask(v0, i)) { \
@@ -4886,6 +4890,8 @@ static void vmsetm(void *vd, void *v0, void *vs2, CPU=
RISCVState *env,
int i;
bool first_mask_bit =3D false;
=20
+ VSTART_CHECK_EARLY_EXIT(env, vl);
+
for (i =3D env->vstart; i < vl; i++) {
if (!vm && !vext_elem_mask(v0, i)) {
/* set masked-off elements to 1s */
@@ -4958,6 +4964,8 @@ void HELPER(NAME)(void *vd, void *v0, void *vs2, CPUR=
ISCVState *env, \
uint32_t sum =3D 0; =
\
int i; \
\
+ VSTART_CHECK_EARLY_EXIT(env, vl); \
+ \
for (i =3D env->vstart; i < vl; i++) { =
\
if (!vm && !vext_elem_mask(v0, i)) { \
/* set masked-off elements to 1s */ \
@@ -5316,6 +5324,8 @@ void HELPER(NAME)(void *vd, void *v0, void *vs1, void=
*vs2, \
uint32_t vta =3D vext_vta(desc); =
\
uint32_t num =3D 0, i; =
\
\
+ VSTART_CHECK_EARLY_EXIT(env, vl); \
+ \
for (i =3D env->vstart; i < vl; i++) { =
\
if (!vext_elem_mask(vs1, i)) { \
continue; \
--=20
2.47.1