[PATCH 0/9] qemu: Change CPU comparison algorithm for future models

Jiri Denemark posted 9 patches 2 weeks, 1 day ago
src/cpu/cpu.c                                 | 104 ++++++++++++++++++
src/cpu/cpu.h                                 |  17 +++
src/cpu/cpu_x86.c                             |  67 +++++++++++
src/cpu_map/x86_486.xml                       |   1 +
src/cpu_map/x86_Broadwell-IBRS.xml            |   1 +
src/cpu_map/x86_Broadwell-noTSX-IBRS.xml      |   1 +
src/cpu_map/x86_Broadwell-noTSX.xml           |   1 +
src/cpu_map/x86_Broadwell.xml                 |   1 +
src/cpu_map/x86_Cascadelake-Server-noTSX.xml  |   1 +
src/cpu_map/x86_Cascadelake-Server.xml        |   1 +
src/cpu_map/x86_Conroe.xml                    |   1 +
src/cpu_map/x86_Cooperlake.xml                |   1 +
src/cpu_map/x86_Dhyana.xml                    |   1 +
src/cpu_map/x86_EPYC-Genoa.xml                |   1 +
src/cpu_map/x86_EPYC-IBPB.xml                 |   1 +
src/cpu_map/x86_EPYC-Milan.xml                |   1 +
src/cpu_map/x86_EPYC-Rome.xml                 |   1 +
src/cpu_map/x86_EPYC.xml                      |   1 +
src/cpu_map/x86_GraniteRapids.xml             |   1 +
src/cpu_map/x86_Haswell-IBRS.xml              |   1 +
src/cpu_map/x86_Haswell-noTSX-IBRS.xml        |   1 +
src/cpu_map/x86_Haswell-noTSX.xml             |   1 +
src/cpu_map/x86_Haswell.xml                   |   1 +
src/cpu_map/x86_Icelake-Client-noTSX.xml      |   1 +
src/cpu_map/x86_Icelake-Client.xml            |   1 +
src/cpu_map/x86_Icelake-Server-noTSX.xml      |   1 +
src/cpu_map/x86_Icelake-Server.xml            |   1 +
src/cpu_map/x86_IvyBridge-IBRS.xml            |   1 +
src/cpu_map/x86_IvyBridge.xml                 |   1 +
src/cpu_map/x86_Nehalem-IBRS.xml              |   1 +
src/cpu_map/x86_Nehalem.xml                   |   1 +
src/cpu_map/x86_Opteron_G1.xml                |   1 +
src/cpu_map/x86_Opteron_G2.xml                |   1 +
src/cpu_map/x86_Opteron_G3.xml                |   1 +
src/cpu_map/x86_Opteron_G4.xml                |   1 +
src/cpu_map/x86_Opteron_G5.xml                |   1 +
src/cpu_map/x86_Penryn.xml                    |   1 +
src/cpu_map/x86_SandyBridge-IBRS.xml          |   1 +
src/cpu_map/x86_SandyBridge.xml               |   1 +
src/cpu_map/x86_SapphireRapids.xml            |   1 +
src/cpu_map/x86_SierraForest.xml              |   1 +
src/cpu_map/x86_Skylake-Client-IBRS.xml       |   1 +
src/cpu_map/x86_Skylake-Client-noTSX-IBRS.xml |   1 +
src/cpu_map/x86_Skylake-Client.xml            |   1 +
src/cpu_map/x86_Skylake-Server-IBRS.xml       |   1 +
src/cpu_map/x86_Skylake-Server-noTSX-IBRS.xml |   1 +
src/cpu_map/x86_Skylake-Server.xml            |   1 +
src/cpu_map/x86_Snowridge.xml                 |   1 +
src/cpu_map/x86_Westmere-IBRS.xml             |   1 +
src/cpu_map/x86_Westmere.xml                  |   1 +
src/cpu_map/x86_athlon.xml                    |   1 +
src/cpu_map/x86_core2duo.xml                  |   1 +
src/cpu_map/x86_coreduo.xml                   |   1 +
src/cpu_map/x86_cpu64-rhel5.xml               |   1 +
src/cpu_map/x86_cpu64-rhel6.xml               |   1 +
src/cpu_map/x86_kvm32.xml                     |   1 +
src/cpu_map/x86_kvm64.xml                     |   1 +
src/cpu_map/x86_n270.xml                      |   1 +
src/cpu_map/x86_pentium.xml                   |   1 +
src/cpu_map/x86_pentium2.xml                  |   1 +
src/cpu_map/x86_pentium3.xml                  |   1 +
src/cpu_map/x86_pentiumpro.xml                |   1 +
src/cpu_map/x86_phenom.xml                    |   1 +
src/cpu_map/x86_qemu32.xml                    |   1 +
src/cpu_map/x86_qemu64.xml                    |   1 +
src/libvirt_private.syms                      |   2 +
src/qemu/qemu_capabilities.c                  |  38 +++++++
src/qemu/qemu_capabilities.h                  |   4 +
src/qemu/qemu_domain.c                        |  65 +++++++++++
src/qemu/qemu_domain.h                        |   7 ++
src/qemu/qemu_driver.c                        |  45 ++++----
src/qemu/qemu_process.c                       |   7 +-
72 files changed, 390 insertions(+), 28 deletions(-)
[PATCH 0/9] qemu: Change CPU comparison algorithm for future models
Posted by Jiri Denemark 2 weeks, 1 day ago
When starting a domain we check whether the guest CPU definition is
compatible with the host (i.e., when the host supports all features
required both explicitly and by the specified CPU model) as long as
check == 'partial', which is the default.

We are doing so by checking our definition of the CPU model in the CPU
map amending it with explicitly mentioned features and comparing it to
features QEMU would enabled when started with -cpu host. But since our
CPU model definitions often slightly differ from QEMU we may be checking
features which are not actually needed and on the other hand not
checking something that is part of the CPU model in QEMU.

This patch changes the algorithm for CPU models added in the future
(changing it for existing models could cause them to suddenly become
incompatible with the host and domains using them would fail to start).
The new algorithm uses information we probe from QEMU about features
that block each model from being directly usable. If all those features
are explicitly disabled in the CPU definition we consider the base model
compatible with the host. Then we only need to check that all explicitly
required features are supported by QEMU on the host to get the result
for the whole CPU definition.

After this we only use the model definitions (for newly added models)
from CPU map for creating a CPU definition for host-model.

Jiri Denemark (9):
  cpu_x86: Introduce <check> element for CPU models
  cpu_map: Use compat partial check for all x86 CPU models
  cpu: Introduce virCPUGetCheckMode
  qemu: Use g_autoptr in qemuConnectCompareHypervisorCPU
  qemu: Use virCPUCompare in qemuConnectCompareHypervisorCPU directly
  qemu: Separate partial CPU check into a function
  cpu: Introduce virCPUCompareUnusable
  qemu_capabilities: Introduce virQEMUCapsGetCPUBlockers
  qemu: Change CPU comparison algorithm for future models

 src/cpu/cpu.c                                 | 104 ++++++++++++++++++
 src/cpu/cpu.h                                 |  17 +++
 src/cpu/cpu_x86.c                             |  67 +++++++++++
 src/cpu_map/x86_486.xml                       |   1 +
 src/cpu_map/x86_Broadwell-IBRS.xml            |   1 +
 src/cpu_map/x86_Broadwell-noTSX-IBRS.xml      |   1 +
 src/cpu_map/x86_Broadwell-noTSX.xml           |   1 +
 src/cpu_map/x86_Broadwell.xml                 |   1 +
 src/cpu_map/x86_Cascadelake-Server-noTSX.xml  |   1 +
 src/cpu_map/x86_Cascadelake-Server.xml        |   1 +
 src/cpu_map/x86_Conroe.xml                    |   1 +
 src/cpu_map/x86_Cooperlake.xml                |   1 +
 src/cpu_map/x86_Dhyana.xml                    |   1 +
 src/cpu_map/x86_EPYC-Genoa.xml                |   1 +
 src/cpu_map/x86_EPYC-IBPB.xml                 |   1 +
 src/cpu_map/x86_EPYC-Milan.xml                |   1 +
 src/cpu_map/x86_EPYC-Rome.xml                 |   1 +
 src/cpu_map/x86_EPYC.xml                      |   1 +
 src/cpu_map/x86_GraniteRapids.xml             |   1 +
 src/cpu_map/x86_Haswell-IBRS.xml              |   1 +
 src/cpu_map/x86_Haswell-noTSX-IBRS.xml        |   1 +
 src/cpu_map/x86_Haswell-noTSX.xml             |   1 +
 src/cpu_map/x86_Haswell.xml                   |   1 +
 src/cpu_map/x86_Icelake-Client-noTSX.xml      |   1 +
 src/cpu_map/x86_Icelake-Client.xml            |   1 +
 src/cpu_map/x86_Icelake-Server-noTSX.xml      |   1 +
 src/cpu_map/x86_Icelake-Server.xml            |   1 +
 src/cpu_map/x86_IvyBridge-IBRS.xml            |   1 +
 src/cpu_map/x86_IvyBridge.xml                 |   1 +
 src/cpu_map/x86_Nehalem-IBRS.xml              |   1 +
 src/cpu_map/x86_Nehalem.xml                   |   1 +
 src/cpu_map/x86_Opteron_G1.xml                |   1 +
 src/cpu_map/x86_Opteron_G2.xml                |   1 +
 src/cpu_map/x86_Opteron_G3.xml                |   1 +
 src/cpu_map/x86_Opteron_G4.xml                |   1 +
 src/cpu_map/x86_Opteron_G5.xml                |   1 +
 src/cpu_map/x86_Penryn.xml                    |   1 +
 src/cpu_map/x86_SandyBridge-IBRS.xml          |   1 +
 src/cpu_map/x86_SandyBridge.xml               |   1 +
 src/cpu_map/x86_SapphireRapids.xml            |   1 +
 src/cpu_map/x86_SierraForest.xml              |   1 +
 src/cpu_map/x86_Skylake-Client-IBRS.xml       |   1 +
 src/cpu_map/x86_Skylake-Client-noTSX-IBRS.xml |   1 +
 src/cpu_map/x86_Skylake-Client.xml            |   1 +
 src/cpu_map/x86_Skylake-Server-IBRS.xml       |   1 +
 src/cpu_map/x86_Skylake-Server-noTSX-IBRS.xml |   1 +
 src/cpu_map/x86_Skylake-Server.xml            |   1 +
 src/cpu_map/x86_Snowridge.xml                 |   1 +
 src/cpu_map/x86_Westmere-IBRS.xml             |   1 +
 src/cpu_map/x86_Westmere.xml                  |   1 +
 src/cpu_map/x86_athlon.xml                    |   1 +
 src/cpu_map/x86_core2duo.xml                  |   1 +
 src/cpu_map/x86_coreduo.xml                   |   1 +
 src/cpu_map/x86_cpu64-rhel5.xml               |   1 +
 src/cpu_map/x86_cpu64-rhel6.xml               |   1 +
 src/cpu_map/x86_kvm32.xml                     |   1 +
 src/cpu_map/x86_kvm64.xml                     |   1 +
 src/cpu_map/x86_n270.xml                      |   1 +
 src/cpu_map/x86_pentium.xml                   |   1 +
 src/cpu_map/x86_pentium2.xml                  |   1 +
 src/cpu_map/x86_pentium3.xml                  |   1 +
 src/cpu_map/x86_pentiumpro.xml                |   1 +
 src/cpu_map/x86_phenom.xml                    |   1 +
 src/cpu_map/x86_qemu32.xml                    |   1 +
 src/cpu_map/x86_qemu64.xml                    |   1 +
 src/libvirt_private.syms                      |   2 +
 src/qemu/qemu_capabilities.c                  |  38 +++++++
 src/qemu/qemu_capabilities.h                  |   4 +
 src/qemu/qemu_domain.c                        |  65 +++++++++++
 src/qemu/qemu_domain.h                        |   7 ++
 src/qemu/qemu_driver.c                        |  45 ++++----
 src/qemu/qemu_process.c                       |   7 +-
 72 files changed, 390 insertions(+), 28 deletions(-)

-- 
2.47.0
Re: [PATCH 0/9] qemu: Change CPU comparison algorithm for future models
Posted by Ján Tomko 1 week, 2 days ago
On a Thursday in 2024, Jiri Denemark wrote:
>When starting a domain we check whether the guest CPU definition is
>compatible with the host (i.e., when the host supports all features
>required both explicitly and by the specified CPU model) as long as
>check == 'partial', which is the default.
>
>We are doing so by checking our definition of the CPU model in the CPU
>map amending it with explicitly mentioned features and comparing it to
>features QEMU would enabled when started with -cpu host. But since our
>CPU model definitions often slightly differ from QEMU we may be checking
>features which are not actually needed and on the other hand not
>checking something that is part of the CPU model in QEMU.
>
>This patch changes the algorithm for CPU models added in the future
>(changing it for existing models could cause them to suddenly become
>incompatible with the host and domains using them would fail to start).
>The new algorithm uses information we probe from QEMU about features
>that block each model from being directly usable. If all those features
>are explicitly disabled in the CPU definition we consider the base model
>compatible with the host. Then we only need to check that all explicitly
>required features are supported by QEMU on the host to get the result
>for the whole CPU definition.
>
>After this we only use the model definitions (for newly added models)
>from CPU map for creating a CPU definition for host-model.
>
>Jiri Denemark (9):
>  cpu_x86: Introduce <check> element for CPU models
>  cpu_map: Use compat partial check for all x86 CPU models
>  cpu: Introduce virCPUGetCheckMode
>  qemu: Use g_autoptr in qemuConnectCompareHypervisorCPU
>  qemu: Use virCPUCompare in qemuConnectCompareHypervisorCPU directly
>  qemu: Separate partial CPU check into a function
>  cpu: Introduce virCPUCompareUnusable
>  qemu_capabilities: Introduce virQEMUCapsGetCPUBlockers
>  qemu: Change CPU comparison algorithm for future models
>
> src/cpu/cpu.c                                 | 104 ++++++++++++++++++
> src/cpu/cpu.h                                 |  17 +++
> src/cpu/cpu_x86.c                             |  67 +++++++++++
> src/cpu_map/x86_486.xml                       |   1 +
> src/cpu_map/x86_Broadwell-IBRS.xml            |   1 +
> src/cpu_map/x86_Broadwell-noTSX-IBRS.xml      |   1 +
> src/cpu_map/x86_Broadwell-noTSX.xml           |   1 +
> src/cpu_map/x86_Broadwell.xml                 |   1 +
> src/cpu_map/x86_Cascadelake-Server-noTSX.xml  |   1 +
> src/cpu_map/x86_Cascadelake-Server.xml        |   1 +
> src/cpu_map/x86_Conroe.xml                    |   1 +
> src/cpu_map/x86_Cooperlake.xml                |   1 +
> src/cpu_map/x86_Dhyana.xml                    |   1 +
> src/cpu_map/x86_EPYC-Genoa.xml                |   1 +
> src/cpu_map/x86_EPYC-IBPB.xml                 |   1 +
> src/cpu_map/x86_EPYC-Milan.xml                |   1 +
> src/cpu_map/x86_EPYC-Rome.xml                 |   1 +
> src/cpu_map/x86_EPYC.xml                      |   1 +
> src/cpu_map/x86_GraniteRapids.xml             |   1 +
> src/cpu_map/x86_Haswell-IBRS.xml              |   1 +
> src/cpu_map/x86_Haswell-noTSX-IBRS.xml        |   1 +
> src/cpu_map/x86_Haswell-noTSX.xml             |   1 +
> src/cpu_map/x86_Haswell.xml                   |   1 +
> src/cpu_map/x86_Icelake-Client-noTSX.xml      |   1 +
> src/cpu_map/x86_Icelake-Client.xml            |   1 +
> src/cpu_map/x86_Icelake-Server-noTSX.xml      |   1 +
> src/cpu_map/x86_Icelake-Server.xml            |   1 +
> src/cpu_map/x86_IvyBridge-IBRS.xml            |   1 +
> src/cpu_map/x86_IvyBridge.xml                 |   1 +
> src/cpu_map/x86_Nehalem-IBRS.xml              |   1 +
> src/cpu_map/x86_Nehalem.xml                   |   1 +
> src/cpu_map/x86_Opteron_G1.xml                |   1 +
> src/cpu_map/x86_Opteron_G2.xml                |   1 +
> src/cpu_map/x86_Opteron_G3.xml                |   1 +
> src/cpu_map/x86_Opteron_G4.xml                |   1 +
> src/cpu_map/x86_Opteron_G5.xml                |   1 +
> src/cpu_map/x86_Penryn.xml                    |   1 +
> src/cpu_map/x86_SandyBridge-IBRS.xml          |   1 +
> src/cpu_map/x86_SandyBridge.xml               |   1 +
> src/cpu_map/x86_SapphireRapids.xml            |   1 +
> src/cpu_map/x86_SierraForest.xml              |   1 +
> src/cpu_map/x86_Skylake-Client-IBRS.xml       |   1 +
> src/cpu_map/x86_Skylake-Client-noTSX-IBRS.xml |   1 +
> src/cpu_map/x86_Skylake-Client.xml            |   1 +
> src/cpu_map/x86_Skylake-Server-IBRS.xml       |   1 +
> src/cpu_map/x86_Skylake-Server-noTSX-IBRS.xml |   1 +
> src/cpu_map/x86_Skylake-Server.xml            |   1 +
> src/cpu_map/x86_Snowridge.xml                 |   1 +
> src/cpu_map/x86_Westmere-IBRS.xml             |   1 +
> src/cpu_map/x86_Westmere.xml                  |   1 +
> src/cpu_map/x86_athlon.xml                    |   1 +
> src/cpu_map/x86_core2duo.xml                  |   1 +
> src/cpu_map/x86_coreduo.xml                   |   1 +
> src/cpu_map/x86_cpu64-rhel5.xml               |   1 +
> src/cpu_map/x86_cpu64-rhel6.xml               |   1 +
> src/cpu_map/x86_kvm32.xml                     |   1 +
> src/cpu_map/x86_kvm64.xml                     |   1 +
> src/cpu_map/x86_n270.xml                      |   1 +
> src/cpu_map/x86_pentium.xml                   |   1 +
> src/cpu_map/x86_pentium2.xml                  |   1 +
> src/cpu_map/x86_pentium3.xml                  |   1 +
> src/cpu_map/x86_pentiumpro.xml                |   1 +
> src/cpu_map/x86_phenom.xml                    |   1 +
> src/cpu_map/x86_qemu32.xml                    |   1 +
> src/cpu_map/x86_qemu64.xml                    |   1 +
> src/libvirt_private.syms                      |   2 +
> src/qemu/qemu_capabilities.c                  |  38 +++++++
> src/qemu/qemu_capabilities.h                  |   4 +
> src/qemu/qemu_domain.c                        |  65 +++++++++++
> src/qemu/qemu_domain.h                        |   7 ++
> src/qemu/qemu_driver.c                        |  45 ++++----
> src/qemu/qemu_process.c                       |   7 +-
> 72 files changed, 390 insertions(+), 28 deletions(-)
>

Reviewed-by: Ján Tomko <jtomko@redhat.com>

Jano