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Wed, 4 May 2022 18:54:24 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1651683304; h=from:from:sender:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:list-id:list-help: list-unsubscribe:list-subscribe:list-post; bh=/tATaXlYbh7ycjM6C3RL7YGoB7TEfLenrMEzzsgJSoI=; b=GrO2C8KF7VXXkbIj6qCfBSiGG+NnpQYIP0u3itDDbq+AMLAxRe1tC6mUmgYpyYIfXL/Sy5 0LVzmo8avEZ+sGE+pjcVQy+xMne87ZbI+0RP/KDFOPnPaJKT8DVnQbuMjQpfA3tCEiKcvr yqE8QdUJyqEXSlONgbNqHUZYLnUx0bY= X-MC-Unique: LZby8JKPMnuUzDwviWa7Bg-1 X-Original-To: libvir-list@listman.corp.redhat.com From: Jiri Denemark To: libvir-list@redhat.com Subject: [libvirt PATCH 1/8] cpu_map: Disable cpu64-rhel* for host-model and baseline Date: Wed, 4 May 2022 18:54:14 +0200 Message-Id: <3e9d4535fdfbb1aa36f8f6a92e34a41126fb48dc.1651683161.git.jdenemar@redhat.com> In-Reply-To: References: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.85 on 10.11.54.10 X-BeenThere: libvir-list@redhat.com X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development discussions about the libvirt library & tools List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libvir-list-bounces@redhat.com Sender: "libvir-list" X-Scanned-By: MIMEDefang 2.85 on 10.11.54.9 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=libvir-list-bounces@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1651683306949100011 Content-Type: text/plain; charset="utf-8" These ancient RHEL-only CPU models should not really be used by any CPU definition created by libvirt. We keep them just for backwards compatibility with domains which might still be using them. Signed-off-by: Jiri Denemark Reviewed-by: Michal Privoznik --- src/cpu_map/x86_cpu64-rhel5.xml | 2 +- src/cpu_map/x86_cpu64-rhel6.xml | 2 +- tests/cputestdata/x86_64-baseline-no-vendor-result.xml | 3 ++- 3 files changed, 4 insertions(+), 3 deletions(-) diff --git a/src/cpu_map/x86_cpu64-rhel5.xml b/src/cpu_map/x86_cpu64-rhel5.= xml index be6bcdb7a6..7402b7603c 100644 --- a/src/cpu_map/x86_cpu64-rhel5.xml +++ b/src/cpu_map/x86_cpu64-rhel5.xml @@ -1,6 +1,6 @@ - + diff --git a/src/cpu_map/x86_cpu64-rhel6.xml b/src/cpu_map/x86_cpu64-rhel6.= xml index c62b1b5575..061939c733 100644 --- a/src/cpu_map/x86_cpu64-rhel6.xml +++ b/src/cpu_map/x86_cpu64-rhel6.xml @@ -1,6 +1,6 @@ - + diff --git a/tests/cputestdata/x86_64-baseline-no-vendor-result.xml b/tests= /cputestdata/x86_64-baseline-no-vendor-result.xml index 00e03b2152..4b4921cf93 100644 --- a/tests/cputestdata/x86_64-baseline-no-vendor-result.xml +++ b/tests/cputestdata/x86_64-baseline-no-vendor-result.xml @@ -1,3 +1,4 @@ - cpu64-rhel6 + kvm64 + --=20 2.35.1 From nobody Wed Apr 24 00:28:27 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 170.10.129.124 as permitted sender) client-ip=170.10.129.124; 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Wed, 4 May 2022 16:54:50 +0000 (UTC) Received: from mm-prod-listman-01.mail-001.prod.us-east-1.aws.redhat.com (localhost [IPv6:::1]) by mm-prod-listman-01.mail-001.prod.us-east-1.aws.redhat.com (Postfix) with ESMTP id 137A21947B8F; Wed, 4 May 2022 16:54:49 +0000 (UTC) Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.rdu2.redhat.com [10.11.54.8]) by mm-prod-listman-01.mail-001.prod.us-east-1.aws.redhat.com (Postfix) with ESMTP id 48DB81947047 for ; Wed, 4 May 2022 16:54:47 +0000 (UTC) Received: by smtp.corp.redhat.com (Postfix) id 3D00EC27D8F; Wed, 4 May 2022 16:54:47 +0000 (UTC) Received: from rein.int.mamuti.net (unknown [10.40.195.120]) by smtp.corp.redhat.com (Postfix) with ESMTPS id F3C0AC202CB for ; Wed, 4 May 2022 16:54:46 +0000 (UTC) Received: by rein.int.mamuti.net (Postfix, from userid 500) id 12FF318011C; Wed, 4 May 2022 18:54:24 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1651683301; h=from:from:sender:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:list-id:list-help: list-unsubscribe:list-subscribe:list-post; bh=rZIiqIMPBhJFUjl+KjvbVMCAVGeuQRSzt6Jp9cFUjLM=; b=MOV5BykDZ2nERzZoRaIGRENe524rK2mHyY/bez5Xu4QR4mDvehXsYRG3/y/RvnEaiWfSMt V9EJKk9ISFupduANeOSDDgneTX2wiPXXkSfebkDOftgxtwbYrXIteOP381CakOcs5PaYwm n8YjyjllnhO/9lrfpk75Bn19iVwMvMI= X-MC-Unique: juQ-zgPANzqYKWDh8JXeOA-1 X-Original-To: libvir-list@listman.corp.redhat.com From: Jiri Denemark To: libvir-list@redhat.com Subject: [libvirt PATCH 2/8] cputest: Drop some old artificial baseline tests Date: Wed, 4 May 2022 18:54:15 +0200 Message-Id: In-Reply-To: References: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.85 on 10.11.54.8 X-BeenThere: libvir-list@redhat.com X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development discussions about the libvirt library & tools List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libvir-list-bounces@redhat.com Sender: "libvir-list" X-Scanned-By: MIMEDefang 2.84 on 10.11.54.1 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=libvir-list-bounces@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1651683302933100004 Content-Type: text/plain; charset="utf-8" Signed-off-by: Jiri Denemark Reviewed-by: Michal Privoznik --- tests/cputest.c | 6 --- .../cputestdata/x86_64-baseline-1-result.xml | 5 -- tests/cputestdata/x86_64-baseline-1.xml | 20 -------- .../cputestdata/x86_64-baseline-2-result.xml | 4 -- tests/cputestdata/x86_64-baseline-2.xml | 22 --------- .../x86_64-baseline-5-expanded.xml | 47 ------------------- .../cputestdata/x86_64-baseline-5-result.xml | 10 ---- tests/cputestdata/x86_64-baseline-5.xml | 35 -------------- .../cputestdata/x86_64-baseline-7-result.xml | 4 -- tests/cputestdata/x86_64-baseline-7.xml | 24 ---------- .../cputestdata/x86_64-baseline-8-result.xml | 4 -- tests/cputestdata/x86_64-baseline-8.xml | 28 ----------- 12 files changed, 209 deletions(-) delete mode 100644 tests/cputestdata/x86_64-baseline-1-result.xml delete mode 100644 tests/cputestdata/x86_64-baseline-1.xml delete mode 100644 tests/cputestdata/x86_64-baseline-2-result.xml delete mode 100644 tests/cputestdata/x86_64-baseline-2.xml delete mode 100644 tests/cputestdata/x86_64-baseline-5-expanded.xml delete mode 100644 tests/cputestdata/x86_64-baseline-5-result.xml delete mode 100644 tests/cputestdata/x86_64-baseline-5.xml delete mode 100644 tests/cputestdata/x86_64-baseline-7-result.xml delete mode 100644 tests/cputestdata/x86_64-baseline-7.xml delete mode 100644 tests/cputestdata/x86_64-baseline-8-result.xml delete mode 100644 tests/cputestdata/x86_64-baseline-8.xml diff --git a/tests/cputest.c b/tests/cputest.c index 95fb37d15c..697b20ada3 100644 --- a/tests/cputest.c +++ b/tests/cputest.c @@ -1050,18 +1050,12 @@ mymain(void) DO_TEST_BASELINE(VIR_ARCH_X86_64, "incompatible-vendors", 0, -1); DO_TEST_BASELINE(VIR_ARCH_X86_64, "no-vendor", 0, 0); DO_TEST_BASELINE(VIR_ARCH_X86_64, "some-vendors", 0, 0); - DO_TEST_BASELINE(VIR_ARCH_X86_64, "1", 0, 0); - DO_TEST_BASELINE(VIR_ARCH_X86_64, "2", 0, 0); DO_TEST_BASELINE(VIR_ARCH_X86_64, "3", 0, 0); DO_TEST_BASELINE(VIR_ARCH_X86_64, "3", VIR_CONNECT_BASELINE_CPU_EXPAND= _FEATURES, 0); DO_TEST_BASELINE(VIR_ARCH_X86_64, "4", 0, 0); DO_TEST_BASELINE(VIR_ARCH_X86_64, "4", VIR_CONNECT_BASELINE_CPU_EXPAND= _FEATURES, 0); - DO_TEST_BASELINE(VIR_ARCH_X86_64, "5", 0, 0); - DO_TEST_BASELINE(VIR_ARCH_X86_64, "5", VIR_CONNECT_BASELINE_CPU_EXPAND= _FEATURES, 0); DO_TEST_BASELINE(VIR_ARCH_X86_64, "6", 0, 0); DO_TEST_BASELINE(VIR_ARCH_X86_64, "6", VIR_CONNECT_BASELINE_CPU_MIGRAT= ABLE, 0); - DO_TEST_BASELINE(VIR_ARCH_X86_64, "7", 0, 0); - DO_TEST_BASELINE(VIR_ARCH_X86_64, "8", 0, 0); =20 DO_TEST_BASELINE(VIR_ARCH_PPC64, "incompatible-vendors", 0, -1); DO_TEST_BASELINE(VIR_ARCH_PPC64, "no-vendor", 0, 0); diff --git a/tests/cputestdata/x86_64-baseline-1-result.xml b/tests/cputest= data/x86_64-baseline-1-result.xml deleted file mode 100644 index 96c4f43b3d..0000000000 --- a/tests/cputestdata/x86_64-baseline-1-result.xml +++ /dev/null @@ -1,5 +0,0 @@ - - Conroe - Intel - - diff --git a/tests/cputestdata/x86_64-baseline-1.xml b/tests/cputestdata/x8= 6_64-baseline-1.xml deleted file mode 100644 index 509e6a85d2..0000000000 --- a/tests/cputestdata/x86_64-baseline-1.xml +++ /dev/null @@ -1,20 +0,0 @@ - - - x86_64 - Penryn - Intel - - - - x86_64 - Conroe - Intel - - - - x86_64 - core2duo - Intel - - - diff --git a/tests/cputestdata/x86_64-baseline-2-result.xml b/tests/cputest= data/x86_64-baseline-2-result.xml deleted file mode 100644 index a11352d0b1..0000000000 --- a/tests/cputestdata/x86_64-baseline-2-result.xml +++ /dev/null @@ -1,4 +0,0 @@ - - core2duo - - diff --git a/tests/cputestdata/x86_64-baseline-2.xml b/tests/cputestdata/x8= 6_64-baseline-2.xml deleted file mode 100644 index 055223fd34..0000000000 --- a/tests/cputestdata/x86_64-baseline-2.xml +++ /dev/null @@ -1,22 +0,0 @@ - - - x86_64 - core2duo - - - - x86_64 - pentiumpro - - - - - - - - - - - - - diff --git a/tests/cputestdata/x86_64-baseline-5-expanded.xml b/tests/cpute= stdata/x86_64-baseline-5-expanded.xml deleted file mode 100644 index 2c1b400150..0000000000 --- a/tests/cputestdata/x86_64-baseline-5-expanded.xml +++ /dev/null @@ -1,47 +0,0 @@ - - SandyBridge - Intel - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/tests/cputestdata/x86_64-baseline-5-result.xml b/tests/cputest= data/x86_64-baseline-5-result.xml deleted file mode 100644 index 775a27de2e..0000000000 --- a/tests/cputestdata/x86_64-baseline-5-result.xml +++ /dev/null @@ -1,10 +0,0 @@ - - SandyBridge - Intel - - - - - - - diff --git a/tests/cputestdata/x86_64-baseline-5.xml b/tests/cputestdata/x8= 6_64-baseline-5.xml deleted file mode 100644 index 80cd533ca4..0000000000 --- a/tests/cputestdata/x86_64-baseline-5.xml +++ /dev/null @@ -1,35 +0,0 @@ - - - x86_64 - Westmere - Intel - - - - - - - - - - - - - - x86_64 - Nehalem - Intel - - - - - - - - - - - - - - diff --git a/tests/cputestdata/x86_64-baseline-7-result.xml b/tests/cputest= data/x86_64-baseline-7-result.xml deleted file mode 100644 index 2af549e77a..0000000000 --- a/tests/cputestdata/x86_64-baseline-7-result.xml +++ /dev/null @@ -1,4 +0,0 @@ - - Haswell-noTSX - Intel - diff --git a/tests/cputestdata/x86_64-baseline-7.xml b/tests/cputestdata/x8= 6_64-baseline-7.xml deleted file mode 100644 index b7e61b160c..0000000000 --- a/tests/cputestdata/x86_64-baseline-7.xml +++ /dev/null @@ -1,24 +0,0 @@ - - - x86_64 - SandyBridge - Intel - - - - - - - - - - - - - - x86_64 - Haswell-noTSX - Intel - - - diff --git a/tests/cputestdata/x86_64-baseline-8-result.xml b/tests/cputest= data/x86_64-baseline-8-result.xml deleted file mode 100644 index 88226b3dab..0000000000 --- a/tests/cputestdata/x86_64-baseline-8-result.xml +++ /dev/null @@ -1,4 +0,0 @@ - - Broadwell-noTSX - Intel - diff --git a/tests/cputestdata/x86_64-baseline-8.xml b/tests/cputestdata/x8= 6_64-baseline-8.xml deleted file mode 100644 index f1ee67d542..0000000000 --- a/tests/cputestdata/x86_64-baseline-8.xml +++ /dev/null @@ -1,28 +0,0 @@ - - - x86_64 - SandyBridge - Intel - - - - - - - - - - - - - - - - - - x86_64 - Broadwell-noTSX - Intel - - - --=20 2.35.1 From nobody Wed Apr 24 00:28:27 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 170.10.129.124 as permitted sender) client-ip=170.10.129.124; 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bh=HUXCwFyGpMktih0JzXyU22V4P0pQgoMKH0gwzeYwXbk=; b=Hjik/gbM0GJf153ppLe1WA6UG2GFmdZXlvCZ+aZWcfbES82LpaTiS35ze6F6mcj6Q2PJSL dqAY5tXa5OWdmHWTkWTlNexR+Tv75tVa2B+5qyl/aaR0msnQr+AhsP/ndjPD/zycmtU4hX GPhDg+2beiVdql8r1Lu47SX93UBnyk8= X-MC-Unique: RVYggMndPSKLbIyfaymc6g-1 X-Original-To: libvir-list@listman.corp.redhat.com From: Jiri Denemark To: libvir-list@redhat.com Subject: [libvirt PATCH 3/8] cputest: Give better names to baseline tests Date: Wed, 4 May 2022 18:54:16 +0200 Message-Id: <239dac338e83dd8d3b04c4fd689d1c6a38cbf968.1651683161.git.jdenemar@redhat.com> In-Reply-To: References: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.11.54.1 X-BeenThere: libvir-list@redhat.com X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development discussions about the libvirt library & tools List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libvir-list-bounces@redhat.com Sender: "libvir-list" X-Scanned-By: MIMEDefang 2.85 on 10.11.54.10 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=libvir-list-bounces@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1651683302915100001 Content-Type: text/plain; charset="utf-8" Signed-off-by: Jiri Denemark Reviewed-by: Michal Privoznik --- tests/cputest.c | 12 ++++++------ ... x86_64-baseline-Westmere+Nehalem-migratable.xml} | 0 ...l =3D> x86_64-baseline-Westmere+Nehalem-result.xml} | 0 ...ne-6.xml =3D> x86_64-baseline-Westmere+Nehalem.xml} | 0 ...ded.xml =3D> x86_64-baseline-features-expanded.xml} | 0 ...esult.xml =3D> x86_64-baseline-features-result.xml} | 0 ...4-baseline-4.xml =3D> x86_64-baseline-features.xml} | 0 ...anded.xml =3D> x86_64-baseline-simple-expanded.xml} | 0 ...-result.xml =3D> x86_64-baseline-simple-result.xml} | 0 ..._64-baseline-3.xml =3D> x86_64-baseline-simple.xml} | 0 10 files changed, 6 insertions(+), 6 deletions(-) rename tests/cputestdata/{x86_64-baseline-6-migratable.xml =3D> x86_64-bas= eline-Westmere+Nehalem-migratable.xml} (100%) rename tests/cputestdata/{x86_64-baseline-6-result.xml =3D> x86_64-baselin= e-Westmere+Nehalem-result.xml} (100%) rename tests/cputestdata/{x86_64-baseline-6.xml =3D> x86_64-baseline-Westm= ere+Nehalem.xml} (100%) rename tests/cputestdata/{x86_64-baseline-4-expanded.xml =3D> x86_64-basel= ine-features-expanded.xml} (100%) rename tests/cputestdata/{x86_64-baseline-4-result.xml =3D> x86_64-baselin= e-features-result.xml} (100%) rename tests/cputestdata/{x86_64-baseline-4.xml =3D> x86_64-baseline-featu= res.xml} (100%) rename tests/cputestdata/{x86_64-baseline-3-expanded.xml =3D> x86_64-basel= ine-simple-expanded.xml} (100%) rename tests/cputestdata/{x86_64-baseline-3-result.xml =3D> x86_64-baselin= e-simple-result.xml} (100%) rename tests/cputestdata/{x86_64-baseline-3.xml =3D> x86_64-baseline-simpl= e.xml} (100%) diff --git a/tests/cputest.c b/tests/cputest.c index 697b20ada3..305002bdbc 100644 --- a/tests/cputest.c +++ b/tests/cputest.c @@ -1050,12 +1050,12 @@ mymain(void) DO_TEST_BASELINE(VIR_ARCH_X86_64, "incompatible-vendors", 0, -1); DO_TEST_BASELINE(VIR_ARCH_X86_64, "no-vendor", 0, 0); DO_TEST_BASELINE(VIR_ARCH_X86_64, "some-vendors", 0, 0); - DO_TEST_BASELINE(VIR_ARCH_X86_64, "3", 0, 0); - DO_TEST_BASELINE(VIR_ARCH_X86_64, "3", VIR_CONNECT_BASELINE_CPU_EXPAND= _FEATURES, 0); - DO_TEST_BASELINE(VIR_ARCH_X86_64, "4", 0, 0); - DO_TEST_BASELINE(VIR_ARCH_X86_64, "4", VIR_CONNECT_BASELINE_CPU_EXPAND= _FEATURES, 0); - DO_TEST_BASELINE(VIR_ARCH_X86_64, "6", 0, 0); - DO_TEST_BASELINE(VIR_ARCH_X86_64, "6", VIR_CONNECT_BASELINE_CPU_MIGRAT= ABLE, 0); + DO_TEST_BASELINE(VIR_ARCH_X86_64, "simple", 0, 0); + DO_TEST_BASELINE(VIR_ARCH_X86_64, "simple", VIR_CONNECT_BASELINE_CPU_E= XPAND_FEATURES, 0); + DO_TEST_BASELINE(VIR_ARCH_X86_64, "features", 0, 0); + DO_TEST_BASELINE(VIR_ARCH_X86_64, "features", VIR_CONNECT_BASELINE_CPU= _EXPAND_FEATURES, 0); + DO_TEST_BASELINE(VIR_ARCH_X86_64, "Westmere+Nehalem", 0, 0); + DO_TEST_BASELINE(VIR_ARCH_X86_64, "Westmere+Nehalem", VIR_CONNECT_BASE= LINE_CPU_MIGRATABLE, 0); =20 DO_TEST_BASELINE(VIR_ARCH_PPC64, "incompatible-vendors", 0, -1); DO_TEST_BASELINE(VIR_ARCH_PPC64, "no-vendor", 0, 0); diff --git a/tests/cputestdata/x86_64-baseline-6-migratable.xml b/tests/cpu= testdata/x86_64-baseline-Westmere+Nehalem-migratable.xml similarity index 100% rename from tests/cputestdata/x86_64-baseline-6-migratable.xml rename to tests/cputestdata/x86_64-baseline-Westmere+Nehalem-migratable.xml diff --git a/tests/cputestdata/x86_64-baseline-6-result.xml b/tests/cputest= data/x86_64-baseline-Westmere+Nehalem-result.xml similarity index 100% rename from tests/cputestdata/x86_64-baseline-6-result.xml rename to tests/cputestdata/x86_64-baseline-Westmere+Nehalem-result.xml diff --git a/tests/cputestdata/x86_64-baseline-6.xml b/tests/cputestdata/x8= 6_64-baseline-Westmere+Nehalem.xml similarity index 100% rename from tests/cputestdata/x86_64-baseline-6.xml rename to tests/cputestdata/x86_64-baseline-Westmere+Nehalem.xml diff --git a/tests/cputestdata/x86_64-baseline-4-expanded.xml b/tests/cpute= stdata/x86_64-baseline-features-expanded.xml similarity index 100% rename from tests/cputestdata/x86_64-baseline-4-expanded.xml rename to tests/cputestdata/x86_64-baseline-features-expanded.xml diff --git a/tests/cputestdata/x86_64-baseline-4-result.xml b/tests/cputest= data/x86_64-baseline-features-result.xml similarity index 100% rename from tests/cputestdata/x86_64-baseline-4-result.xml rename to tests/cputestdata/x86_64-baseline-features-result.xml diff --git a/tests/cputestdata/x86_64-baseline-4.xml b/tests/cputestdata/x8= 6_64-baseline-features.xml similarity index 100% rename from tests/cputestdata/x86_64-baseline-4.xml rename to tests/cputestdata/x86_64-baseline-features.xml diff --git a/tests/cputestdata/x86_64-baseline-3-expanded.xml b/tests/cpute= stdata/x86_64-baseline-simple-expanded.xml similarity index 100% rename from tests/cputestdata/x86_64-baseline-3-expanded.xml rename to tests/cputestdata/x86_64-baseline-simple-expanded.xml diff --git a/tests/cputestdata/x86_64-baseline-3-result.xml b/tests/cputest= data/x86_64-baseline-simple-result.xml similarity index 100% rename from tests/cputestdata/x86_64-baseline-3-result.xml rename to tests/cputestdata/x86_64-baseline-simple-result.xml diff --git a/tests/cputestdata/x86_64-baseline-3.xml b/tests/cputestdata/x8= 6_64-baseline-simple.xml similarity index 100% rename from tests/cputestdata/x86_64-baseline-3.xml rename to tests/cputestdata/x86_64-baseline-simple.xml --=20 2.35.1 From nobody Wed Apr 24 00:28:27 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 170.10.129.124 as permitted sender) client-ip=170.10.129.124; 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bh=Ly5u1ATj3rko2PjdL14QAlV21vbzqnegbcHyrFAiciE=; b=eIP9EsJGs/zq3oailA1jy7xvIPb5r9JvdreLTnBanr60G2Y3fl4RPdwEkkI9p0ceXswP4E BfC2JU5be+6w67i5pDbW0bsXARZX34tmMwS04637AagnMxP+Dip3dmNW0vJwQ6Nb68Ef5H 4CdC9yHV8UrwNhTBqlMt6Xhe9pzkSDo= X-MC-Unique: X_k5AIByNRSyTBKCBb4sFw-1 X-Original-To: libvir-list@listman.corp.redhat.com From: Jiri Denemark To: libvir-list@redhat.com Subject: [libvirt PATCH 4/8] cputest: Add some real world baseline tests Date: Wed, 4 May 2022 18:54:17 +0200 Message-Id: <1192e3c5197cb0a1b67a0f23c53fc74c1375be17.1651683161.git.jdenemar@redhat.com> In-Reply-To: References: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.11.54.1 X-BeenThere: libvir-list@redhat.com X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development discussions about the libvirt library & tools List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libvir-list-bounces@redhat.com Sender: "libvir-list" X-Scanned-By: MIMEDefang 2.85 on 10.11.54.8 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=libvir-list-bounces@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1651683306976100012 Content-Type: text/plain; charset="utf-8" Signed-off-by: Jiri Denemark Reviewed-by: Michal Privoznik --- tests/cputest.c | 118 +++++++++++++++--- ...id-baseline-Broadwell-IBRS+Cascadelake.xml | 11 ++ ..._64-cpuid-baseline-Cascadelake+Icelake.xml | 14 +++ ...puid-baseline-Cascadelake+Skylake-IBRS.xml | 12 ++ ..._64-cpuid-baseline-Cascadelake+Skylake.xml | 8 ++ ...-cpuid-baseline-Cooperlake+Cascadelake.xml | 17 +++ ...6_64-cpuid-baseline-Cooperlake+Icelake.xml | 14 +++ .../x86_64-cpuid-baseline-EPYC+Rome.xml | 13 ++ .../x86_64-cpuid-baseline-Haswell+Skylake.xml | 14 +++ ...-baseline-Haswell-noTSX-IBRS+Broadwell.xml | 14 +++ ...seline-Haswell-noTSX-IBRS+Skylake-IBRS.xml | 14 +++ ...id-baseline-Haswell-noTSX-IBRS+Skylake.xml | 14 +++ .../x86_64-cpuid-baseline-Ryzen+Rome.xml | 13 ++ ...4-cpuid-baseline-Skylake-Client+Server.xml | 9 ++ 14 files changed, 271 insertions(+), 14 deletions(-) create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Broadwell-IBRS+= Cascadelake.xml create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Ice= lake.xml create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Sky= lake-IBRS.xml create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Sky= lake.xml create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Casc= adelake.xml create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Icel= ake.xml create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-EPYC+Rome.xml create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Haswell+Skylake= .xml create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-I= BRS+Broadwell.xml create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-I= BRS+Skylake-IBRS.xml create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-I= BRS+Skylake.xml create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Ryzen+Rome.xml create mode 100644 tests/cputestdata/x86_64-cpuid-baseline-Skylake-Client+= Server.xml diff --git a/tests/cputest.c b/tests/cputest.c index 305002bdbc..ddf05b779b 100644 --- a/tests/cputest.c +++ b/tests/cputest.c @@ -58,6 +58,8 @@ struct data { const char *name; virDomainCapsCPUModels *models; const char *modelsName; + const char **cpus; + int ncpus; unsigned int flags; int result; }; @@ -560,6 +562,60 @@ cpuTestCPUID(bool guest, const void *arg) } =20 =20 +static int +cpuTestCPUIDBaseline(const void *arg) +{ + const struct data *data =3D arg; + int ret =3D -1; + virCPUDef **cpus =3D NULL; + virCPUDef *baseline =3D NULL; + g_autofree char *result =3D NULL; + size_t i; + + cpus =3D g_new0(virCPUDef *, data->ncpus); + for (i =3D 0; i < data->ncpus; i++) { + g_autofree char *name =3D NULL; + + name =3D g_strdup_printf("cpuid-%s-json", data->cpus[i]); + if (!(cpus[i] =3D cpuTestLoadXML(data->arch, name))) + goto cleanup; + } + + baseline =3D virCPUBaseline(data->arch, cpus, data->ncpus, NULL, NULL,= false); + if (!baseline) + goto cleanup; + + result =3D g_strdup_printf("cpuid-baseline-%s", data->name); + + if (cpuTestCompareXML(data->arch, baseline, result) < 0) + goto cleanup; + + for (i =3D 0; i < data->ncpus; i++) { + virCPUCompareResult cmp; + + cmp =3D virCPUCompare(data->arch, cpus[i], baseline, false); + if (cmp !=3D VIR_CPU_COMPARE_SUPERSET && + cmp !=3D VIR_CPU_COMPARE_IDENTICAL) { + VIR_TEST_VERBOSE("\nbaseline CPU is incompatible with CPU %zu"= , i); + VIR_TEST_VERBOSE("%74s", "... "); + ret =3D -1; + goto cleanup; + } + } + + ret =3D 0; + + cleanup: + if (cpus) { + for (i =3D 0; i < data->ncpus; i++) + virCPUDefFree(cpus[i]); + VIR_FREE(cpus); + } + virCPUDefFree(baseline); + return ret; +} + + static int cpuTestHostCPUID(const void *arg) { @@ -887,13 +943,13 @@ mymain(void) goto cleanup; } =20 -#define DO_TEST(arch, api, name, host, cpu, \ +#define DO_TEST(arch, api, name, host, cpu, cpus, ncpus, \ models, flags, result) \ do { \ struct data data =3D { \ arch, host, cpu, models, \ models =3D=3D NULL ? NULL : #models, \ - flags, result \ + cpus, ncpus, flags, result \ }; \ g_autofree char *testLabel =3D NULL; \ \ @@ -906,12 +962,12 @@ mymain(void) #define DO_TEST_COMPARE(arch, host, cpu, result) \ DO_TEST(arch, cpuTestCompare, \ host "/" cpu " (" #result ")", \ - host, cpu, NULL, 0, result) + host, cpu, NULL, 0, NULL, 0, result) =20 #define DO_TEST_UPDATE_ONLY(arch, host, cpu) \ DO_TEST(arch, cpuTestUpdate, \ cpu " on " host, \ - host, cpu, NULL, 0, 0) + host, cpu, NULL, 0, NULL, 0, 0) =20 #define DO_TEST_UPDATE(arch, host, cpu, result) \ do { \ @@ -929,31 +985,31 @@ mymain(void) suffix =3D " (migratable)"; \ label =3D g_strdup_printf("%s%s", name, suffix); \ DO_TEST(arch, cpuTestBaseline, label, NULL, \ - "baseline-" name, NULL, flags, result); \ + "baseline-" name, NULL, 0, NULL, flags, result); \ } while (0) =20 #define DO_TEST_HASFEATURE(arch, host, feature, result) \ DO_TEST(arch, cpuTestHasFeature, \ host "/" feature " (" #result ")", \ - host, feature, NULL, 0, result) + host, feature, NULL, 0, NULL, 0, result) =20 #define DO_TEST_GUESTCPU(arch, host, cpu, models, result) \ DO_TEST(arch, cpuTestGuestCPU, \ host "/" cpu " (" #models ")", \ - host, cpu, models, 0, result) + host, cpu, NULL, 0, models, 0, result) =20 #if WITH_QEMU # define DO_TEST_JSON(arch, host, json) \ do { \ if (json =3D=3D JSON_MODELS) { \ DO_TEST(arch, cpuTestGuestCPUID, host, host, \ - NULL, NULL, 0, 0); \ + NULL, NULL, 0, NULL, 0, 0); \ } \ if (json !=3D JSON_NONE) { \ DO_TEST(arch, cpuTestJSONCPUID, host, host, \ - NULL, NULL, json, 0); \ + NULL, NULL, 0, NULL, json, 0); \ DO_TEST(arch, cpuTestJSONSignature, host, host, \ - NULL, NULL, 0, 0); \ + NULL, NULL, 0, NULL, 0, 0); \ } \ } while (0) #else @@ -963,18 +1019,26 @@ mymain(void) #define DO_TEST_CPUID(arch, host, json) \ do { \ DO_TEST(arch, cpuTestHostCPUID, host, host, \ - NULL, NULL, 0, 0); \ + NULL, NULL, 0, NULL, 0, 0); \ DO_TEST(arch, cpuTestGuestCPUID, host, host, \ - NULL, NULL, json, 0); \ + NULL, NULL, 0, NULL, json, 0); \ DO_TEST(arch, cpuTestCPUIDSignature, host, host, \ - NULL, NULL, 0, 0); \ + NULL, NULL, 0, NULL, 0, 0); \ DO_TEST_JSON(arch, host, json); \ if (json !=3D JSON_NONE) { \ DO_TEST(arch, cpuTestUpdateLive, host, host, \ - NULL, NULL, json, 0); \ + NULL, NULL, 0, NULL, json, 0); \ } \ } while (0) =20 +#define DO_TEST_CPUID_BASELINE(arch, label, cpu1, cpu2) \ + do { \ + const char *cpus[] =3D {cpu1, cpu2}; \ + DO_TEST(arch, cpuTestCPUIDBaseline, \ + label " (" cpu1 ", " cpu2 ")", \ + NULL, label, cpus, 2, NULL, 0, 0); \ + } while (0) + /* host to host comparison */ DO_TEST_COMPARE(VIR_ARCH_X86_64, "host", "host", VIR_CPU_COMPARE_IDENT= ICAL); DO_TEST_COMPARE(VIR_ARCH_X86_64, "host", "host-better", VIR_CPU_COMPAR= E_INCOMPATIBLE); @@ -1156,6 +1220,32 @@ mymain(void) DO_TEST_CPUID(VIR_ARCH_X86_64, "Ice-Lake-Server", JSON_MODELS); DO_TEST_CPUID(VIR_ARCH_X86_64, "Cooperlake", JSON_MODELS); =20 + DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "Ryzen+Rome", + "Ryzen-7-1800X-Eight-Core", "Ryzen-9-3900X-12-C= ore"); + DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "EPYC+Rome", + "EPYC-7601-32-Core", "EPYC-7502-32-Core"); + DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "Haswell-noTSX-IBRS+Skylake", + "Xeon-E5-2609-v3", "Xeon-Gold-6148"); + DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "Haswell-noTSX-IBRS+Skylake-IB= RS", + "Xeon-E5-2609-v3", "Xeon-Gold-6130"); + DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "Broadwell-IBRS+Cascadelake", + "Xeon-E5-2623-v4", "Xeon-Platinum-8268"); + DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "Cascadelake+Skylake-IBRS", + "Xeon-Platinum-8268", "Xeon-Gold-6130"); + DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "Cascadelake+Skylake", + "Xeon-Platinum-9242", "Xeon-Gold-6148"); + DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "Cascadelake+Icelake", + "Xeon-Platinum-9242", "Ice-Lake-Server"); + DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "Cooperlake+Icelake", + "Cooperlake", "Ice-Lake-Server"); + DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "Cooperlake+Cascadelake", + "Cooperlake", "Xeon-Platinum-9242"); + DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "Skylake-Client+Server", + "Core-i5-6600", "Xeon-Gold-6148"); + DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "Haswell-noTSX-IBRS+Broadwell", + "Xeon-E5-2609-v3", "Xeon-E5-2650-v4"); + DO_TEST_CPUID_BASELINE(VIR_ARCH_X86_64, "Haswell+Skylake", + "Xeon-E7-8890-v3", "Xeon-Gold-5115"); cleanup: #if WITH_QEMU qemuTestDriverFree(&driver); diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Broadwell-IBRS+Cascade= lake.xml b/tests/cputestdata/x86_64-cpuid-baseline-Broadwell-IBRS+Cascadela= ke.xml new file mode 100644 index 0000000000..4e3f253e9b --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-baseline-Broadwell-IBRS+Cascadelake.xml @@ -0,0 +1,11 @@ + + Skylake-Client-IBRS + Intel + + + + + + + + diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Icelake.xm= l b/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Icelake.xml new file mode 100644 index 0000000000..e372a3e446 --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Icelake.xml @@ -0,0 +1,14 @@ + + Cooperlake + Intel + + + + + + + + + + + diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Skylake-IB= RS.xml b/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Skylake-IBRS.x= ml new file mode 100644 index 0000000000..e559e01583 --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Skylake-IBRS.xml @@ -0,0 +1,12 @@ + + Cascadelake-Server + Intel + + + + + + + + + diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Skylake.xm= l b/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Skylake.xml new file mode 100644 index 0000000000..906259df0b --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Skylake.xml @@ -0,0 +1,8 @@ + + Skylake-Server + Intel + + + + + diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Cascadelake= .xml b/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Cascadelake.xml new file mode 100644 index 0000000000..46c32c996f --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Cascadelake.xml @@ -0,0 +1,17 @@ + + Cooperlake + Intel + + + + + + + + + + + + + + diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Icelake.xml= b/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Icelake.xml new file mode 100644 index 0000000000..e372a3e446 --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Icelake.xml @@ -0,0 +1,14 @@ + + Cooperlake + Intel + + + + + + + + + + + diff --git a/tests/cputestdata/x86_64-cpuid-baseline-EPYC+Rome.xml b/tests/= cputestdata/x86_64-cpuid-baseline-EPYC+Rome.xml new file mode 100644 index 0000000000..e1984b2890 --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-baseline-EPYC+Rome.xml @@ -0,0 +1,13 @@ + + EPYC + AMD + + + + + + + + + + diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Haswell+Skylake.xml b/= tests/cputestdata/x86_64-cpuid-baseline-Haswell+Skylake.xml new file mode 100644 index 0000000000..e687a679b3 --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-baseline-Haswell+Skylake.xml @@ -0,0 +1,14 @@ + + Haswell + Intel + + + + + + + + + + + diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Bro= adwell.xml b/tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Bro= adwell.xml new file mode 100644 index 0000000000..651457b17a --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Broadwell.= xml @@ -0,0 +1,14 @@ + + Haswell-noTSX + Intel + + + + + + + + + + + diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Sky= lake-IBRS.xml b/tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-IBRS+= Skylake-IBRS.xml new file mode 100644 index 0000000000..8bda1c02e2 --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Skylake-IB= RS.xml @@ -0,0 +1,14 @@ + + Haswell-noTSX-IBRS + Intel + + + + + + + + + + + diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Sky= lake.xml b/tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Skyla= ke.xml new file mode 100644 index 0000000000..651457b17a --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-baseline-Haswell-noTSX-IBRS+Skylake.xml @@ -0,0 +1,14 @@ + + Haswell-noTSX + Intel + + + + + + + + + + + diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Ryzen+Rome.xml b/tests= /cputestdata/x86_64-cpuid-baseline-Ryzen+Rome.xml new file mode 100644 index 0000000000..051402b9d5 --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-baseline-Ryzen+Rome.xml @@ -0,0 +1,13 @@ + + EPYC + AMD + + + + + + + + + + diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Skylake-Client+Server.= xml b/tests/cputestdata/x86_64-cpuid-baseline-Skylake-Client+Server.xml new file mode 100644 index 0000000000..d46ff26eeb --- /dev/null +++ b/tests/cputestdata/x86_64-cpuid-baseline-Skylake-Client+Server.xml @@ -0,0 +1,9 @@ + + Skylake-Client + Intel + + + + + + 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b=CN0KJoarztYrRgPGLhWlV3oWZ1t2jOI6IihtizfM8zSwL1WBKpkWf91jgNowObx42O/lEs ksYaB4vk7Y9ZRwvYqycCqIK9knpPw+sMCt0nSUVCDjSG5BmH2zMaV/uTbdF79qsZzRLKHi y2879pbIRGss8DkKht86MVXqS67hkK4= X-MC-Unique: OC--oHPuOv-rn_MMg5-Y_w-1 X-Original-To: libvir-list@listman.corp.redhat.com From: Jiri Denemark To: libvir-list@redhat.com Subject: [libvirt PATCH 5/8] cpu_x86: Consolidate signature match in x86DecodeUseCandidate Date: Wed, 4 May 2022 18:54:18 +0200 Message-Id: In-Reply-To: References: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.11.54.5 X-BeenThere: libvir-list@redhat.com X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development discussions about the libvirt library & tools List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libvir-list-bounces@redhat.com Sender: "libvir-list" X-Scanned-By: MIMEDefang 2.85 on 10.11.54.8 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=libvir-list-bounces@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1651683308956100017 Content-Type: text/plain; charset="utf-8" Checking the signature in two different places makes no sense since the code in between can only mark the candidate as the best option so far, which is what the second signature match does as well. Signed-off-by: Jiri Denemark Reviewed-by: Michal Privoznik --- src/cpu/cpu_x86.c | 31 ++++++++++++++----------------- 1 file changed, 14 insertions(+), 17 deletions(-) diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c index a5eac7601c..80019ebd70 100644 --- a/src/cpu/cpu_x86.c +++ b/src/cpu/cpu_x86.c @@ -2006,15 +2006,22 @@ x86DecodeUseCandidate(virCPUx86Model *current, } =20 /* Ideally we want to select a model with family/model equal to - * family/model of the real CPU. Once we found such model, we only + * family/model of the real CPU and once we found such model, we only * consider candidates with matching family/model. */ - if (signature && - virCPUx86SignaturesMatch(current->signatures, signature) && - !virCPUx86SignaturesMatch(candidate->signatures, signature)) { - VIR_DEBUG("%s differs in signature from matching %s", - cpuCandidate->model, cpuCurrent->model); - return 0; + if (signature) { + if (virCPUx86SignaturesMatch(current->signatures, signature) && + !virCPUx86SignaturesMatch(candidate->signatures, signature)) { + VIR_DEBUG("%s differs in signature from matching %s", + cpuCandidate->model, cpuCurrent->model); + return 0; + } + + if (!virCPUx86SignaturesMatch(current->signatures, signature) && + virCPUx86SignaturesMatch(candidate->signatures, signature)) { + VIR_DEBUG("%s provides matching signature", cpuCandidate->mode= l); + return 1; + } } =20 if (cpuCurrent->nfeatures > cpuCandidate->nfeatures) { @@ -2023,16 +2030,6 @@ x86DecodeUseCandidate(virCPUx86Model *current, return 1; } =20 - /* Prefer a candidate with matching signature even though it would - * result in longer list of features. - */ - if (signature && - virCPUx86SignaturesMatch(candidate->signatures, signature) && - !virCPUx86SignaturesMatch(current->signatures, signature)) { - VIR_DEBUG("%s provides matching signature", cpuCandidate->model); - return 1; - } - VIR_DEBUG("%s does not result in shorter feature list than %s", cpuCandidate->model, cpuCurrent->model); return 0; --=20 2.35.1 From nobody Wed Apr 24 00:28:27 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 170.10.129.124 as permitted sender) client-ip=170.10.129.124; envelope-from=libvir-list-bounces@redhat.com; helo=us-smtp-delivery-124.mimecast.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 170.10.129.124 as permitted sender) smtp.mailfrom=libvir-list-bounces@redhat.com; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; 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Wed, 4 May 2022 16:54:48 +0000 (UTC) Received: by smtp.corp.redhat.com (Postfix) id 37CC141617E; Wed, 4 May 2022 16:54:48 +0000 (UTC) Received: from rein.int.mamuti.net (unknown [10.40.195.120]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 175F541373D for ; Wed, 4 May 2022 16:54:48 +0000 (UTC) Received: by rein.int.mamuti.net (Postfix, from userid 500) id 1C41218967E; Wed, 4 May 2022 18:54:24 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1651683300; h=from:from:sender:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:list-id:list-help: list-unsubscribe:list-subscribe:list-post; bh=dF49qtevCamerRjexOmW1NNLfxnFIMQ2Tqqwi5mKgy8=; b=bkeYh/ze1qNuNzvmSq8PA/IF2JYJsxDxfQ5xL8pVQ25xzfxmo+j+gNMnLEOQCO+TRFweGy WgwEHATYdz1i9JxX9Wv7KaMCFGnNRcZyx7f6OI6XtizpeEaYhBNrSIYoC/zyMddGPslyps w8UXw4j/eVolin2MdimSg1pXTMDwhig= X-MC-Unique: sbiPEF4eO3mSMijYkK6_kQ-1 X-Original-To: libvir-list@listman.corp.redhat.com From: Jiri Denemark To: libvir-list@redhat.com Subject: [libvirt PATCH 6/8] cpu_x86: Refactor feature list comparison in x86DecodeUseCandidate Date: Wed, 4 May 2022 18:54:19 +0200 Message-Id: <856527fc2294f70fb1f2de50e94948848c657476.1651683161.git.jdenemar@redhat.com> In-Reply-To: References: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.85 on 10.11.54.10 X-BeenThere: libvir-list@redhat.com X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development discussions about the libvirt library & tools List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libvir-list-bounces@redhat.com Sender: "libvir-list" X-Scanned-By: MIMEDefang 2.85 on 10.11.54.10 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=libvir-list-bounces@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1651683302918100002 Content-Type: text/plain; charset="utf-8" It will become more complicated and so it deserves to be separated into a new function. Signed-off-by: Jiri Denemark Reviewed-by: Michal Privoznik --- src/cpu/cpu_x86.c | 31 ++++++++++++++++++++++--------- 1 file changed, 22 insertions(+), 9 deletions(-) diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c index 80019ebd70..fdee107ce9 100644 --- a/src/cpu/cpu_x86.c +++ b/src/cpu/cpu_x86.c @@ -1956,6 +1956,27 @@ virCPUx86Compare(virCPUDef *host, } =20 =20 +static int +virCPUx86CompareCandidateFeatureList(virCPUDef *cpuCurrent, + virCPUDef *cpuCandidate) +{ + size_t current =3D cpuCurrent->nfeatures; + size_t candidate =3D cpuCandidate->nfeatures; + + if (candidate < current) { + VIR_DEBUG("%s is better than %s: %zu < %zu", + cpuCandidate->model, cpuCurrent->model, + candidate, current); + return 1; + } + + VIR_DEBUG("%s is not better than %s: %zu >=3D %zu", + cpuCandidate->model, cpuCurrent->model, + candidate, current); + return 0; +} + + /* * Checks whether a candidate model is a better fit for the CPU data than = the * current model. @@ -2024,15 +2045,7 @@ x86DecodeUseCandidate(virCPUx86Model *current, } } =20 - if (cpuCurrent->nfeatures > cpuCandidate->nfeatures) { - VIR_DEBUG("%s results in shorter feature list than %s", - cpuCandidate->model, cpuCurrent->model); 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Wed, 4 May 2022 16:54:48 +0000 (UTC) Received: from rein.int.mamuti.net (unknown [10.40.195.120]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 3406CC28114 for ; Wed, 4 May 2022 16:54:48 +0000 (UTC) Received: by rein.int.mamuti.net (Postfix, from userid 500) id 1F2EE18967F; Wed, 4 May 2022 18:54:24 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1651683303; h=from:from:sender:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:list-id:list-help: list-unsubscribe:list-subscribe:list-post; bh=6/yNgWBkG6lGKbMzWzdc2PMzrLUTGmfpNxYVuFmBljo=; b=Y3sRlI97wjmuUgcSJ9E/DC49Ibbsy73rnHtxT473MzrJRiXeIF+G7v1iiC9Vu538erFo3U d5uht54elgBYZoPffGGZKfGnwmlJHsc7RUanIc3/MQhKFBfte65pxzkgUrm6moXzxRtK7K ZEe6kft5lPRJ0XQzwYmidEpvOSNWYMU= X-MC-Unique: pKLksyfiPBS7IOjSY2dNdw-1 X-Original-To: libvir-list@listman.corp.redhat.com From: Jiri Denemark To: libvir-list@redhat.com Subject: [libvirt PATCH 7/8] cpu_x86: Penalize disabled features when computing CPU model Date: Wed, 4 May 2022 18:54:20 +0200 Message-Id: In-Reply-To: References: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.85 on 10.11.54.8 X-BeenThere: libvir-list@redhat.com X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development discussions about the libvirt library & tools List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libvir-list-bounces@redhat.com Sender: "libvir-list" X-Scanned-By: MIMEDefang 2.85 on 10.11.54.9 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=libvir-list-bounces@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1651683307006100013 Content-Type: text/plain; charset="utf-8" For finding the best matching CPU model for a given set of features while we don't know the CPU signature (i.e., when computing a baseline CPU model) we've been using a "shortest list of features" heuristics. This works well if new CPU models are supersets of older models, but that's not always the case. As a result it may actually select a new CPU model as a baseline while removing some features from it to make it compatible with older models. This is in general worse than using an old CPU model with a bunch of added features as a guest OS or apps may crash when using features that were disabled. On the other hand we don't want to end up with a very old model which would guarantee no disabled features as it could stop a guest OS or apps from using some features provided by the CPU because they would not expect them on such an old CPU. This patch changes the heuristics to something in between. Enabled and disabled features are counted separately so that a CPU model requiring some features to be disabled looks worse than a model with fewer disabled features even if its complete list of features is longer. The penalty given for each additional disabled feature gets bigger to make longer list of disabled features look even worse. https://bugzilla.redhat.com/show_bug.cgi?id=3D1851227 Signed-off-by: Jiri Denemark Reviewed-by: Michal Privoznik --- src/cpu/cpu_x86.c | 44 ++++++++++++++++--- .../x86_64-cpuid-Atom-D510-guest.xml | 5 ++- .../x86_64-cpuid-Atom-N450-guest.xml | 5 ++- .../x86_64-cpuid-Phenom-B95-json.xml | 21 +++++---- ...id-baseline-Broadwell-IBRS+Cascadelake.xml | 11 +++-- ..._64-cpuid-baseline-Cascadelake+Icelake.xml | 13 +++--- ...puid-baseline-Cascadelake+Skylake-IBRS.xml | 5 ++- ...6_64-cpuid-baseline-Cooperlake+Icelake.xml | 13 +++--- .../x86_64-host+guest,models-result.xml | 10 +++-- .../domaincapsdata/qemu_3.1.0-tcg.x86_64.xml | 35 +++++++++------ .../domaincapsdata/qemu_4.0.0-tcg.x86_64.xml | 36 ++++++++------- .../domaincapsdata/qemu_4.1.0-tcg.x86_64.xml | 37 +++++++++------- .../domaincapsdata/qemu_4.2.0-tcg.x86_64.xml | 37 +++++++++------- .../domaincapsdata/qemu_5.0.0-tcg.x86_64.xml | 36 +++++++++------ .../domaincapsdata/qemu_5.1.0-tcg.x86_64.xml | 36 +++++++++------ .../domaincapsdata/qemu_5.2.0-tcg.x86_64.xml | 36 +++++++++------ .../domaincapsdata/qemu_6.0.0-tcg.x86_64.xml | 36 +++++++++------ .../domaincapsdata/qemu_6.1.0-tcg.x86_64.xml | 36 +++++++++------ .../domaincapsdata/qemu_6.2.0-tcg.x86_64.xml | 36 +++++++++------ .../domaincapsdata/qemu_7.0.0-tcg.x86_64.xml | 36 +++++++++------ tests/qemuxml2argvdata/cpu-fallback.args | 2 +- .../cpu-host-model-cmt.x86_64-4.0.0.args | 2 +- .../cpu-host-model-fallback.args | 2 +- 23 files changed, 330 insertions(+), 200 deletions(-) diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c index fdee107ce9..3001fc2b8f 100644 --- a/src/cpu/cpu_x86.c +++ b/src/cpu/cpu_x86.c @@ -1956,23 +1956,57 @@ virCPUx86Compare(virCPUDef *host, } =20 =20 +/* Base penalty for disabled features. */ +#define BASE_PENALTY 2 + static int virCPUx86CompareCandidateFeatureList(virCPUDef *cpuCurrent, virCPUDef *cpuCandidate) { size_t current =3D cpuCurrent->nfeatures; + size_t enabledCurrent =3D current; + size_t disabledCurrent =3D 0; size_t candidate =3D cpuCandidate->nfeatures; + size_t enabled =3D candidate; + size_t disabled =3D 0; + + if (cpuCandidate->type !=3D VIR_CPU_TYPE_HOST) { + size_t i; + int penalty =3D BASE_PENALTY; + + for (i =3D 0; i < enabledCurrent; i++) { + if (cpuCurrent->features[i].policy =3D=3D VIR_CPU_FEATURE_DISA= BLE) { + enabledCurrent--; + disabledCurrent +=3D penalty; + penalty++; + } + } + current =3D enabledCurrent + disabledCurrent; + + penalty =3D BASE_PENALTY; + for (i =3D 0; i < enabled; i++) { + if (cpuCandidate->features[i].policy =3D=3D VIR_CPU_FEATURE_DI= SABLE) { + enabled--; + disabled +=3D penalty; + penalty++; + } + } + candidate =3D enabled + disabled; + } =20 - if (candidate < current) { - VIR_DEBUG("%s is better than %s: %zu < %zu", + if (candidate < current || + (candidate =3D=3D current && disabled < disabledCurrent)) { + VIR_DEBUG("%s is better than %s: %zu (%zu, %zu) < %zu (%zu, %zu)", cpuCandidate->model, cpuCurrent->model, - candidate, current); + candidate, enabled, disabled, + current, enabledCurrent, disabledCurrent); return 1; } =20 - VIR_DEBUG("%s is not better than %s: %zu >=3D %zu", + VIR_DEBUG("%s is not better than %s: %zu (%zu, %zu) >=3D %zu (%zu, %zu= )", cpuCandidate->model, cpuCurrent->model, - candidate, current); + candidate, enabled, disabled, + current, enabledCurrent, disabledCurrent); return 0; } =20 diff --git a/tests/cputestdata/x86_64-cpuid-Atom-D510-guest.xml b/tests/cpu= testdata/x86_64-cpuid-Atom-D510-guest.xml index caa0bfd53b..d2f7a79074 100644 --- a/tests/cputestdata/x86_64-cpuid-Atom-D510-guest.xml +++ b/tests/cputestdata/x86_64-cpuid-Atom-D510-guest.xml @@ -1,6 +1,7 @@ - core2duo + n270 Intel + @@ -14,6 +15,6 @@ + - diff --git a/tests/cputestdata/x86_64-cpuid-Atom-N450-guest.xml b/tests/cpu= testdata/x86_64-cpuid-Atom-N450-guest.xml index e8f5c93881..779faf6cef 100644 --- a/tests/cputestdata/x86_64-cpuid-Atom-N450-guest.xml +++ b/tests/cputestdata/x86_64-cpuid-Atom-N450-guest.xml @@ -1,5 +1,5 @@ - core2duo + n270 Intel @@ -15,6 +15,7 @@ + + - diff --git a/tests/cputestdata/x86_64-cpuid-Phenom-B95-json.xml b/tests/cpu= testdata/x86_64-cpuid-Phenom-B95-json.xml index b4198f66a5..7f6289c6d7 100644 --- a/tests/cputestdata/x86_64-cpuid-Phenom-B95-json.xml +++ b/tests/cputestdata/x86_64-cpuid-Phenom-B95-json.xml @@ -1,22 +1,25 @@ - Opteron_G3 + athlon AMD - + + + + + - + - - + + + + + - - - - diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Broadwell-IBRS+Cascade= lake.xml b/tests/cputestdata/x86_64-cpuid-baseline-Broadwell-IBRS+Cascadela= ke.xml index 4e3f253e9b..99bce8db87 100644 --- a/tests/cputestdata/x86_64-cpuid-baseline-Broadwell-IBRS+Cascadelake.xml +++ b/tests/cputestdata/x86_64-cpuid-baseline-Broadwell-IBRS+Cascadelake.xml @@ -1,11 +1,14 @@ - Skylake-Client-IBRS + Broadwell-IBRS Intel + + + + + - - - + diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Icelake.xm= l b/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Icelake.xml index e372a3e446..071c799ba2 100644 --- a/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Icelake.xml +++ b/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Icelake.xml @@ -1,14 +1,15 @@ - Cooperlake + Cascadelake-Server Intel - + + + - - - - + + + diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Skylake-IB= RS.xml b/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Skylake-IBRS.x= ml index e559e01583..5e42876b39 100644 --- a/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Skylake-IBRS.xml +++ b/tests/cputestdata/x86_64-cpuid-baseline-Cascadelake+Skylake-IBRS.xml @@ -1,12 +1,13 @@ - Cascadelake-Server + Skylake-Server-IBRS Intel + + - diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Icelake.xml= b/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Icelake.xml index e372a3e446..071c799ba2 100644 --- a/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Icelake.xml +++ b/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Icelake.xml @@ -1,14 +1,15 @@ - Cooperlake + Cascadelake-Server Intel - + + + - - - - + + + diff --git a/tests/cputestdata/x86_64-host+guest,models-result.xml b/tests/= cputestdata/x86_64-host+guest,models-result.xml index 0dd6955898..42664a48b4 100644 --- a/tests/cputestdata/x86_64-host+guest,models-result.xml +++ b/tests/cputestdata/x86_64-host+guest,models-result.xml @@ -1,17 +1,19 @@ - Nehalem + qemu64 + + - + - - + + diff --git a/tests/domaincapsdata/qemu_3.1.0-tcg.x86_64.xml b/tests/domainc= apsdata/qemu_3.1.0-tcg.x86_64.xml index 1a5bc25b99..2a65cb0ad9 100644 --- a/tests/domaincapsdata/qemu_3.1.0-tcg.x86_64.xml +++ b/tests/domaincapsdata/qemu_3.1.0-tcg.x86_64.xml @@ -36,35 +36,42 @@ - EPYC + Opteron_G3 AMD + + + + + + + + + + + + + + + + + + + + - - - - - - - - - - - - - qemu64 diff --git a/tests/domaincapsdata/qemu_4.0.0-tcg.x86_64.xml b/tests/domainc= apsdata/qemu_4.0.0-tcg.x86_64.xml index e744ac27ac..a4dc7bafc9 100644 --- a/tests/domaincapsdata/qemu_4.0.0-tcg.x86_64.xml +++ b/tests/domaincapsdata/qemu_4.0.0-tcg.x86_64.xml @@ -36,36 +36,42 @@ - EPYC + Opteron_G3 AMD + + + + + + + + + + + + + + + + + + + + - - - - - - - - - - - - - - qemu64 diff --git a/tests/domaincapsdata/qemu_4.1.0-tcg.x86_64.xml b/tests/domainc= apsdata/qemu_4.1.0-tcg.x86_64.xml index 80b1ce8ef9..b20c02cb68 100644 --- a/tests/domaincapsdata/qemu_4.1.0-tcg.x86_64.xml +++ b/tests/domaincapsdata/qemu_4.1.0-tcg.x86_64.xml @@ -36,36 +36,43 @@ - EPYC-IBPB + Opteron_G3 AMD + + + + + + + + + + + + + + + + + + + + + - - - - - - - - - - - - - - qemu64 diff --git a/tests/domaincapsdata/qemu_4.2.0-tcg.x86_64.xml b/tests/domainc= apsdata/qemu_4.2.0-tcg.x86_64.xml index 91b3ed6f80..d0ee3f7b7a 100644 --- a/tests/domaincapsdata/qemu_4.2.0-tcg.x86_64.xml +++ b/tests/domaincapsdata/qemu_4.2.0-tcg.x86_64.xml @@ -36,36 +36,43 @@ - EPYC-IBPB + Opteron_G3 AMD + + + + + + + + + + + + + + + + + + + + + - - - - - - - - - - - - - - qemu64 diff --git a/tests/domaincapsdata/qemu_5.0.0-tcg.x86_64.xml b/tests/domainc= apsdata/qemu_5.0.0-tcg.x86_64.xml index b8737613e9..d277c96426 100644 --- a/tests/domaincapsdata/qemu_5.0.0-tcg.x86_64.xml +++ b/tests/domaincapsdata/qemu_5.0.0-tcg.x86_64.xml @@ -36,35 +36,43 @@ - EPYC + Opteron_G3 AMD + + + + + + + + + + + + + + + + + + + + + - - - - - - - - - - - - - qemu64 diff --git a/tests/domaincapsdata/qemu_5.1.0-tcg.x86_64.xml b/tests/domainc= apsdata/qemu_5.1.0-tcg.x86_64.xml index 034036ca96..4f1ffbb2ba 100644 --- a/tests/domaincapsdata/qemu_5.1.0-tcg.x86_64.xml +++ b/tests/domaincapsdata/qemu_5.1.0-tcg.x86_64.xml @@ -36,35 +36,43 @@ - EPYC + Opteron_G3 AMD + + + + + + + + + + + + + + + + + + + + + - - - - - - - - - - - - - qemu64 diff --git a/tests/domaincapsdata/qemu_5.2.0-tcg.x86_64.xml b/tests/domainc= apsdata/qemu_5.2.0-tcg.x86_64.xml index d3a4b01234..6cff0f815e 100644 --- a/tests/domaincapsdata/qemu_5.2.0-tcg.x86_64.xml +++ b/tests/domaincapsdata/qemu_5.2.0-tcg.x86_64.xml @@ -36,35 +36,43 @@ - EPYC + Opteron_G3 AMD + + + + + + + + + + + + + + + + + + + + + - - - - - - - - - - - - - qemu64 diff --git a/tests/domaincapsdata/qemu_6.0.0-tcg.x86_64.xml b/tests/domainc= apsdata/qemu_6.0.0-tcg.x86_64.xml index 6b85c9c45a..65f4459bcb 100644 --- a/tests/domaincapsdata/qemu_6.0.0-tcg.x86_64.xml +++ b/tests/domaincapsdata/qemu_6.0.0-tcg.x86_64.xml @@ -36,35 +36,43 @@ - EPYC + Opteron_G3 AMD + + + + + + + + + + + + + + + + + + + + + - - - - - - - - - - - - - qemu64 diff --git a/tests/domaincapsdata/qemu_6.1.0-tcg.x86_64.xml b/tests/domainc= apsdata/qemu_6.1.0-tcg.x86_64.xml index 2c761fc1af..40bc875e3c 100644 --- a/tests/domaincapsdata/qemu_6.1.0-tcg.x86_64.xml +++ b/tests/domaincapsdata/qemu_6.1.0-tcg.x86_64.xml @@ -36,35 +36,43 @@ - EPYC + Opteron_G3 AMD + + + + + + + + + + + + + + + + + + + + + - - - - - - - - - - - - - qemu64 diff --git a/tests/domaincapsdata/qemu_6.2.0-tcg.x86_64.xml b/tests/domainc= apsdata/qemu_6.2.0-tcg.x86_64.xml index 8db840faac..a439dda190 100644 --- a/tests/domaincapsdata/qemu_6.2.0-tcg.x86_64.xml +++ b/tests/domaincapsdata/qemu_6.2.0-tcg.x86_64.xml @@ -36,36 +36,44 @@ - EPYC + Opteron_G3 AMD + + + + + + + + + + + + + + + + + + + + + - - - - - - - - - - - - - qemu64 diff --git a/tests/domaincapsdata/qemu_7.0.0-tcg.x86_64.xml b/tests/domainc= apsdata/qemu_7.0.0-tcg.x86_64.xml index edd1259c64..9ed9123f7d 100644 --- a/tests/domaincapsdata/qemu_7.0.0-tcg.x86_64.xml +++ b/tests/domaincapsdata/qemu_7.0.0-tcg.x86_64.xml @@ -36,37 +36,45 @@ - EPYC + Opteron_G3 AMD + + + + + + + + + + + + + + + + + + + + + - - - - - - - - - - - - - qemu64 diff --git a/tests/qemuxml2argvdata/cpu-fallback.args b/tests/qemuxml2argvd= ata/cpu-fallback.args index a8fad07e5f..fb9a5e0b92 100644 --- a/tests/qemuxml2argvdata/cpu-fallback.args +++ b/tests/qemuxml2argvdata/cpu-fallback.args @@ -13,7 +13,7 @@ QEMU_AUDIO_DRV=3Dnone \ -object secret,id=3DmasterKey0,format=3Draw,file=3D/tmp/lib/domain--1-QEMU= Guest1/master-key.aes \ -machine pc,usb=3Doff,dump-guest-core=3Doff \ -accel kvm \ --cpu Penryn,sse4.1=3Doff,sse4.2=3Doff,popcnt=3Doff,aes=3Doff \ +-cpu Conroe,cx16=3Don,sse4.1=3Doff,sse4.2=3Doff,popcnt=3Doff,aes=3Doff \ -m 214 \ -overcommit mem-lock=3Doff \ -smp 6,sockets=3D6,cores=3D1,threads=3D1 \ diff --git a/tests/qemuxml2argvdata/cpu-host-model-cmt.x86_64-4.0.0.args b/= tests/qemuxml2argvdata/cpu-host-model-cmt.x86_64-4.0.0.args index 3ff226a289..0de09e1d88 100644 --- a/tests/qemuxml2argvdata/cpu-host-model-cmt.x86_64-4.0.0.args +++ b/tests/qemuxml2argvdata/cpu-host-model-cmt.x86_64-4.0.0.args @@ -13,7 +13,7 @@ QEMU_AUDIO_DRV=3Dnone \ -object secret,id=3DmasterKey0,format=3Draw,file=3D/tmp/lib/domain--1-QEMU= Guest1/master-key.aes \ -machine pc-i440fx-4.0,usb=3Doff,dump-guest-core=3Doff \ -accel tcg \ --cpu EPYC,acpi=3Don,ss=3Don,monitor=3Don,hypervisor=3Don,erms=3Don,mpx=3Do= n,pcommit=3Don,clwb=3Don,pku=3Don,la57=3Don,3dnowext=3Don,3dnow=3Don,npt=3D= on,vme=3Doff,fma=3Doff,avx=3Doff,f16c=3Doff,rdrand=3Doff,avx2=3Doff,rdseed= =3Doff,sha-ni=3Doff,xsavec=3Doff,fxsr-opt=3Doff,misalignsse=3Doff,3dnowpref= etch=3Doff,osvw=3Doff,topoext=3Doff,nrip-save=3Doff \ +-cpu Opteron_G3,acpi=3Don,ss=3Don,pclmulqdq=3Don,monitor=3Don,ssse3=3Don,s= se4.1=3Don,sse4.2=3Don,movbe=3Don,aes=3Don,xsave=3Don,hypervisor=3Don,arat= =3Don,fsgsbase=3Don,bmi1=3Don,smep=3Don,bmi2=3Don,erms=3Don,mpx=3Don,adx=3D= on,smap=3Don,pcommit=3Don,clflushopt=3Don,clwb=3Don,pku=3Don,la57=3Don,xsav= eopt=3Don,xgetbv1=3Don,mmxext=3Don,pdpe1gb=3Don,3dnowext=3Don,3dnow=3Don,cr= 8legacy=3Don,npt=3Don,misalignsse=3Doff \ -m 214 \ -overcommit mem-lock=3Doff \ -smp 6,sockets=3D6,cores=3D1,threads=3D1 \ diff --git a/tests/qemuxml2argvdata/cpu-host-model-fallback.args b/tests/qe= muxml2argvdata/cpu-host-model-fallback.args index 239f18b843..9a6c527b28 100644 --- a/tests/qemuxml2argvdata/cpu-host-model-fallback.args +++ b/tests/qemuxml2argvdata/cpu-host-model-fallback.args @@ -13,7 +13,7 @@ QEMU_AUDIO_DRV=3Dnone \ -object secret,id=3DmasterKey0,format=3Draw,file=3D/tmp/lib/domain--1-QEMU= Guest1/master-key.aes \ -machine pc,usb=3Doff,dump-guest-core=3Doff \ -accel tcg \ --cpu Penryn,vme=3Don,ds=3Don,acpi=3Don,ss=3Don,ht=3Don,tm=3Don,pbe=3Don,mo= nitor=3Don,ds-cpl=3Don,vmx=3Don,est=3Don,tm2=3Don,xtpr=3Don,sse4.1=3Doff,cx= 16=3Don,lahf-lm=3Don \ +-cpu Conroe,vme=3Don,ds=3Don,acpi=3Don,ss=3Don,ht=3Don,tm=3Don,pbe=3Don,mo= nitor=3Don,ds-cpl=3Don,vmx=3Don,est=3Don,tm2=3Don,cx16=3Don,xtpr=3Don,lahf-= lm=3Don \ -m 214 \ -overcommit mem-lock=3Doff \ -smp 6,sockets=3D6,cores=3D1,threads=3D1 \ --=20 2.35.1 From nobody Wed Apr 24 00:28:27 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 170.10.129.124 as permitted sender) client-ip=170.10.129.124; envelope-from=libvir-list-bounces@redhat.com; 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libvir-list@redhat.com Subject: [libvirt PATCH 8/8] cpu_x86: Ignore enabled features for input models in x86DecodeUseCandidate Date: Wed, 4 May 2022 18:54:21 +0200 Message-Id: <3b82ccc37838a8a3fc6df19df0dca1d45d85d60a.1651683161.git.jdenemar@redhat.com> In-Reply-To: References: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.85 on 10.11.54.8 X-BeenThere: libvir-list@redhat.com X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development discussions about the libvirt library & tools List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libvir-list-bounces@redhat.com Sender: "libvir-list" X-Scanned-By: MIMEDefang 2.84 on 10.11.54.1 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=libvir-list-bounces@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1651683304973100009 Content-Type: text/plain; charset="utf-8" While we don't want to aim for the shortest list of disabled features in the baseline result (it would select a very old model), we want to do so while looking at any of the input models for which we're trying to compute a baseline CPU model. Given a set of input models, we always want to take the least capable one of them (i.e., the one with shortest list of disabled features) or a better model which is not one of the input models. So when considering an input model, we just check whether its list of disabled features is shorter than the currently best one. When looking at other models we check both enabled and disabled features while penalizing disabled features as implemented by the previous patch. Signed-off-by: Jiri Denemark Reviewed-by: Michal Privoznik --- src/cpu/cpu_x86.c | 66 ++++++++++++------- ...4-baseline-Westmere+Nehalem-migratable.xml | 8 ++- ...86_64-baseline-Westmere+Nehalem-result.xml | 8 ++- ...-cpuid-baseline-Cooperlake+Cascadelake.xml | 13 ++-- 4 files changed, 64 insertions(+), 31 deletions(-) diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c index 3001fc2b8f..a4aca6055d 100644 --- a/src/cpu/cpu_x86.c +++ b/src/cpu/cpu_x86.c @@ -1961,7 +1961,8 @@ virCPUx86Compare(virCPUDef *host, =20 static int virCPUx86CompareCandidateFeatureList(virCPUDef *cpuCurrent, - virCPUDef *cpuCandidate) + virCPUDef *cpuCandidate, + bool isPreferred) { size_t current =3D cpuCurrent->nfeatures; size_t enabledCurrent =3D current; @@ -2003,6 +2004,14 @@ virCPUx86CompareCandidateFeatureList(virCPUDef *cpuC= urrent, return 1; } =20 + if (isPreferred && disabled < disabledCurrent) { + VIR_DEBUG("%s is in the list of preferred models and provides fewe= r " + "disabled features than %s: %zu < %zu", + cpuCandidate->model, cpuCurrent->model, + disabled, disabledCurrent); + return 1; + } + VIR_DEBUG("%s is not better than %s: %zu (%zu, %zu) >=3D %zu (%zu, %zu= )", cpuCandidate->model, cpuCurrent->model, candidate, enabled, disabled, @@ -2025,8 +2034,10 @@ x86DecodeUseCandidate(virCPUx86Model *current, virCPUx86Model *candidate, virCPUDef *cpuCandidate, uint32_t signature, - const char *preferred) + const char **preferred) { + bool isPreferred =3D false; + if (cpuCandidate->type =3D=3D VIR_CPU_TYPE_HOST && !candidate->decodeHost) { VIR_DEBUG("%s is not supposed to be used for host CPU definition", @@ -2050,9 +2061,13 @@ x86DecodeUseCandidate(virCPUx86Model *current, } } =20 - if (preferred && STREQ(cpuCandidate->model, preferred)) { - VIR_DEBUG("%s is the preferred model", cpuCandidate->model); - return 2; + if (preferred) { + isPreferred =3D g_strv_contains(preferred, cpuCandidate->model); + + if (isPreferred && !preferred[1]) { + VIR_DEBUG("%s is the preferred model", cpuCandidate->model); + return 2; + } } =20 if (!cpuCurrent) { @@ -2079,7 +2094,8 @@ x86DecodeUseCandidate(virCPUx86Model *current, } } =20 - return virCPUx86CompareCandidateFeatureList(cpuCurrent, cpuCandidate); + return virCPUx86CompareCandidateFeatureList(cpuCurrent, cpuCandidate, + isPreferred); } =20 =20 @@ -2122,7 +2138,7 @@ static int x86Decode(virCPUDef *cpu, const virCPUx86Data *cpuData, virDomainCapsCPUModels *models, - const char *preferred, + const char **preferred, bool migratable) { virCPUx86Map *map; @@ -2155,6 +2171,9 @@ x86Decode(virCPUDef *cpu, =20 x86DataFilterTSX(&data, vendor, map); =20 + if (preferred && !preferred[0]) + preferred =3D NULL; + /* Walk through the CPU models in reverse order to check newest * models first. */ @@ -2162,16 +2181,18 @@ x86Decode(virCPUDef *cpu, candidate =3D map->models[i]; if (models && !(hvModel =3D virDomainCapsCPUModelsGet(models, candidate->nam= e))) { - if (preferred && STREQ(candidate->name, preferred)) { + if (preferred && + !preferred[1] && + STREQ(candidate->name, preferred[0])) { if (cpu->fallback !=3D VIR_CPU_FALLBACK_ALLOW) { virReportError(VIR_ERR_CONFIG_UNSUPPORTED, _("CPU model %s is not supported by hyp= ervisor"), - preferred); + preferred[0]); return -1; } else { VIR_WARN("Preferred CPU model %s not allowed by" " hypervisor; closest supported model will be" - " used", preferred); + " used", preferred[0]); } } else { VIR_DEBUG("CPU model %s not allowed by hypervisor; ignorin= g", @@ -2779,8 +2800,8 @@ virCPUx86Baseline(virCPUDef **cpus, size_t i; virCPUx86Vendor *vendor =3D NULL; bool outputVendor =3D true; - const char *modelName; - bool matchingNames =3D true; + g_autofree char **modelNames =3D NULL; + size_t namesLen =3D 0; g_autoptr(virCPUData) featData =3D NULL; =20 if (!(map =3D virCPUx86GetMap())) @@ -2802,19 +2823,17 @@ virCPUx86Baseline(virCPUDef **cpus, return NULL; } =20 - modelName =3D cpus[0]->model; + modelNames =3D g_new0(char *, ncpus + 1); + if (cpus[0]->model) + modelNames[namesLen++] =3D cpus[0]->model; + for (i =3D 1; i < ncpus; i++) { g_autoptr(virCPUx86Model) model =3D NULL; const char *vn =3D NULL; =20 - if (matchingNames && cpus[i]->model) { - if (!modelName) { - modelName =3D cpus[i]->model; - } else if (STRNEQ(modelName, cpus[i]->model)) { - modelName =3D NULL; - matchingNames =3D false; - } - } + if (cpus[i]->model && + !g_strv_contains((const char **) modelNames, cpus[i]->model)) + modelNames[namesLen++] =3D cpus[i]->model; =20 if (!(model =3D x86ModelFromCPU(cpus[i], map, -1))) return NULL; @@ -2877,10 +2896,11 @@ virCPUx86Baseline(virCPUDef **cpus, virCPUx86DataAddItem(&base_model->data, &vendor->data) < 0) return NULL; =20 - if (x86Decode(cpu, &base_model->data, models, modelName, migratable) <= 0) + if (x86Decode(cpu, &base_model->data, models, + (const char **) modelNames, migratable) < 0) return NULL; =20 - if (STREQ_NULLABLE(cpu->model, modelName)) + if (namesLen =3D=3D 1 && STREQ(cpu->model, modelNames[0])) cpu->fallback =3D VIR_CPU_FALLBACK_FORBID; =20 if (!outputVendor) diff --git a/tests/cputestdata/x86_64-baseline-Westmere+Nehalem-migratable.= xml b/tests/cputestdata/x86_64-baseline-Westmere+Nehalem-migratable.xml index 775a27de2e..f5846b1619 100644 --- a/tests/cputestdata/x86_64-baseline-Westmere+Nehalem-migratable.xml +++ b/tests/cputestdata/x86_64-baseline-Westmere+Nehalem-migratable.xml @@ -1,10 +1,14 @@ - SandyBridge + Westmere Intel + + + + + - diff --git a/tests/cputestdata/x86_64-baseline-Westmere+Nehalem-result.xml = b/tests/cputestdata/x86_64-baseline-Westmere+Nehalem-result.xml index cafca97d62..166833276c 100644 --- a/tests/cputestdata/x86_64-baseline-Westmere+Nehalem-result.xml +++ b/tests/cputestdata/x86_64-baseline-Westmere+Nehalem-result.xml @@ -1,11 +1,15 @@ - SandyBridge + Westmere Intel + + + + + - diff --git a/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Cascadelake= .xml b/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Cascadelake.xml index 46c32c996f..ecac749b97 100644 --- a/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Cascadelake.xml +++ b/tests/cputestdata/x86_64-cpuid-baseline-Cooperlake+Cascadelake.xml @@ -1,17 +1,22 @@ - Cooperlake + Cascadelake-Server Intel - + + + + + + + + - - --=20 2.35.1