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From: Michal Privoznik
To: libvir-list@redhat.com
Subject: [PATCH 08/13] conf: Parse and format HMAT
Date: Wed, 24 Jun 2020 15:49:06 +0200
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<98bea11bf69a7736b3e5ca9ac7444570a8381da8.1593006346.git.mprivozn@redhat.com>
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References:
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To cite ACPI specification:
Heterogeneous Memory Attribute Table describes the memory
attributes, such as memory side cache attributes and bandwidth
and latency details, related to the System Physical Address
(SPA) Memory Ranges. The software is expected to use this
information as hint for optimization.
According to our upstream discussion [1] this is exposed under
as under NUMA and or
under numa/latencies.
1: https://www.redhat.com/archives/libvir-list/2020-January/msg00422.html
Signed-off-by: Michal Privoznik
Reviewed-by: Daniel Henrique Barboza
---
docs/formatdomain.html.in | 88 ++++++
docs/schemas/cputypes.rng | 110 ++++++-
src/conf/numa_conf.c | 350 ++++++++++++++++++++-
src/conf/numa_conf.h | 33 ++
src/libvirt_private.syms | 6 +
tests/qemuxml2argvdata/numatune-hmat.xml | 52 +++
tests/qemuxml2xmloutdata/numatune-hmat.xml | 1 +
tests/qemuxml2xmltest.c | 1 +
8 files changed, 625 insertions(+), 16 deletions(-)
create mode 100644 tests/qemuxml2argvdata/numatune-hmat.xml
create mode 120000 tests/qemuxml2xmloutdata/numatune-hmat.xml
diff --git a/docs/formatdomain.html.in b/docs/formatdomain.html.in
index 07dcca57f5..78b2d2828d 100644
--- a/docs/formatdomain.html.in
+++ b/docs/formatdomain.html.in
@@ -1931,6 +1931,94 @@
using 10 for local and 20 for remote distances.
+ Since 6.5.0 the cell eleme=
nt can
+ have cache child element which describes memory side ca=
che
+ for memory proximity domains. The cache element has
+ level attribute describing the cache level and thus the
+ element can be repeated multiple times to describe different levels =
of
+ the cache.
+
+
+
+ The cache element then has associativity
+ attribute (accepted values are none, direct and
+ full) describing the cache associativity, and
+ policy attribute (accepted values are none,
+ writeback and writethrough) describing cac=
he
+ write associativity. The element has two mandatory child elements th=
en:
+ size and line which describe cache size and
+ cache line size. Both elements accept two attributes: value
+ and unit which set the value of corresponding cache
+ attribute.
+
+
+
+ The NUMA description has optional latencies element that
+ describes the normalized memory read/write latency, read/write bandw=
idth
+ between Initiator Proximity Domains (Processor or I/O) and Target
+ Proximity Domains (Memory).
+
+
+
+ The latencies element can have zero or more
+ latency child elements to describe latency between two
+ memory nodes and zero or more bandwidth child elements =
to
+ describe bandwidth between two memory nodes. Both these have the
+ following mandatory attributes:
+
+
+
+
initiator
+
Refers to the source NUMA node
+
+
target
+
Refers to the target NUMA node
+
+
type
+
The type of the access. Accepted values: access,
+ read, write
+
+
value
+
The actual value. For latency this is delay in nanoseconds, for
+ bandwidth this value is in kibibytes per second. Use additional
+ unit attribute to change the units.
+
+
+
+ To describe latency from one NUMA node to a cache of another NUMA no=
de
+ the latency element has optional cache
+ attribute which in combination with target attribute cr=
eates
+ full reference to distant NUMA node's cache level. For instance,
+ target=3D'0' cache=3D'1' refers to the first level cach=
e of NUMA
+ node 0.
+