From nobody Wed Jan 15 16:24:48 2025 Delivered-To: importer@patchew.org Received-SPF: none (zohomail.com: 8.43.85.245 is neither permitted nor denied by domain of lists.libvirt.org) client-ip=8.43.85.245; envelope-from=devel-bounces@lists.libvirt.org; helo=lists.libvirt.org; Authentication-Results: mx.zohomail.com; spf=none (zohomail.com: 8.43.85.245 is neither permitted nor denied by domain of lists.libvirt.org) smtp.mailfrom=devel-bounces@lists.libvirt.org Return-Path: Received: from lists.libvirt.org (lists.libvirt.org [8.43.85.245]) by mx.zohomail.com with SMTPS id 1710991934102886.79826658484; Wed, 20 Mar 2024 20:32:14 -0700 (PDT) Received: by lists.libvirt.org (Postfix, from userid 996) id 01AB91D90; Wed, 20 Mar 2024 23:32:12 -0400 (EDT) Received: from lists.libvirt.org (localhost [IPv6:::1]) by lists.libvirt.org (Postfix) with ESMTP id 259D21D2E; Wed, 20 Mar 2024 23:30:49 -0400 (EDT) Received: by lists.libvirt.org (Postfix, from userid 996) id 604581C06; Wed, 20 Mar 2024 23:30:46 -0400 (EDT) Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by lists.libvirt.org (Postfix) with ESMTP id 529EF1CF9 for ; Wed, 20 Mar 2024 23:30:42 -0400 (EDT) Received: from loongson.cn (unknown [10.2.5.185]) by gateway (Coremail) with SMTP id _____8DxmfDdqftlvqcbAA--.1064S3; Thu, 21 Mar 2024 11:30:37 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.185]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Cxf8_VqftlE2JfAA--.54088S3; Thu, 21 Mar 2024 11:30:34 +0800 (CST) X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on lists.libvirt.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.4 From: Xianglai Li To: devel@lists.libvirt.org Subject: [libvirt PATCH V4 1/4] Add loongarch cpu support Date: Thu, 21 Mar 2024 11:30:26 +0800 Message-Id: <7393e174943e9ef9c960522341e78f17b0d48b1d.1710991635.git.lixianglai@loongson.cn> X-Mailer: git-send-email 2.39.1 In-Reply-To: References: MIME-Version: 1.0 X-CM-TRANSID: AQAAf8Cxf8_VqftlE2JfAA--.54088S3 X-CM-SenderInfo: 5ol0xt5qjotxo6or00hjvr0hdfq/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Message-ID-Hash: DAEWAWI74OARG53TBVTZJ6LIKEOG2UU3 X-Message-ID-Hash: DAEWAWI74OARG53TBVTZJ6LIKEOG2UU3 X-MailFrom: lixianglai@loongson.cn X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-config-1; header-match-config-2; header-match-config-3; header-match-devel.lists.libvirt.org-0; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; suspicious-header CC: maobibo@loongson.cn, lichao@loongson.cn, jiyin@redhat.com, lixianglai@loongson.cn X-Mailman-Version: 3.2.2 Precedence: list List-Id: Development discussions about the libvirt library & tools Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZM-MESSAGEID: 1710991936527100001 Add loongarch cpu support, Define new cpu type 'loongarch64' and implement it's driver functions. Signed-off-by: Xianglai Li --- src/conf/schemas/basictypes.rng | 1 + src/cpu/cpu.c | 2 ++ src/cpu/cpu_loongarch.c | 58 +++++++++++++++++++++++++++++++++ src/cpu/cpu_loongarch.h | 25 ++++++++++++++ src/cpu/meson.build | 1 + src/qemu/qemu_capabilities.c | 11 ++++--- src/qemu/qemu_domain.c | 1 + src/util/virarch.c | 11 ++++--- src/util/virarch.h | 13 +++++--- tests/qemufirmwaretest.c | 2 +- 10 files changed, 109 insertions(+), 16 deletions(-) create mode 100644 src/cpu/cpu_loongarch.c create mode 100644 src/cpu/cpu_loongarch.h diff --git a/src/conf/schemas/basictypes.rng b/src/conf/schemas/basictypes.= rng index b65d210091..2931e316b7 100644 --- a/src/conf/schemas/basictypes.rng +++ b/src/conf/schemas/basictypes.rng @@ -444,6 +444,7 @@ i686 ia64 lm32 + loongarch64 m68k microblaze microblazeel diff --git a/src/cpu/cpu.c b/src/cpu/cpu.c index 4f048d0dad..33701811fb 100644 --- a/src/cpu/cpu.c +++ b/src/cpu/cpu.c @@ -27,6 +27,7 @@ #include "cpu_ppc64.h" #include "cpu_s390.h" #include "cpu_arm.h" +#include "cpu_loongarch.h" #include "cpu_riscv64.h" #include "capabilities.h" =20 @@ -41,6 +42,7 @@ static struct cpuArchDriver *drivers[] =3D { &cpuDriverS390, &cpuDriverArm, &cpuDriverRiscv64, + &cpuDriverLoongArch, }; =20 =20 diff --git a/src/cpu/cpu_loongarch.c b/src/cpu/cpu_loongarch.c new file mode 100644 index 0000000000..78d9941320 --- /dev/null +++ b/src/cpu/cpu_loongarch.c @@ -0,0 +1,58 @@ +/* + * cpu_loongarch.c: CPU driver for 64-bit LOONGARCH CPUs + * + * Copyright (C) 2024 Loongson Technology. + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library. If not, see + * . + */ + +#include +#include "virlog.h" +#include "cpu.h" + +#define VIR_FROM_THIS VIR_FROM_CPU + +VIR_LOG_INIT("cpu.cpu_loongarch"); + +static const virArch archs[] =3D { VIR_ARCH_LOONGARCH64 }; + +static virCPUCompareResult +virCPULoongArchCompare(virCPUDef *host G_GNUC_UNUSED, + virCPUDef *cpu G_GNUC_UNUSED, + bool failIncompatible G_GNUC_UNUSED) +{ + return VIR_CPU_COMPARE_IDENTICAL; +} + +static int +virCPULoongArchUpdate(virCPUDef *guest G_GNUC_UNUSED, + const virCPUDef *host G_GNUC_UNUSED, + bool relative G_GNUC_UNUSED) +{ + return 0; +} + +struct cpuArchDriver cpuDriverLoongArch =3D { + .name =3D "LoongArch", + .arch =3D archs, + .narch =3D G_N_ELEMENTS(archs), + .compare =3D virCPULoongArchCompare, + .decode =3D NULL, + .encode =3D NULL, + .dataFree =3D NULL, + .baseline =3D NULL, + .update =3D virCPULoongArchUpdate, + .getModels =3D NULL, +}; diff --git a/src/cpu/cpu_loongarch.h b/src/cpu/cpu_loongarch.h new file mode 100644 index 0000000000..4bc1c0cd8f --- /dev/null +++ b/src/cpu/cpu_loongarch.h @@ -0,0 +1,25 @@ +/* + * cpu_loongarch.h: CPU driver for 64-bit LOONGARCH CPUs + * + * Copyright (C) 2024 Loongson Technology. + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library. If not, see + * . + */ + +#pragma once + +#include "cpu.h" + +extern struct cpuArchDriver cpuDriverLoongArch; diff --git a/src/cpu/meson.build b/src/cpu/meson.build index 55396903b9..141230e380 100644 --- a/src/cpu/meson.build +++ b/src/cpu/meson.build @@ -1,6 +1,7 @@ cpu_sources =3D [ 'cpu.c', 'cpu_arm.c', + 'cpu_loongarch.c', 'cpu_map.c', 'cpu_ppc64.c', 'cpu_riscv64.c', diff --git a/src/qemu/qemu_capabilities.c b/src/qemu/qemu_capabilities.c index 8e906ce9c6..fe008d170c 100644 --- a/src/qemu/qemu_capabilities.c +++ b/src/qemu/qemu_capabilities.c @@ -2696,36 +2696,37 @@ static const char *preferredMachines[] =3D NULL, /* VIR_ARCH_ITANIUM (doesn't exist in QEMU any more) */ "lm32-evr", /* VIR_ARCH_LM32 */ =20 + NULL, /* VIR_ARCH_LOONGARCH64 */ "mcf5208evb", /* VIR_ARCH_M68K */ "petalogix-s3adsp1800", /* VIR_ARCH_MICROBLAZE */ "petalogix-s3adsp1800", /* VIR_ARCH_MICROBLAZEEL */ "malta", /* VIR_ARCH_MIPS */ - "malta", /* VIR_ARCH_MIPSEL */ =20 + "malta", /* VIR_ARCH_MIPSEL */ "malta", /* VIR_ARCH_MIPS64 */ "malta", /* VIR_ARCH_MIPS64EL */ "or1k-sim", /* VIR_ARCH_OR32 */ NULL, /* VIR_ARCH_PARISC (no QEMU impl) */ - NULL, /* VIR_ARCH_PARISC64 (no QEMU impl) */ =20 + NULL, /* VIR_ARCH_PARISC64 (no QEMU impl) */ "g3beige", /* VIR_ARCH_PPC */ "g3beige", /* VIR_ARCH_PPCLE */ "pseries", /* VIR_ARCH_PPC64 */ "pseries", /* VIR_ARCH_PPC64LE */ - "bamboo", /* VIR_ARCH_PPCEMB */ =20 + "bamboo", /* VIR_ARCH_PPCEMB */ "virt", /* VIR_ARCH_RISCV32 */ "virt", /* VIR_ARCH_RISCV64 */ NULL, /* VIR_ARCH_S390 (no QEMU impl) */ "s390-ccw-virtio", /* VIR_ARCH_S390X */ - "shix", /* VIR_ARCH_SH4 */ =20 + "shix", /* VIR_ARCH_SH4 */ "shix", /* VIR_ARCH_SH4EB */ "SS-5", /* VIR_ARCH_SPARC */ "sun4u", /* VIR_ARCH_SPARC64 */ "puv3", /* VIR_ARCH_UNICORE32 */ - "pc", /* VIR_ARCH_X86_64 */ =20 + "pc", /* VIR_ARCH_X86_64 */ "sim", /* VIR_ARCH_XTENSA */ "sim", /* VIR_ARCH_XTENSAEB */ }; diff --git a/src/qemu/qemu_domain.c b/src/qemu/qemu_domain.c index bc6cf133d4..4e98b06529 100644 --- a/src/qemu/qemu_domain.c +++ b/src/qemu/qemu_domain.c @@ -4266,6 +4266,7 @@ qemuDomainDefAddDefaultDevices(virQEMUDriver *driver, case VIR_ARCH_CRIS: case VIR_ARCH_ITANIUM: case VIR_ARCH_LM32: + case VIR_ARCH_LOONGARCH64: case VIR_ARCH_M68K: case VIR_ARCH_MICROBLAZE: case VIR_ARCH_MICROBLAZEEL: diff --git a/src/util/virarch.c b/src/util/virarch.c index 01e520de73..8545f993ea 100644 --- a/src/util/virarch.c +++ b/src/util/virarch.c @@ -51,36 +51,37 @@ static const struct virArchData { { "ia64", 64, VIR_ARCH_LITTLE_ENDIAN }, { "lm32", 32, VIR_ARCH_BIG_ENDIAN }, =20 + { "loongarch64", 64, VIR_ARCH_LITTLE_ENDIAN }, { "m68k", 32, VIR_ARCH_BIG_ENDIAN }, { "microblaze", 32, VIR_ARCH_BIG_ENDIAN }, { "microblazeel", 32, VIR_ARCH_LITTLE_ENDIAN}, { "mips", 32, VIR_ARCH_BIG_ENDIAN }, - { "mipsel", 32, VIR_ARCH_LITTLE_ENDIAN }, =20 + { "mipsel", 32, VIR_ARCH_LITTLE_ENDIAN }, { "mips64", 64, VIR_ARCH_BIG_ENDIAN }, { "mips64el", 64, VIR_ARCH_LITTLE_ENDIAN }, { "openrisc", 32, VIR_ARCH_BIG_ENDIAN }, { "parisc", 32, VIR_ARCH_BIG_ENDIAN }, - { "parisc64", 64, VIR_ARCH_BIG_ENDIAN }, =20 + { "parisc64", 64, VIR_ARCH_BIG_ENDIAN }, { "ppc", 32, VIR_ARCH_BIG_ENDIAN }, { "ppcle", 32, VIR_ARCH_LITTLE_ENDIAN }, { "ppc64", 64, VIR_ARCH_BIG_ENDIAN }, { "ppc64le", 64, VIR_ARCH_LITTLE_ENDIAN }, - { "ppcemb", 32, VIR_ARCH_BIG_ENDIAN }, =20 + { "ppcemb", 32, VIR_ARCH_BIG_ENDIAN }, { "riscv32", 32, VIR_ARCH_LITTLE_ENDIAN }, { "riscv64", 64, VIR_ARCH_LITTLE_ENDIAN }, { "s390", 32, VIR_ARCH_BIG_ENDIAN }, { "s390x", 64, VIR_ARCH_BIG_ENDIAN }, - { "sh4", 32, VIR_ARCH_LITTLE_ENDIAN }, =20 + { "sh4", 32, VIR_ARCH_LITTLE_ENDIAN }, { "sh4eb", 64, VIR_ARCH_BIG_ENDIAN }, { "sparc", 32, VIR_ARCH_BIG_ENDIAN }, { "sparc64", 64, VIR_ARCH_BIG_ENDIAN }, { "unicore32", 32, VIR_ARCH_LITTLE_ENDIAN }, - { "x86_64", 64, VIR_ARCH_LITTLE_ENDIAN }, =20 + { "x86_64", 64, VIR_ARCH_LITTLE_ENDIAN }, { "xtensa", 32, VIR_ARCH_LITTLE_ENDIAN }, { "xtensaeb", 32, VIR_ARCH_BIG_ENDIAN }, }; diff --git a/src/util/virarch.h b/src/util/virarch.h index 747f77c48e..2c01a13b8e 100644 --- a/src/util/virarch.h +++ b/src/util/virarch.h @@ -36,36 +36,37 @@ typedef enum { VIR_ARCH_ITANIUM, /* Itanium 64 LE https://en.wikipedia.org/w= iki/Itanium */ VIR_ARCH_LM32, /* MilkyMist 32 BE https://en.wikipedia.org/w= iki/Milkymist */ =20 + VIR_ARCH_LOONGARCH64, /* LoongArch 64 LE https://en.wikipedia.org/w= iki/Loongson#LoongArch */ VIR_ARCH_M68K, /* m68k 32 BE https://en.wikipedia.org/w= iki/Motorola_68000_family */ VIR_ARCH_MICROBLAZE, /* Microblaze 32 BE https://en.wikipedia.org/w= iki/MicroBlaze */ VIR_ARCH_MICROBLAZEEL, /* Microblaze 32 LE https://en.wikipedia.org/w= iki/MicroBlaze */ VIR_ARCH_MIPS, /* MIPS 32 BE https://en.wikipedia.org/w= iki/MIPS_architecture */ - VIR_ARCH_MIPSEL, /* MIPS 32 LE https://en.wikipedia.org/w= iki/MIPS_architecture */ =20 + VIR_ARCH_MIPSEL, /* MIPS 32 LE https://en.wikipedia.org/w= iki/MIPS_architecture */ VIR_ARCH_MIPS64, /* MIPS 64 BE https://en.wikipedia.org/w= iki/MIPS_architecture */ VIR_ARCH_MIPS64EL, /* MIPS 64 LE https://en.wikipedia.org/w= iki/MIPS_architecture */ VIR_ARCH_OR32, /* OpenRisc 32 BE https://en.wikipedia.org/w= iki/OpenRISC#QEMU_support */ VIR_ARCH_PARISC, /* PA-Risc 32 BE https://en.wikipedia.org/w= iki/PA-RISC */ - VIR_ARCH_PARISC64, /* PA-Risc 64 BE https://en.wikipedia.org/w= iki/PA-RISC */ =20 + VIR_ARCH_PARISC64, /* PA-Risc 64 BE https://en.wikipedia.org/w= iki/PA-RISC */ VIR_ARCH_PPC, /* PowerPC 32 BE https://en.wikipedia.org/w= iki/PowerPC */ VIR_ARCH_PPCLE, /* PowerPC 32 LE https://en.wikipedia.org/w= iki/PowerPC */ VIR_ARCH_PPC64, /* PowerPC 64 BE https://en.wikipedia.org/w= iki/PowerPC */ VIR_ARCH_PPC64LE, /* PowerPC 64 LE https://en.wikipedia.org/w= iki/PowerPC */ - VIR_ARCH_PPCEMB, /* PowerPC 32 BE https://en.wikipedia.org/w= iki/PowerPC */ =20 + VIR_ARCH_PPCEMB, /* PowerPC 32 BE https://en.wikipedia.org/w= iki/PowerPC */ VIR_ARCH_RISCV32, /* RISC-V 32 LE https://en.wikipedia.org/w= iki/RISC-V */ VIR_ARCH_RISCV64, /* RISC-V 64 LE https://en.wikipedia.org/w= iki/RISC-V */ VIR_ARCH_S390, /* S390 32 BE https://en.wikipedia.org/w= iki/S390 */ VIR_ARCH_S390X, /* S390 64 BE https://en.wikipedia.org/w= iki/S390x */ - VIR_ARCH_SH4, /* SuperH4 32 LE https://en.wikipedia.org/w= iki/SuperH */ =20 + VIR_ARCH_SH4, /* SuperH4 32 LE https://en.wikipedia.org/w= iki/SuperH */ VIR_ARCH_SH4EB, /* SuperH4 32 BE https://en.wikipedia.org/w= iki/SuperH */ VIR_ARCH_SPARC, /* Sparc 32 BE https://en.wikipedia.org/w= iki/Sparc */ VIR_ARCH_SPARC64, /* Sparc 64 BE https://en.wikipedia.org/w= iki/Sparc */ VIR_ARCH_UNICORE32, /* UniCore 32 LE https://en.wikipedia.org/w= iki/Unicore */ - VIR_ARCH_X86_64, /* x86 64 LE https://en.wikipedia.org/w= iki/X86 */ =20 + VIR_ARCH_X86_64, /* x86 64 LE https://en.wikipedia.org/w= iki/X86 */ VIR_ARCH_XTENSA, /* XTensa 32 LE https://en.wikipedia.org/w= iki/Xtensa#Processor_Cores */ VIR_ARCH_XTENSAEB, /* XTensa 32 BE https://en.wikipedia.org/w= iki/Xtensa#Processor_Cores */ =20 @@ -106,6 +107,8 @@ typedef enum { #define ARCH_IS_SH4(arch) ((arch) =3D=3D VIR_ARCH_SH4 ||\ (arch) =3D=3D VIR_ARCH_SH4EB) =20 +#define ARCH_IS_LOONGARCH(arch) ((arch) =3D=3D VIR_ARCH_LOONGARCH64) + typedef enum { VIR_ARCH_LITTLE_ENDIAN, VIR_ARCH_BIG_ENDIAN, diff --git a/tests/qemufirmwaretest.c b/tests/qemufirmwaretest.c index 1b5baf5c5e..c967f86d68 100644 --- a/tests/qemufirmwaretest.c +++ b/tests/qemufirmwaretest.c @@ -269,7 +269,7 @@ mymain(void) DO_PARSE_TEST("usr/share/qemu/firmware/40-edk2-ovmf-4m-qcow2-x64-sb.js= on"); DO_PARSE_TEST("usr/share/qemu/firmware/41-edk2-ovmf-2m-raw-x64-sb.json= "); DO_PARSE_TEST("usr/share/qemu/firmware/50-edk2-aarch64-qcow2.json"); - DO_PARSE_FAILURE_TEST("usr/share/qemu/firmware/50-edk2-loongarch64.jso= n"); + DO_PARSE_TEST("usr/share/qemu/firmware/50-edk2-loongarch64.json"); DO_PARSE_TEST("usr/share/qemu/firmware/50-edk2-ovmf-4m-qcow2-x64-nosb.= json"); DO_PARSE_TEST("usr/share/qemu/firmware/50-edk2-ovmf-x64-microvm.json"); DO_PARSE_TEST("usr/share/qemu/firmware/51-edk2-aarch64-raw.json"); --=20 2.39.1 _______________________________________________ Devel mailing list -- devel@lists.libvirt.org To unsubscribe send an email to devel-leave@lists.libvirt.org