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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1794506993894158501 Load the write length from guest data instead of an immediate, and fail unless the syscall writes exactly 12 bytes. This detects incorrect CPU data byte order rather than merely accepting the ELF header. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- tests/tcg/aarch64_be/hello.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/tests/tcg/aarch64_be/hello.c b/tests/tcg/aarch64_be/hello.c index a9b2ab45de9b..18432d3257dd 100644 --- a/tests/tcg/aarch64_be/hello.c +++ b/tests/tcg/aarch64_be/hello.c @@ -7,16 +7,17 @@ #define __NR_write 64 #define __NR_exit 93 =20 -int write(int fd, char *buf, int len) +int write(int fd, const char *buf, int len) { register int x0 __asm__("x0") =3D fd; - register char *x1 __asm__("x1") =3D buf; + register const char *x1 __asm__("x1") =3D buf; register int x2 __asm__("x2") =3D len; register int x8 __asm__("x8") =3D __NR_write; =20 - asm volatile("svc #0" : : "r"(x0), "r"(x1), "r"(x2), "r"(x8)); + asm volatile("svc #0" : "+r"(x0) : "r"(x1), "r"(x2), "r"(x8) + : "memory"); =20 - return len; + return x0; } =20 void exit(int ret) @@ -30,6 +31,9 @@ void exit(int ret) =20 void _start(void) { - write(1, "Hello World\n", 12); - exit(0); + /* Force a data load to check CPU data byte order. */ + static const char hello[] =3D "Hello World\n"; + static volatile int len =3D sizeof(hello) - 1; + + exit(write(1, hello, len) !=3D len); } --=20 2.55.0 From nobody Sun Nov 15 00:25:55 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1794507008; cv=none; d=zohomail.com; s=zohoarc; b=cEJxDHrgx/gMjoXHWSSmZ4e1zfEyZqusZTVRyGWedBHVTcLhWgYe/yszPiPjYajmBOgwauuoveaeCzo2ckQ+499kdqqAysO2VY8vjc8uPdf8Go1EN3PLOnsbQjw/NPeFmller9qX8wIY2V0/R4Lfjx2ILYqWcqQsgIEimcbKNG8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1794507008; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=7BCKV5IVDk7vsjlvCYKKr9cyCqjoU/iBPzkhqVikM4I=; b=blERmYo4Qo3kjTmiRh5k0cgT9PV21DDxz1po15fG82UqdUr/o6l/98rJf9wK+Y7PPW2zclP9H+xVAq0qjZyQQneqvCKMY2WhZvaLVfHwNBh5kNZAmWLpxaL6Me4Jzw8UOqbtQQwSsqo+iBDgiUdvfRQFurdrXmXB0KPSzfRNsRg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1794507008246813.1340765919932; Thu, 12 Nov 2026 10:10:08 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1xRZEh-0000cB-BO; Thu, 12 Nov 2026 13:09:23 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1xRZEf-0000bg-Mx for qemu-devel@nongnu.org; Thu, 12 Nov 2026 13:09:21 -0500 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1xRZEd-0003cC-Pq for qemu-devel@nongnu.org; Thu, 12 Nov 2026 13:09:21 -0500 Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 6ACGRS7Z1768204 for ; Thu, 12 Nov 2026 18:09:18 GMT Received: from mail-ua1-f69.google.com (mail-ua1-f69.google.com [209.85.222.69]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4hwh0agdy2-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 12 Nov 2026 18:09:18 +0000 (GMT) Received: by mail-ua1-f69.google.com with SMTP id a1e0cc1a2514c-99077a0be0bso59025241.2 for ; Thu, 12 Nov 2026 10:09:18 -0800 (PST) Received: from localhost.localdomain (pmd666.hd.free.fr. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1794507010192158500 arm-linux-user had no big-endian test coverage. Build the non-libc hello world with -mbig-endian (BE8 by default) and again with -mbe32 for legacy BE32 code/data ordering. The volatile length forces a data load, checking the CPU data byte order. Plumb both tests with the meson machinery. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- tests/tcg/arm/hello-arm-be.c | 34 ++++++++++++++++++++++++++++++++++ tests/tcg/arm/hello-arm-be32.c | 4 ++++ tests/tcg/arm/hello-arm.ref | 1 + tests/tcg/arm/meson.build | 11 +++++++++++ 4 files changed, 50 insertions(+) create mode 100644 tests/tcg/arm/hello-arm-be.c create mode 100644 tests/tcg/arm/hello-arm-be32.c create mode 100644 tests/tcg/arm/hello-arm.ref diff --git a/tests/tcg/arm/hello-arm-be.c b/tests/tcg/arm/hello-arm-be.c new file mode 100644 index 000000000000..6c2aa6637b93 --- /dev/null +++ b/tests/tcg/arm/hello-arm-be.c @@ -0,0 +1,34 @@ +/* + * Non-libc syscall hello world to exercise big-endian ARM Linux-user. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#define __NR_exit 1 +#define __NR_write 4 + +static const char hello[] =3D "Hello World\n"; +/* Volatile forces a data load to check the CPU data byte order. */ +static volatile int len =3D sizeof(hello) - 1; + +static inline int write(int fd, const char *buf, int len) +{ + register int r0 __asm__("r0") =3D fd; + register const char *r1 __asm__("r1") =3D buf; + register int r2 __asm__("r2") =3D len; + register int r7 __asm__("r7") =3D __NR_write; + + __asm__ volatile("svc 0" : "+r"(r0) : "r"(r1), "r"(r2), "r"(r7) + : "memory"); + + return r0; +} + +void _start(void) +{ + register int r0 __asm__("r0") =3D write(1, hello, len) !=3D len; + register int r7 __asm__("r7") =3D __NR_exit; + + __asm__ volatile("svc 0" : : "r"(r0), "r"(r7) : "memory"); + __builtin_unreachable(); +} diff --git a/tests/tcg/arm/hello-arm-be32.c b/tests/tcg/arm/hello-arm-be32.c new file mode 100644 index 000000000000..f639332a1aa2 --- /dev/null +++ b/tests/tcg/arm/hello-arm-be32.c @@ -0,0 +1,4 @@ +/* Rebuild the big-endian hello test with legacy BE32 code/data ordering. = */ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include "hello-arm-be.c" diff --git a/tests/tcg/arm/hello-arm.ref b/tests/tcg/arm/hello-arm.ref new file mode 100644 index 000000000000..557db03de997 --- /dev/null +++ b/tests/tcg/arm/hello-arm.ref @@ -0,0 +1 @@ +Hello World diff --git a/tests/tcg/arm/meson.build b/tests/tcg/arm/meson.build index 6e498232f0d4..818447ae84d7 100644 --- a/tests/tcg/arm/meson.build +++ b/tests/tcg/arm/meson.build @@ -30,6 +30,17 @@ tests +=3D { 'hello-arm.c': { 'cflags': ['-marm', '-nostdlib', '-ffreestanding', '-fno-stack-protect= or'], }, + # The cross compiler emits BE8 for -mbig-endian; test legacy BE32 too. + 'hello-arm-be.c': { + 'cflags': ['-marm', '-mbig-endian', '-nostdlib', '-static', '-ffreesta= nding', + '-fno-stack-protector'], + 'expected_output': 'hello-arm.ref', + }, + 'hello-arm-be32.c': { + 'cflags': ['-marm', '-mbig-endian', '-mbe32', '-nostdlib', '-static', + '-ffreestanding', '-fno-stack-protector'], + 'expected_output': 'hello-arm.ref', + }, 'fcvt.c': { 'cflags': ['-lm', '-march=3Darmv8.2-a+fp16', '-mfpu=3Dneon-fp-armv8'], 'expected_output': 'fcvt.ref', --=20 2.55.0 From nobody Sun Nov 15 00:25:55 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1794507002; cv=none; d=zohomail.com; s=zohoarc; b=XEY2uGn5ilt6ckqP5xpRm31//b1oCZg7sxMJDqq+VNGB3mHWtMh6CXCCu9IShUAVCZ7KjbEtzLNvWkVzKAVeeyqxu0pKxanThhn2LsFe9quAIxN6Z5JrSQC7QCc+348E1y89BGoewQubN3QeKrH36KyYCikP7Bse0O32j4znXAA= ARC-Message-Signature: i=1; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1794507004078158500 Use target_big_endian() for the platform name, uname machine, /proc/cpuinfo suffix and vDSO selection. Give the generated vDSOs distinct symbols so both can be included. Preserve the behavior of the existing fixed-endian targets. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- linux-user/aarch64/target_elf.h | 6 +----- linux-user/aarch64/target_syscall.h | 6 +----- linux-user/arm/target_proc.h | 2 +- linux-user/aarch64/elfload.c | 10 +++++++++- linux-user/aarch64/meson.build | 10 ++++------ 5 files changed, 16 insertions(+), 18 deletions(-) diff --git a/linux-user/aarch64/target_elf.h b/linux-user/aarch64/target_el= f.h index 4cdeb64b0d4e..ebd23cfbceda 100644 --- a/linux-user/aarch64/target_elf.h +++ b/linux-user/aarch64/target_elf.h @@ -27,10 +27,6 @@ typedef struct target_elf_gregset_t { struct target_user_pt_regs pt; } target_elf_gregset_t; =20 -#if TARGET_BIG_ENDIAN -# define VDSO_HEADER "vdso-be.c.inc" -#else -# define VDSO_HEADER "vdso-le.c.inc" -#endif +#define HAVE_VDSO_IMAGE_INFO 1 =20 #endif diff --git a/linux-user/aarch64/target_syscall.h b/linux-user/aarch64/targe= t_syscall.h index bd05f6c7fe5d..f3c570a5b2eb 100644 --- a/linux-user/aarch64/target_syscall.h +++ b/linux-user/aarch64/target_syscall.h @@ -1,11 +1,7 @@ #ifndef AARCH64_TARGET_SYSCALL_H #define AARCH64_TARGET_SYSCALL_H =20 -#if TARGET_BIG_ENDIAN -#define UNAME_MACHINE "aarch64_be" -#else -#define UNAME_MACHINE "aarch64" -#endif +#define UNAME_MACHINE (target_big_endian() ? "aarch64_be" : "aarch64") #define UNAME_MINIMUM_RELEASE "3.8.0" #define TARGET_CLONE_BACKWARDS #define TARGET_MCL_CURRENT 1 diff --git a/linux-user/arm/target_proc.h b/linux-user/arm/target_proc.h index 13c33d44d5ed..d3186ca655cf 100644 --- a/linux-user/arm/target_proc.h +++ b/linux-user/arm/target_proc.h @@ -25,7 +25,7 @@ static int open_cpuinfo(CPUArchState *cpu_env, int fd) #endif =20 arch =3D 8; - elf_name =3D "v8" END_SUFFIX; + elf_name =3D target_big_endian() ? "v8b" : "v8l"; midr_rev =3D FIELD_EX32(midr, MIDR_EL1, REVISION); midr_part =3D FIELD_EX32(midr, MIDR_EL1, PARTNUM); midr_var =3D FIELD_EX32(midr, MIDR_EL1, VARIANT); diff --git a/linux-user/aarch64/elfload.c b/linux-user/aarch64/elfload.c index f87f22f6903a..8e75da826e62 100644 --- a/linux-user/aarch64/elfload.c +++ b/linux-user/aarch64/elfload.c @@ -379,7 +379,15 @@ const char *elf_hwcap2_str(uint32_t bit) =20 const char *get_elf_platform(CPUState *cs) { - return TARGET_BIG_ENDIAN ? "aarch64_be" : "aarch64"; + return target_big_endian() ? "aarch64_be" : "aarch64"; +} + +#include "vdso-be.c.inc" +#include "vdso-le.c.inc" + +const VdsoImageInfo *get_vdso_image_info(uint32_t elf_flags) +{ + return target_big_endian() ? &vdso_be_image_info : &vdso_le_image_info; } =20 bool arch_parse_elf_property(uint32_t pr_type, uint32_t pr_datasz, diff --git a/linux-user/aarch64/meson.build b/linux-user/aarch64/meson.build index f25a67a21ef6..a5f9a47a9a27 100644 --- a/linux-user/aarch64/meson.build +++ b/linux-user/aarch64/meson.build @@ -1,12 +1,10 @@ -# TARGET_BIG_ENDIAN is defined to 'n' for little-endian; which means it -# is always true as far as source_set.apply() is concerned. Always build -# both header files and include the right one via #if. - vdso_be_inc =3D gen_vdso.process('vdso-be.so', - extra_args: ['-r', '__kernel_rt_sigreturn']) + extra_args: ['-r', '__kernel_rt_sigreturn', + '-p', 'vdso_be']) =20 vdso_le_inc =3D gen_vdso.process('vdso-le.so', - extra_args: ['-r', '__kernel_rt_sigreturn']) + extra_args: ['-r', '__kernel_rt_sigreturn', + '-p', 'vdso_le']) =20 linux_user_ss.add(when: 'TARGET_AARCH64', if_true: [vdso_be_inc, vdso_le_i= nc]) =20 --=20 2.55.0 From nobody Sun Nov 15 00:25:55 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1794507062; cv=none; d=zohomail.com; s=zohoarc; b=i3pp5zD/paeTofgh9bt5tZbpsa9oSD8GitqyGbWtrHsonAI2inj20VWEDtsRZOzMxfYZ7JjZsJkvJ1Dud72+ocyIC60INKQ5gm6hlAZCDZjPPNNXSJ6ejqAznZzjE4N2whghj4sLIggNefQWImP+he8+o+z/ZeZ0CasiC+dUcEo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1794507062; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=LDt9m4VL31vta49qyUdzCLLxgvh4VaLWpi+uQnOPXoc=; b=Dt0Rk1hp8e0S+tyMK3Qt+Pm6e70kv5cOjT3gT+VcUK4oJO8lwk5zc+RUfcFqhOUyb0Mtt787wJUpvGB9Nmb1bJUASc1C8773H8DMmHYrxDjhhZluu5v7Rv23QZ0pKJehBfKFk4Ovh7zR6XLWgbcBV8ap3pOuJZzxKVOrddCMTIw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1794507062764676.3144455371389; Thu, 12 Nov 2026 10:11:02 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1xRZF1-0000jz-BT; Thu, 12 Nov 2026 13:09:43 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1xRZEv-0000j6-NP for qemu-devel@nongnu.org; Thu, 12 Nov 2026 13:09:37 -0500 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1xRZEt-0004jw-Qq for qemu-devel@nongnu.org; Thu, 12 Nov 2026 13:09:37 -0500 Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 6ACFZahw657060 for ; Thu, 12 Nov 2026 18:09:34 GMT Received: from mail-vs1-f71.google.com (mail-vs1-f71.google.com [209.85.217.71]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4hw6yujvg7-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 12 Nov 2026 18:09:34 +0000 (GMT) Received: by mail-vs1-f71.google.com with SMTP id ada2fe7eead31-7cc06b9ca9eso6017137.0 for ; Thu, 12 Nov 2026 10:09:34 -0800 (PST) Received: from localhost.localdomain (pmd666.hd.free.fr. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1794507065346158500 Use target_big_endian() for CPU endian initialization, FPSIMD signal-frame ordering and CPU-versus-ABI byte-order checks. Preserve the behavior of the existing fixed-endian targets. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/arm/internals.h | 2 +- linux-user/aarch64/cpu_loop.c | 12 ++++++------ linux-user/aarch64/signal.c | 20 ++++++-------------- target/arm/gdbstub64.c | 4 ++-- target/arm/tcg/translate-sve.c | 2 +- 5 files changed, 16 insertions(+), 24 deletions(-) diff --git a/target/arm/internals.h b/target/arm/internals.h index 033d6d66da3a..1381ef9638a3 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -588,7 +588,7 @@ static inline bool arm_cpu_data_is_big_endian(CPUARMSta= te *env) #ifdef CONFIG_USER_ONLY static inline bool arm_cpu_bswap_data(CPUARMState *env) { - return TARGET_BIG_ENDIAN ^ arm_cpu_data_is_big_endian(env); + return target_big_endian() ^ arm_cpu_data_is_big_endian(env); } #endif =20 diff --git a/linux-user/aarch64/cpu_loop.c b/linux-user/aarch64/cpu_loop.c index e7f643d69d56..91ebf4e0778f 100644 --- a/linux-user/aarch64/cpu_loop.c +++ b/linux-user/aarch64/cpu_loop.c @@ -242,13 +242,13 @@ void init_main_thread(CPUState *cs, struct image_info= *info) env->pc =3D info->entry & ~0x3ULL; env->xregs[31] =3D info->start_stack; =20 -#if TARGET_BIG_ENDIAN - env->cp15.sctlr_el[1] |=3D SCTLR_E0E; - for (int i =3D 1; i < 4; ++i) { - env->cp15.sctlr_el[i] |=3D SCTLR_EE; + if (target_big_endian()) { + env->cp15.sctlr_el[1] |=3D SCTLR_E0E; + for (int i =3D 1; i < 4; ++i) { + env->cp15.sctlr_el[i] |=3D SCTLR_EE; + } + arm_rebuild_hflags(env); } - arm_rebuild_hflags(env); -#endif =20 if (cpu_isar_feature(aa64_pauth, cpu)) { qemu_guest_getrandom_nofail(&env->keys, sizeof(env->keys)); diff --git a/linux-user/aarch64/signal.c b/linux-user/aarch64/signal.c index 899fce76436c..f24fcddfec3e 100644 --- a/linux-user/aarch64/signal.c +++ b/linux-user/aarch64/signal.c @@ -208,6 +208,7 @@ static void target_setup_fpsimd_record(struct target_fp= simd_context *fpsimd, CPUARMState *env) { int i; + int big_endian =3D target_big_endian(); =20 __put_user(TARGET_FPSIMD_MAGIC, &fpsimd->head.magic); __put_user(sizeof(struct target_fpsimd_context), &fpsimd->head.size); @@ -216,13 +217,8 @@ static void target_setup_fpsimd_record(struct target_f= psimd_context *fpsimd, =20 for (i =3D 0; i < 32; i++) { uint64_t *q =3D aa64_vfp_qreg(env, i); -#if TARGET_BIG_ENDIAN - __put_user(q[0], &fpsimd->vregs[i * 2 + 1]); - __put_user(q[1], &fpsimd->vregs[i * 2]); -#else - __put_user(q[0], &fpsimd->vregs[i * 2]); - __put_user(q[1], &fpsimd->vregs[i * 2 + 1]); -#endif + __put_user(q[0], &fpsimd->vregs[i * 2 + big_endian]); + __put_user(q[1], &fpsimd->vregs[i * 2 + !big_endian]); } } =20 @@ -402,6 +398,7 @@ static void target_restore_fpsimd_record(CPUARMState *e= nv, { uint32_t fpsr, fpcr; int i; + int big_endian =3D target_big_endian(); =20 __get_user(fpsr, &fpsimd->fpsr); vfp_set_fpsr(env, fpsr); @@ -410,13 +407,8 @@ static void target_restore_fpsimd_record(CPUARMState *= env, =20 for (i =3D 0; i < 32; i++) { uint64_t *q =3D aa64_vfp_qreg(env, i); -#if TARGET_BIG_ENDIAN - __get_user(q[0], &fpsimd->vregs[i * 2 + 1]); - __get_user(q[1], &fpsimd->vregs[i * 2]); -#else - __get_user(q[0], &fpsimd->vregs[i * 2]); - __get_user(q[1], &fpsimd->vregs[i * 2 + 1]); -#endif + __get_user(q[0], &fpsimd->vregs[i * 2 + big_endian]); + __get_user(q[1], &fpsimd->vregs[i * 2 + !big_endian]); } } =20 diff --git a/target/arm/gdbstub64.c b/target/arm/gdbstub64.c index 0c3e5b30bd6a..ee6ed8296e33 100644 --- a/target/arm/gdbstub64.c +++ b/target/arm/gdbstub64.c @@ -122,8 +122,8 @@ int aarch64_gdb_set_fpu_reg(CPUState *cs, uint8_t *buf,= int reg) * On the wire these are target-endian 128 bit values. * In the CPU state these are host-order uint64_t values * with the least-significant one first. This means they're - * the other way around for target_big_endian() (which is - * only true for us for aarch64_be-linux-user). + * the other way around for target_big_endian(), which reflects + * the executable's byte order in Linux-user emulation. */ if (target_big_endian()) { q[1] =3D ldq_p(buf); diff --git a/target/arm/tcg/translate-sve.c b/target/arm/tcg/translate-sve.c index 10375577b1e0..6c4cf29238c6 100644 --- a/target/arm/tcg/translate-sve.c +++ b/target/arm/tcg/translate-sve.c @@ -5165,7 +5165,7 @@ void gen_sve_str(DisasContext *s, TCGv_ptr base, int = vofs, /* Note that unpredicated load/store of vector/predicate registers * are defined as a stream of bytes, which equates to little-endian * operations on larger quantities. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1794507067217158500 Use target_big_endian() for the platform name, uname machine, /proc/cpuinfo suffix and vDSO selection. Preserve the behavior of the existing fixed-endian targets. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- linux-user/arm/target_proc.h | 18 +++++------------ linux-user/arm/target_syscall.h | 6 +----- linux-user/arm/elfload.c | 36 +++++++++++---------------------- linux-user/uname.c | 13 +++--------- linux-user/arm/meson.build | 4 ---- 5 files changed, 21 insertions(+), 56 deletions(-) diff --git a/linux-user/arm/target_proc.h b/linux-user/arm/target_proc.h index d3186ca655cf..d9e00371a4c7 100644 --- a/linux-user/arm/target_proc.h +++ b/linux-user/arm/target_proc.h @@ -18,12 +18,6 @@ static int open_cpuinfo(CPUArchState *cpu_env, int fd) const char *elf_name; int num_cpus, len_part, len_var; =20 -#if TARGET_BIG_ENDIAN -# define END_SUFFIX "b" -#else -# define END_SUFFIX "l" -#endif - arch =3D 8; elf_name =3D target_big_endian() ? "v8b" : "v8l"; midr_rev =3D FIELD_EX32(midr, MIDR_EL1, REVISION); @@ -41,29 +35,27 @@ static int open_cpuinfo(CPUArchState *cpu_env, int fd) midr_var =3D (midr >> 16) & 0x7f; len_var =3D 2; if (arm_feature(&cpu->env, ARM_FEATURE_M)) { - elf_name =3D "armv7m" END_SUFFIX; + elf_name =3D target_big_endian() ? "armv7mb" : "armv7ml"; } else { - elf_name =3D "armv7" END_SUFFIX; + elf_name =3D target_big_endian() ? "armv7b" : "armv7l"; } } else { midr_part =3D midr >> 4; len_part =3D 7; if (arm_feature(&cpu->env, ARM_FEATURE_V6)) { arch =3D 6; - elf_name =3D "armv6" END_SUFFIX; + elf_name =3D target_big_endian() ? "armv6b" : "armv6l"; } else if (arm_feature(&cpu->env, ARM_FEATURE_V5)) { arch =3D 5; - elf_name =3D "armv5t" END_SUFFIX; + elf_name =3D target_big_endian() ? "armv5tb" : "armv5tl"; } else { arch =3D 4; - elf_name =3D "armv4" END_SUFFIX; + elf_name =3D target_big_endian() ? "armv4b" : "armv4l"; } } } #endif =20 -#undef END_SUFFIX - num_cpus =3D sysconf(_SC_NPROCESSORS_ONLN); for (int i =3D 0; i < num_cpus; i++) { dprintf(fd, diff --git a/linux-user/arm/target_syscall.h b/linux-user/arm/target_syscal= l.h index 8c4ddba71773..d344f614954c 100644 --- a/linux-user/arm/target_syscall.h +++ b/linux-user/arm/target_syscall.h @@ -10,11 +10,7 @@ #define ARM_NR_set_tls (ARM_NR_BASE + 5) #define ARM_NR_get_tls (ARM_NR_BASE + 6) =20 -#if TARGET_BIG_ENDIAN -#define UNAME_MACHINE "armv5teb" -#else -#define UNAME_MACHINE "armv5tel" -#endif +#define UNAME_MACHINE (target_big_endian() ? "armv5teb" : "armv5tel") #define UNAME_MINIMUM_RELEASE "2.6.32" =20 #define TARGET_CLONE_BACKWARDS diff --git a/linux-user/arm/elfload.c b/linux-user/arm/elfload.c index ce69bf054273..baa04851caf2 100644 --- a/linux-user/arm/elfload.c +++ b/linux-user/arm/elfload.c @@ -179,29 +179,21 @@ const char *get_elf_platform(CPUState *cs) { CPUARMState *env =3D cpu_env(cs); =20 -#if TARGET_BIG_ENDIAN -# define END "b" -#else -# define END "l" -#endif - if (arm_feature(env, ARM_FEATURE_V8)) { - return "v8" END; + return target_big_endian() ? "v8b" : "v8l"; } else if (arm_feature(env, ARM_FEATURE_V7)) { if (arm_feature(env, ARM_FEATURE_M)) { - return "v7m" END; + return target_big_endian() ? "v7mb" : "v7ml"; } else { - return "v7" END; + return target_big_endian() ? "v7b" : "v7l"; } } else if (arm_feature(env, ARM_FEATURE_V6)) { - return "v6" END; + return target_big_endian() ? "v6b" : "v6l"; } else if (arm_feature(env, ARM_FEATURE_V5)) { - return "v5" END; + return target_big_endian() ? "v5b" : "v5l"; } else { - return "v4" END; + return target_big_endian() ? "v4b" : "v4l"; } - -#undef END } =20 bool init_guest_commpage(void) @@ -257,21 +249,17 @@ void elf_core_copy_regs(target_elf_gregset_t *r, cons= t CPUARMState *env) r->pt.orig_r0 =3D tswapal(env->regs[0]); /* FIXME */ } =20 -#if TARGET_BIG_ENDIAN # include "vdso-be8.c.inc" # include "vdso-be32.c.inc" -#else # include "vdso-le.c.inc" -#endif =20 const VdsoImageInfo *get_vdso_image_info(uint32_t elf_flags) { -#if TARGET_BIG_ENDIAN - return (EF_ARM_EABI_VERSION(elf_flags) >=3D EF_ARM_EABI_VER4 - && (elf_flags & EF_ARM_BE8) - ? &vdso_be8_image_info - : &vdso_be32_image_info); -#else + if (target_big_endian()) { + return (EF_ARM_EABI_VERSION(elf_flags) >=3D EF_ARM_EABI_VER4 + && (elf_flags & EF_ARM_BE8) + ? &vdso_be8_image_info + : &vdso_be32_image_info); + } return &vdso_image_info; -#endif } diff --git a/linux-user/uname.c b/linux-user/uname.c index 32f71f24920d..0f4658bff151 100644 --- a/linux-user/uname.c +++ b/linux-user/uname.c @@ -38,20 +38,13 @@ const char *cpu_to_uname_machine(CPUArchState *cpu_env) * see arch/arm/kernel/setup.c: setup_processor() */ =20 - /* in theory, endianness is configurable on some ARM CPUs, but this is= n't - * used in user mode emulation */ -#if TARGET_BIG_ENDIAN -#define utsname_suffix "b" -#else -#define utsname_suffix "l" -#endif if (arm_feature(cpu_env, ARM_FEATURE_V7)) - return "armv7" utsname_suffix; + return target_big_endian() ? "armv7b" : "armv7l"; if (arm_feature(cpu_env, ARM_FEATURE_V6)) - return "armv6" utsname_suffix; + return target_big_endian() ? "armv6b" : "armv6l"; /* earliest emulated CPU is ARMv5TE; qemu can emulate the 1026, but no= t its * Jazelle support */ - return "armv5te" utsname_suffix; + return target_big_endian() ? "armv5teb" : "armv5tel"; #elif defined(TARGET_I386) && !defined(TARGET_X86_64) /* see arch/x86/kernel/cpu/bugs.c: check_bugs(), 386, 486, 586, 686 */ CPUState *cpu =3D env_cpu(cpu_env); diff --git a/linux-user/arm/meson.build b/linux-user/arm/meson.build index 348ffb810d7f..47faf42eef6c 100644 --- a/linux-user/arm/meson.build +++ b/linux-user/arm/meson.build @@ -6,10 +6,6 @@ syscall_nr_generators +=3D { output: '@BASENAME@_nr.h') } =20 -# TARGET_BIG_ENDIAN is defined to 'n' for little-endian; which means it -# is always true as far as source_set.apply() is concerned. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1794507091353158500 Use target_big_endian() for BE8 code-order handling. Preserve the behavior of the existing fixed-endian targets. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/arm/cpu.h | 10 ++++++++-- linux-user/arm/cpu_loop.c | 2 +- 2 files changed, 9 insertions(+), 3 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index b2f393f50184..7fb1726e8744 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -22,6 +22,7 @@ =20 #include "kvm-consts.h" #include "qemu/cpu-float.h" +#include "qemu/target-info.h" #include "hw/core/registerfields.h" #include "cpu-qom.h" #include "exec/cpu-common.h" @@ -2660,11 +2661,16 @@ static inline int sme_vq(CPUARMState *env) static inline bool bswap_code(bool sctlr_b) { #ifdef CONFIG_USER_ONLY - /* BE8 (SCTLR.B =3D 0, TARGET_BIG_ENDIAN =3D 1) is mixed endian. - * The invalid combination SCTLR.B=3D1/CPSR.E=3D1/TARGET_BIG_ENDIAN=3D0 + /* + * BE8 (SCTLR.B =3D 0, big-endian target) is mixed endian. + * The invalid combination SCTLR.B=3D1/CPSR.E=3D1/little-endian target * would also end up as a mixed-endian mode with BE code, LE data. */ +#ifdef TARGET_RUNTIME_ENDIAN + return target_big_endian() ^ sctlr_b; +#else return TARGET_BIG_ENDIAN ^ sctlr_b; +#endif #else /* All code access in ARM is little endian, and there are no loaders * doing swaps that need to be reversed diff --git a/linux-user/arm/cpu_loop.c b/linux-user/arm/cpu_loop.c index 262ab5cc416d..6d19a9a8a070 100644 --- a/linux-user/arm/cpu_loop.c +++ b/linux-user/arm/cpu_loop.c @@ -505,7 +505,7 @@ void init_main_thread(CPUState *cs, struct image_info *= info) } } =20 - if (TARGET_BIG_ENDIAN) { + if (target_big_endian()) { /* Enable BE8. */ if (EF_ARM_EABI_VERSION(info->elf_flags) >=3D EF_ARM_EABI_VER4 && (info->elf_flags & EF_ARM_BE8)) { --=20 2.55.0 From nobody Sun Nov 15 00:25:55 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1794507132; cv=none; d=zohomail.com; s=zohoarc; b=aAhCWu0g7Zkrv7iyFxf5YalYJl5sXu9yaBOU5n+6Axd3Eok4sBXeQLmfm/4z16hQQB3T+PyY0kZD/OJ3ZY/0FDue2lP7rYtrwpUDu3uoWlduSOQfq22fyQ1fU3i8YDJLNGmq8UrNJnbodnIj612lZlZKvUntVFc3P8kAnqHt1MM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1794507132; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=T+BUoXt5tn4PGluBlPDbHpmyBXj6a91GEDmrMsa5S2Q=; b=Ag6JuhgQ1e5reJoClTiwvicgKn6xqj8mqL0g+pOtynLIuEaKxrlO4Vva1VbuVhg/JevvPVRCBPMro6NDpMr7zWTtH31IgrN6zpWoWAptNmXLfACnBL9ncgO2YRoqVpvoZxcQ02CML41ZYqsnkES+5uPyEsaWPl23KB0CUqzN1wE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1794507132440252.9872602799304; Thu, 12 Nov 2026 10:12:12 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1xRZGL-0002Jh-S6; Thu, 12 Nov 2026 13:11:06 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1xRZFJ-0000sC-3b for qemu-devel@nongnu.org; Thu, 12 Nov 2026 13:10:02 -0500 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1xRZFH-0006VX-2H for qemu-devel@nongnu.org; Thu, 12 Nov 2026 13:10:00 -0500 Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 6ACFZlxS011361 for ; Thu, 12 Nov 2026 18:09:57 GMT Received: from mail-qk1-f197.google.com (mail-qk1-f197.google.com [209.85.222.197]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4hwg1b8q73-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 12 Nov 2026 18:09:57 +0000 (GMT) Received: by mail-qk1-f197.google.com with SMTP id af79cd13be357-93caf7856ffso1469485a.3 for ; Thu, 12 Nov 2026 10:09:57 -0800 (PST) Received: from localhost.localdomain (pmd666.hd.free.fr. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1794507134133158500 Add a write-once ABI byte-order setter for runtime-endian Linux-user targets. Expose const data to readers and inline runtime endian checks, keeping its writable initializer outside LTO. Retain immutable data and compile-time byte swapping for fixed-endian targets. Restrict TARGET_RUNTIME_ENDIAN to Linux-user configurations. Inspired-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- meson.build | 26 ++++++++++++++++++++++++-- include/exec/tswap.h | 11 +++++++---- include/qemu/target-info-def.h | 14 ++++++++++++++ include/qemu/target-info.h | 20 ++++++++++++++++++++ target-info-def.c | 19 +++++++++++++++++++ 5 files changed, 84 insertions(+), 6 deletions(-) diff --git a/meson.build b/meson.build index d7bcb581c181..04cf5d77f188 100644 --- a/meson.build +++ b/meson.build @@ -3342,6 +3342,11 @@ foreach target : target_dirs =20 config_target +=3D keyval.load('configs/targets' / target + '.mak') =20 + if 'TARGET_RUNTIME_ENDIAN' in config_target + assert(target.endswith('linux-user'), + 'Runtime target endianness is only supported for Linux-user') + endif + target_kconfig =3D [] foreach sym: accelerators if sym =3D=3D 'CONFIG_TCG' or target in accelerator_targets.get(sym, [= ]) @@ -4400,8 +4405,6 @@ foreach target : target_dirs endif endif =20 - arch_srcs +=3D files('target-info-def.c') - if target_base_arch in target_arch t =3D target_arch[target_base_arch].apply(config_target, strict: false) arch_srcs +=3D t.sources() @@ -4470,6 +4473,25 @@ foreach target : target_dirs lib_deps +=3D dep.partial_dependency(compile_args: true, includes: tru= e) endforeach =20 + # Keep the writable runtime-endian definition opaque to const readers, + # as for page-vary-common.c above. + target_info =3D files('target-info-def.c') + if get_option('b_lto') and 'TARGET_RUNTIME_ENDIAN' in config_target + target_info_flags =3D ['-fno-lto'] + if get_option('cfi') + target_info_flags +=3D '-fno-sanitize=3Dcfi-icall' + endif + target_info =3D static_library('target-info-' + target, + sources: target_info + genh + config_targe= t_h[target], + dependencies: lib_deps, + include_directories: target_inc, + c_args: c_args + target_info_flags, + build_by_default: false) + objects +=3D target_info.extract_all_objects(recursive: false) + else + arch_srcs +=3D target_info + endif + lib =3D static_library('qemu-' + target, sources: arch_srcs + genh, dependencies: lib_deps, diff --git a/include/exec/tswap.h b/include/exec/tswap.h index 17ac5444544d..869619bac314 100644 --- a/include/exec/tswap.h +++ b/include/exec/tswap.h @@ -13,14 +13,17 @@ #include "hw/core/cpu.h" =20 /* - * If we're in target-specific code, we can hard-code the swapping - * condition, otherwise we have to do (slower) run-time checks. + * For fixed-endian target-specific code, hard-code the swapping condition. + * Otherwise use run-time checks. */ #ifdef COMPILING_PER_TARGET +#ifndef TARGET_RUNTIME_ENDIAN #define target_needs_bswap() (HOST_BIG_ENDIAN !=3D TARGET_BIG_ENDIAN) -#else +#endif +#endif +#ifndef target_needs_bswap #define target_needs_bswap() (HOST_BIG_ENDIAN !=3D target_big_endian()) -#endif /* COMPILING_PER_TARGET */ +#endif =20 #if defined(CONFIG_USER_ONLY) \ || !defined(TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API) diff --git a/include/qemu/target-info-def.h b/include/qemu/target-info-def.h index 8019d2c7196e..34058955edec 100644 --- a/include/qemu/target-info-def.h +++ b/include/qemu/target-info-def.h @@ -32,6 +32,20 @@ typedef struct TargetInfo { bool page_bits_vary; } TargetInfo; =20 +#ifdef COMPILING_PER_TARGET +#ifdef TARGET_RUNTIME_ENDIAN +/* + * Linux-user selects the ELF byte order before creating CPUs or guest thr= eads. + * The data is then immutable; its writable definition must stay outside L= TO. + */ +#ifdef IN_TARGET_INFO_DEF +extern TargetInfo target_info_stub; +#else +extern const TargetInfo target_info_stub; +#endif +#endif +#endif + /** * target_info: * diff --git a/include/qemu/target-info.h b/include/qemu/target-info.h index 2cd4cc5671b5..6ed4cfda8d7b 100644 --- a/include/qemu/target-info.h +++ b/include/qemu/target-info.h @@ -9,6 +9,12 @@ #ifndef QEMU_TARGET_INFO_H #define QEMU_TARGET_INFO_H =20 +#ifdef COMPILING_PER_TARGET +#ifdef TARGET_RUNTIME_ENDIAN +#include "qemu/target-info-def.h" +#endif +#endif + /** * target_name: * @@ -40,7 +46,21 @@ const char *target_cpu_type(void); * the target, so please do *not* use this function unless you know very * well what you are doing! */ +#ifdef COMPILING_PER_TARGET +#ifdef TARGET_RUNTIME_ENDIAN +static inline bool target_big_endian(void) +{ + return target_info_stub.endianness =3D=3D ENDIAN_MODE_BIG; +} + +/* Select the Linux-user ABI byte order once, before CPUs or guest threads= . */ +void target_set_big_endian(bool big_endian); +#else bool target_big_endian(void); +#endif +#else +bool target_big_endian(void); +#endif =20 /** * target_heterogeneous: diff --git a/target-info-def.c b/target-info-def.c index bcf9cfe1e437..7580993e0bb3 100644 --- a/target-info-def.c +++ b/target-info-def.c @@ -6,6 +6,8 @@ * SPDX-License-Identifier: GPL-2.0-or-later */ =20 +#define IN_TARGET_INFO_DEF 1 + #include "qemu/osdep.h" #include "qemu/target-info.h" #include "qemu/target-info-def.h" @@ -24,7 +26,12 @@ QEMU_BUILD_BUG_ON(offsetof(ArchCPU, env) !=3D sizeof(CPU= State)); QEMU_BUILD_BUG_ON(TARGET_PAGE_BITS < TARGET_PAGE_BITS_MIN); #endif =20 +#ifdef TARGET_RUNTIME_ENDIAN +/* This writable definition must not be compiled with -flto. */ +TargetInfo target_info_stub =3D { +#else static const TargetInfo target_info_stub =3D { +#endif .target_name =3D TARGET_NAME, .target_arch =3D glue(SYS_EMU_TARGET_, TARGET_ARCH_VARIANT), .long_bits =3D TARGET_LONG_BITS, @@ -42,3 +49,15 @@ static const TargetInfo target_info_stub =3D { }; =20 target_info_init(target_info_stub) + +#ifdef TARGET_RUNTIME_ENDIAN +void target_set_big_endian(bool big_endian) +{ + static bool endian_decided; + + assert(!endian_decided); + endian_decided =3D true; + target_info_stub.endianness =3D big_endian ? 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1794507105696158500 Use the selected ABI byte order for ELF validation and core headers, user-memory accesses, signal masks and /proc/net/route conversion. Retain the fixed-endian paths for targets without runtime selection. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- linux-user/qemu.h | 17 ++++++++++++++++- linux-user/syscall_defs.h | 7 ------- linux-user/elfload.c | 6 +----- linux-user/syscall.c | 6 +++--- 4 files changed, 20 insertions(+), 16 deletions(-) diff --git a/linux-user/qemu.h b/linux-user/qemu.h index ef7aed2daec6..53567a6c0363 100644 --- a/linux-user/qemu.h +++ b/linux-user/qemu.h @@ -254,7 +254,22 @@ static inline bool access_ok(CPUState *cpu, int type, } while (0) =20 =20 -#if TARGET_BIG_ENDIAN +#ifdef TARGET_RUNTIME_ENDIAN +# define __put_user(x, hptr) do { \ + if (target_big_endian()) { \ + __put_user_e(x, hptr, be); \ + } else { \ + __put_user_e(x, hptr, le); \ + } \ +} while (0) +# define __get_user(x, hptr) do { \ + if (target_big_endian()) { \ + __get_user_e(x, hptr, be); \ + } else { \ + __get_user_e(x, hptr, le); \ + } \ +} while (0) +#elif TARGET_BIG_ENDIAN # define __put_user(x, hptr) __put_user_e(x, hptr, be) # define __get_user(x, hptr) __get_user_e(x, hptr, be) #else diff --git a/linux-user/syscall_defs.h b/linux-user/syscall_defs.h index f5831a6baddc..c9a1853c9e90 100644 --- a/linux-user/syscall_defs.h +++ b/linux-user/syscall_defs.h @@ -462,19 +462,12 @@ typedef struct { abi_ulong sig[TARGET_NSIG_WORDS]; } target_sigset_t; =20 -#if HOST_BIG_ENDIAN !=3D TARGET_BIG_ENDIAN static inline void tswap_sigset(target_sigset_t *d, const target_sigset_t = *s) { int i; for(i =3D 0;i < TARGET_NSIG_WORDS; i++) d->sig[i] =3D tswapal(s->sig[i]); } -#else -static inline void tswap_sigset(target_sigset_t *d, const target_sigset_t = *s) -{ - *d =3D *s; -} -#endif =20 static inline void target_siginitset(target_sigset_t *d, abi_ulong set) { diff --git a/linux-user/elfload.c b/linux-user/elfload.c index c188fa03c31f..c76afb77bbdc 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -102,11 +102,7 @@ int info_is_fdpic(struct image_info *info) return info->personality =3D=3D PER_LINUX_FDPIC; } =20 -#if TARGET_BIG_ENDIAN -#define ELF_DATA ELFDATA2MSB -#else -#define ELF_DATA ELFDATA2LSB -#endif +#define ELF_DATA (target_big_endian() ? ELFDATA2MSB : ELFDATA2LSB) =20 #ifdef USE_UID16 typedef abi_ushort target_uid_t; diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 2fc61b3eabcc..9dec129e1d4f 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -8778,7 +8778,7 @@ void target_exception_dump(CPUArchState *env, const c= har *fmt, int code) =20 #include "target_proc.h" =20 -#if HOST_BIG_ENDIAN !=3D TARGET_BIG_ENDIAN || \ +#if defined(TARGET_RUNTIME_ENDIAN) || HOST_BIG_ENDIAN !=3D TARGET_BIG_ENDI= AN || \ defined(HAVE_ARCH_PROC_CPUINFO) || \ defined(HAVE_ARCH_PROC_HARDWARE) static int is_proc(const char *filename, const char *entry) @@ -8787,7 +8787,7 @@ static int is_proc(const char *filename, const char *= entry) } #endif =20 -#if HOST_BIG_ENDIAN !=3D TARGET_BIG_ENDIAN +#if defined(TARGET_RUNTIME_ENDIAN) || HOST_BIG_ENDIAN !=3D TARGET_BIG_ENDI= AN static int open_net_route(CPUArchState *cpu_env, int fd) { FILE *fp; @@ -8850,7 +8850,7 @@ static int maybe_do_fake_open(CPUArchState *cpu_env, = int dirfd, { "stat", open_self_stat, is_proc_myself }, { "auxv", open_self_auxv, is_proc_myself }, { "cmdline", open_self_cmdline, is_proc_myself }, -#if HOST_BIG_ENDIAN !=3D TARGET_BIG_ENDIAN +#if defined(TARGET_RUNTIME_ENDIAN) || HOST_BIG_ENDIAN !=3D TARGET_BIG_ENDI= AN { "/proc/net/route", open_net_route, is_proc }, #endif #if defined(HAVE_ARCH_PROC_CPUINFO) --=20 2.55.0 From nobody Sun Nov 15 00:25:55 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1794507103; cv=none; d=zohomail.com; s=zohoarc; b=QHIUns43oN9uyD3Rpeu9mHMkg7IJTW0M0h16/xCdWFVfAdY2Hvmj+RhkGHa7ht4TdkNi9cdqOxmI9iYG5amUSRxGsCugyaOR/85CtAH+2ujNqbN2qQxJLoPHUqCch1UKq4xH09uSv0/Blw9UhpgwPRmcYik9JpzPW51YGe+WwpY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1794507103; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=tvPgX6zbt550DX3PMKCkJzPcSsfzMzrq0LIQQnTkVFE=; b=LWkPjTEsXlCacGg8rPKo0yUE+15ahSErB4huGJgyYv/1Fchw27y2Qfuq35NFnRKGD0/c91QOtvtgcj851fW6AXWHpOq1+C8pr/6BCZLoYY4dE3GP9JL/PK6VRIUQFEfluxHhR1osifqM079AmAs9/ROoOWZJs4kupnLNxTwy6wg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1794507103558727.0493165965893; Thu, 12 Nov 2026 10:11:43 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1xRZGQ-0002wJ-E9; Thu, 12 Nov 2026 13:11:10 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1xRZFW-0001Im-RQ for qemu-devel@nongnu.org; Thu, 12 Nov 2026 13:10:20 -0500 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1xRZFV-0007kY-65 for qemu-devel@nongnu.org; Thu, 12 Nov 2026 13:10:14 -0500 Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 6ACFZjkY3180961 for ; Thu, 12 Nov 2026 18:10:12 GMT Received: from mail-qk1-f198.google.com (mail-qk1-f198.google.com [209.85.222.198]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4hwc1j1ndf-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 12 Nov 2026 18:10:12 +0000 (GMT) Received: by mail-qk1-f198.google.com with SMTP id af79cd13be357-93f322ef7d3so6191885a.0 for ; Thu, 12 Nov 2026 10:10:11 -0800 (PST) Received: from localhost.localdomain (pmd666.hd.free.fr. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1794507105648158500 Read EI_DATA from the executable descriptor before selecting the CPU and loading the image. This also covers binfmt open-binary execution and an explicitly selected CPU model. Reject invalid ELF byte-order encodings without using the invoked emulator name to select an ABI. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- linux-user/main.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/linux-user/main.c b/linux-user/main.c index 2f0c0a50c8a4..71718f974f6b 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -22,6 +22,7 @@ #include "qemu/units.h" #include "qemu/accel.h" #include "qemu/version.h" +#include "elf.h" #include #include #include @@ -769,6 +770,31 @@ int main(int argc, char **argv, char **envp) } } =20 +#ifdef TARGET_RUNTIME_ENDIAN + { + unsigned char ident[EI_NIDENT]; + ssize_t len =3D pread(execfd, ident, sizeof(ident), 0); + + if (len < 0) { + error_report("Error reading %s: %s", exec_path, strerror(errno= )); + exit(EXIT_FAILURE); + } + if (len =3D=3D sizeof(ident) && memcmp(ident, ELFMAG, SELFMAG) =3D= =3D 0) { + switch (ident[EI_DATA]) { + case ELFDATA2LSB: + target_set_big_endian(false); + break; + case ELFDATA2MSB: + target_set_big_endian(true); + break; + default: + error_report("%s: Invalid ELF byte order", exec_path); + exit(EXIT_FAILURE); + } + } + } +#endif + /* Resolve executable file name to full path name */ /* Keep how we started the program in exec_path, e.g. "./my_program" */ /* Store real path in real_exec_path, e.g. "/usr/local/bin/my_program"= */ --=20 2.55.0 From nobody Sun Nov 15 00:25:55 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1794507105; cv=none; d=zohomail.com; s=zohoarc; b=O5HrPpaFRjmZhrG/l/XrZjLx7JOPKeUlA666pZFwpDtgzVH7u2i4+joO0aF6osmZjjAGcKCRfIOZPELXgjeTc9YOdZ2uxY7Ilxu/IqY+FYGQgNkujQDoJKMiozJdeIBNRzSdWO+OV8TvsqAobWyUT55sGvQK5iGZPkC8id/w2V8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1794507105; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=Szxmyh6AHSFS/1ZMahHiUVQVJ6UFuz/SaFCJMKqS+LM=; b=SqbkIvJXRP2r/22+yD5few7FbhzVbCTFqDDwKXyqAxZ1Uqsy5xOo1evffmJuvNAouuLD8a1eaPLTaWSZd3pTne2jhdPgX2NYB2H58R1zcnUtAscSoMMDmtucKcnOml6aoIug0QCOtxi+Quf3wREOTh44GLpPa6Xcl5z3Z6G+xgo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1794507105030608.1106568425082; Thu, 12 Nov 2026 10:11:45 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1xRZGH-00020P-Q8; Thu, 12 Nov 2026 13:11:02 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1xRZFf-0001Nk-8g for qemu-devel@nongnu.org; Thu, 12 Nov 2026 13:10:26 -0500 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1xRZFd-0008K6-Hn for qemu-devel@nongnu.org; Thu, 12 Nov 2026 13:10:22 -0500 Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 6ACFaFFG1112704 for ; Thu, 12 Nov 2026 18:10:20 GMT Received: from mail-ua1-f72.google.com (mail-ua1-f72.google.com [209.85.222.72]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4hw6re2wp7-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 12 Nov 2026 18:10:20 +0000 (GMT) Received: by mail-ua1-f72.google.com with SMTP id a1e0cc1a2514c-990ca9607c3so83556241.1 for ; Thu, 12 Nov 2026 10:10:20 -0800 (PST) Received: from localhost.localdomain (pmd666.hd.free.fr. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1794507105632158500 Accept TARGET_USER_ALIASES in target configurations and create relative symlinks in both the build and install trees. Depend on the canonical emulator instead of linking a second binary. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- meson.build | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/meson.build b/meson.build index 04cf5d77f188..86b942640abf 100644 --- a/meson.build +++ b/meson.build @@ -3297,7 +3297,7 @@ host_kconfig =3D \ (hv_balloon ? ['CONFIG_HV_BALLOON_POSSIBLE=3Dy'] : []) + \ (have_rust ? ['CONFIG_HAVE_RUST=3Dy'] : []) =20 -ignored =3D [ 'TARGET_XML_FILES', 'TARGET_ABI_DIR' ] +ignored =3D [ 'TARGET_XML_FILES', 'TARGET_ABI_DIR', 'TARGET_USER_ALIASES' ] =20 default_targets =3D 'CONFIG_DEFAULT_TARGETS' in config_host actual_target_dirs =3D [] @@ -4580,6 +4580,17 @@ foreach target : target_dirs emulators +=3D {exe['name']: emulator} endif =20 + foreach alias : config_target.get('TARGET_USER_ALIASES', '').split() + alias_name =3D 'qemu-' + alias + custom_target(alias_name, + output: alias_name, + depends: emulator, + build_by_default: true, + command: [find_program('ln'), '-sf', exe['name'], '@OU= TPUT@']) + install_symlink(alias_name, pointing_to: exe['name'], + install_dir: get_option('bindir')) + endforeach + traceable +=3D [{ 'exe': exe['name'], 'probe-prefix': 'qemu.' + target_type + '.' + target_name, --=20 2.55.0 From nobody Sun Nov 15 00:25:55 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=oss.qualcomm.com ARC-Seal: i=1; a=rsa-sha256; t=1794507076; cv=none; d=zohomail.com; s=zohoarc; b=OFjPgmvcvv+9RjuMx3VWDYFjJ8AtCBN4J8bJhyVk5IdPpxrHn1q9kTpceOOiAt/zPm/K4SR8wzyZ28/NKvSeurJolcwou0KN5AKKXzbucIh+ONsEjEIuIvgkHyw9hoY7DsIFeAOE2OvCgKykiEvZ1sBqGXyoBFJl9NT90Y1jEMk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1794507076; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=r2LHAnz735b9grJzoDqdjvy4mzlANJ9D9A7HWcMx+po=; b=ljWItk0MfPWHHETb5DfGoCCc5jAcaJDHs1P7AreJBPTIiFp+y67yQQVfvWfHLWcrXwLxq0W2xT1NR91v559KFgqrv3tqaWWndcuCAdfFyVbKlGPWqi3TClKskqavCtYlq8/Qs1HqMq81268I60F8soyV7gRLmQc7zbTxbqB7c8Y= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1794507076238869.8045116952463; Thu, 12 Nov 2026 10:11:16 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists1p.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1xRZGM-0002Xh-Sy; Thu, 12 Nov 2026 13:11:06 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1xRZFn-0001Ue-5K for qemu-devel@nongnu.org; Thu, 12 Nov 2026 13:10:35 -0500 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1xRZFl-0000Ue-7I for qemu-devel@nongnu.org; Thu, 12 Nov 2026 13:10:30 -0500 Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 6ACFZM1c2293145 for ; Thu, 12 Nov 2026 18:10:28 GMT Received: from mail-qt1-f200.google.com (mail-qt1-f200.google.com [209.85.160.200]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4hwbs01r9v-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Thu, 12 Nov 2026 18:10:28 +0000 (GMT) Received: by mail-qt1-f200.google.com with SMTP id d75a77b69052e-5383d650f2dso89578481cf.0 for ; Thu, 12 Nov 2026 10:10:28 -0800 (PST) Received: from localhost.localdomain (pmd666.hd.free.fr. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1794507077250158500 Enable runtime byte-order selection for aarch64-linux-user and retain qemu-aarch64_be as a compatibility symlink. Deprecate the symlink since 12.0 and recommend qemu-aarch64 for both ELF byte orders. Remove the separate aarch64_be-linux-user build target and obsolete CI exclusions. Run the existing big-endian hello test through qemu-aarch64 while retaining its big-endian fixture toolchain. Document that executable name compatibility does not preserve the removed target-list spelling. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- docs/about/deprecated.rst | 13 +++++++++++++ docs/user/main.rst | 8 ++++++++ configure | 9 ++++++++- configs/targets/aarch64-linux-user.mak | 2 ++ configs/targets/aarch64_be-linux-user.mak | 10 ---------- .gitlab-ci.d/buildtest.yml | 2 +- .gitlab-ci.d/crossbuild-template.yml | 4 ++-- tests/tcg/aarch64_be/meson.build | 4 ++-- 8 files changed, 36 insertions(+), 16 deletions(-) delete mode 100644 configs/targets/aarch64_be-linux-user.mak diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst index 0891bbc44ded..715a72d8b117 100644 --- a/docs/about/deprecated.rst +++ b/docs/about/deprecated.rst @@ -438,6 +438,19 @@ It was implemented as a no-op instruction in TCG up to= QEMU 9.0, but only with ``-cpu max`` (which does not guarantee migration compatibility across versions). =20 +linux-user mode executables +--------------------------- + +.. _deprecated-qemu-aarch64-be: + +``qemu-aarch64_be`` executable name (since 12.0) +'''''''''''''''''''''''''''''''''''''''''''''''' + +The ``qemu-aarch64_be`` compatibility symlink is deprecated. +Use ``qemu-aarch64`` instead for both little- and big-endian +Linux ELF executables. The emulator selects the endianness from +the ELF header, regardless of the executable name used to invoke it. + linux-user mode CPUs -------------------- =20 diff --git a/docs/user/main.rst b/docs/user/main.rst index a8ddf9142495..c9b4204dcf9d 100644 --- a/docs/user/main.rst +++ b/docs/user/main.rst @@ -65,6 +65,14 @@ emulator. Linux User space emulator ------------------------- =20 +For AArch64, ``qemu-aarch64`` runs both little- and big-endian Linux ELF +executables, selecting the byte order from the ELF header. ``qemu-aarch64_= be`` +is a :ref:`deprecated compatibility symlink ` +to the same emulator; its name does not override the ELF byte order. +Build both names with ``--target-list=3Daarch64-linux-user``; the separate +``aarch64_be-linux-user`` build target is no longer supported. +For bFLT, which has no byte-order marker, QEMU uses the little-endian defa= ult. + Command line options ~~~~~~~~~~~~~~~~~~~~ =20 diff --git a/configure b/configure index af14a9c23efd..821a887a31c1 100755 --- a/configure +++ b/configure @@ -1107,7 +1107,14 @@ else *" $target "*) ;; *) - error_exit "Unknown target name '$target'" + case "$target" in + aarch64_be-linux-user) + error_exit "Target '$target' is no longer supporte= d; use 'aarch64-linux-user' instead" + ;; + *) + error_exit "Unknown target name '$target'" + ;; + esac ;; esac done diff --git a/configs/targets/aarch64-linux-user.mak b/configs/targets/aarch= 64-linux-user.mak index ddfacc092ddf..efe372021ce8 100644 --- a/configs/targets/aarch64-linux-user.mak +++ b/configs/targets/aarch64-linux-user.mak @@ -1,5 +1,7 @@ TARGET_ARCH=3Daarch64 TARGET_BASE_ARCH=3Darm +TARGET_RUNTIME_ENDIAN=3Dy +TARGET_USER_ALIASES=3Daarch64_be TARGET_XML_FILES=3D aarch64-core.xml aarch64-fpu.xml aarch64-pauth.xml aar= ch64-mte.xml aarch64-sme2.xml TARGET_HAS_BFLT=3Dy CONFIG_SEMIHOSTING=3Dy diff --git a/configs/targets/aarch64_be-linux-user.mak b/configs/targets/aa= rch64_be-linux-user.mak deleted file mode 100644 index 83209fa2ae54..000000000000 --- a/configs/targets/aarch64_be-linux-user.mak +++ /dev/null @@ -1,10 +0,0 @@ -TARGET_ARCH=3Daarch64 -TARGET_BASE_ARCH=3Darm -TARGET_BIG_ENDIAN=3Dy -TARGET_XML_FILES=3D aarch64-core.xml aarch64-fpu.xml aarch64-pauth.xml aar= ch64-mte.xml aarch64-sme2.xml -TARGET_HAS_BFLT=3Dy -CONFIG_SEMIHOSTING=3Dy -CONFIG_ARM_COMPATIBLE_SEMIHOSTING=3Dy -TARGET_SYSTBL_ABI=3Dcommon,64,renameat,rlimit,memfd_secret -TARGET_SYSTBL=3Dsyscall_64.tbl -TARGET_LONG_BITS=3D64 diff --git a/.gitlab-ci.d/buildtest.yml b/.gitlab-ci.d/buildtest.yml index b1e95395d0c3..a603c93cb799 100644 --- a/.gitlab-ci.d/buildtest.yml +++ b/.gitlab-ci.d/buildtest.yml @@ -451,7 +451,7 @@ clang-user: variables: IMAGE: debian-all-test-cross CONFIGURE_ARGS: --cc=3Dclang --cxx=3Dclang++ --disable-system --enable= -ubsan - --target-list-exclude=3Dalpha-linux-user,microblazeel-linux-user,aar= ch64_be-linux-user,i386-linux-user,m68k-linux-user,mipsn32el-linux-user,xte= nsaeb-linux-user + --target-list-exclude=3Dalpha-linux-user,microblazeel-linux-user,i38= 6-linux-user,m68k-linux-user,mipsn32el-linux-user,xtensaeb-linux-user --extra-cflags=3D-fno-sanitize-recover=3Dundefined MAKE_CHECK_ARGS: check-unit check-tcg =20 diff --git a/.gitlab-ci.d/crossbuild-template.yml b/.gitlab-ci.d/crossbuild= -template.yml index 94423814a751..32c11f4895b5 100644 --- a/.gitlab-ci.d/crossbuild-template.yml +++ b/.gitlab-ci.d/crossbuild-template.yml @@ -70,8 +70,8 @@ - cd build - section_start configure "Running configure" - ../configure --enable-werror --disable-docs $QEMU_CONFIGURE_OPTS - --disable-system --target-list-exclude=3D"aarch64_be-linux-user - alpha-linux-user m68k-linux-user microblazeel-linux-user + --disable-system --target-list-exclude=3D"alpha-linux-user + m68k-linux-user microblazeel-linux-user or1k-linux-user ppc-linux-user sparc-linux-user xtensa-linux-user $CROSS_SKIP_TARGETS" - section_end configure diff --git a/tests/tcg/aarch64_be/meson.build b/tests/tcg/aarch64_be/meson.= build index c1873cd5606c..08d29a94e702 100644 --- a/tests/tcg/aarch64_be/meson.build +++ b/tests/tcg/aarch64_be/meson.build @@ -6,7 +6,7 @@ tests +=3D { 'hello.c': {'cflags': ['-mbig-endian', '-ffreestanding', '-nostdlib']}, } =20 -if 'qemu-aarch64_be' in emulators +if 'qemu-aarch64' in emulators tcg_tests +=3D { 'aarch64_be-linux-user': { 'cc': 'aarch64-linux-gnu-gcc', @@ -14,7 +14,7 @@ if 'qemu-aarch64_be' in emulators 'cc_dockerfile': 'debian-all-test-cross', 'folder': 'aarch64_be', 'gdb_arch': 'aarch64_be', - 'qemu': emulators['qemu-aarch64_be'], + 'qemu': emulators['qemu-aarch64'], 'tests': tests, } } --=20 2.55.0 From nobody Sun Nov 15 00:25:55 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists1p.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @qualcomm.com) X-ZM-MESSAGEID: 1794507119881158500 Enable runtime byte-order selection for arm-linux-user and retain qemu-armeb as a compatibility symlink. Deprecate the symlink since 12.0 and recommend qemu-arm for both ELF byte orders. Remove the separate armeb-linux-user build target and obsolete CI exclusions. Run the existing big-endian hello test through qemu-arm while retaining its big-endian fixture toolchain. Document that executable name compatibility does not preserve the removed target-list spelling. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- docs/about/deprecated.rst | 10 ++++++++++ docs/user/main.rst | 10 ++++++++-- configure | 3 +++ configs/targets/arm-linux-user.mak | 2 ++ configs/targets/armeb-linux-user.mak | 9 --------- 5 files changed, 23 insertions(+), 11 deletions(-) delete mode 100644 configs/targets/armeb-linux-user.mak diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst index 715a72d8b117..e85c9efdb4b5 100644 --- a/docs/about/deprecated.rst +++ b/docs/about/deprecated.rst @@ -451,6 +451,16 @@ Use ``qemu-aarch64`` instead for both little- and big-= endian Linux ELF executables. The emulator selects the endianness from the ELF header, regardless of the executable name used to invoke it. =20 +.. _deprecated-qemu-armeb: + +``qemu-armeb`` executable name (since 12.0) +''''''''''''''''''''''''''''''''''''''''''' + +The ``qemu-armeb`` compatibility symlink is deprecated. +Use ``qemu-arm`` instead for both little- and big-endian Linux +ELF executables. The emulator selects the endianness from the +ELF header, regardless of the executable name used to invoke it. + linux-user mode CPUs -------------------- =20 diff --git a/docs/user/main.rst b/docs/user/main.rst index c9b4204dcf9d..2e01233a9cd0 100644 --- a/docs/user/main.rst +++ b/docs/user/main.rst @@ -152,11 +152,17 @@ Other binaries =20 - user mode (Arm) =20 - * ``qemu-armeb`` TODO. + ``qemu-arm`` runs both little- and big-endian Linux ELF executables, + selecting the byte order from the ELF header. ``qemu-armeb`` is a + :ref:`deprecated compatibility symlink ` to the + same emulator; its name does not override the ELF byte order. Build both + names with ``--target-list=3Darm-linux-user``; the separate + ``armeb-linux-user`` build target is no longer supported. =20 * ``qemu-arm`` is also capable of running Arm \"Angel\" semihosted ELF binaries (as implemented by the arm-elf and arm-eabi Newlib/GDB - configurations), and arm-uclinux bFLT format binaries. + configurations), and arm-uclinux bFLT format binaries. bFLT has no + byte-order marker and uses the little-endian default. =20 - user mode (ColdFire) =20 diff --git a/configure b/configure index 821a887a31c1..14b484908919 100755 --- a/configure +++ b/configure @@ -1111,6 +1111,9 @@ else aarch64_be-linux-user) error_exit "Target '$target' is no longer supporte= d; use 'aarch64-linux-user' instead" ;; + armeb-linux-user) + error_exit "Target '$target' is no longer supporte= d; use 'arm-linux-user' instead" + ;; *) error_exit "Unknown target name '$target'" ;; diff --git a/configs/targets/arm-linux-user.mak b/configs/targets/arm-linux= -user.mak index 3793782d067b..e3203c848182 100644 --- a/configs/targets/arm-linux-user.mak +++ b/configs/targets/arm-linux-user.mak @@ -1,6 +1,8 @@ TARGET_ARCH=3Darm TARGET_SYSTBL_ABI=3Dcommon,oabi TARGET_SYSTBL=3Dsyscall.tbl +TARGET_RUNTIME_ENDIAN=3Dy +TARGET_USER_ALIASES=3Darmeb TARGET_XML_FILES=3D arm-core.xml arm-vfp.xml arm-vfp3.xml arm-vfp-sysregs.= xml arm-neon.xml arm-m-profile.xml arm-m-profile-mve.xml TARGET_HAS_BFLT=3Dy CONFIG_SEMIHOSTING=3Dy diff --git a/configs/targets/armeb-linux-user.mak b/configs/targets/armeb-l= inux-user.mak deleted file mode 100644 index 536bc95af71c..000000000000 --- a/configs/targets/armeb-linux-user.mak +++ /dev/null @@ -1,9 +0,0 @@ -TARGET_ARCH=3Darm -TARGET_SYSTBL_ABI=3Dcommon,oabi -TARGET_SYSTBL=3Dsyscall.tbl -TARGET_BIG_ENDIAN=3Dy -TARGET_XML_FILES=3D arm-core.xml arm-vfp.xml arm-vfp3.xml arm-vfp-sysregs.= xml arm-neon.xml arm-m-profile.xml arm-m-profile-mve.xml -TARGET_HAS_BFLT=3Dy -CONFIG_SEMIHOSTING=3Dy -CONFIG_ARM_COMPATIBLE_SEMIHOSTING=3Dy -TARGET_LONG_BITS=3D32 --=20 2.55.0