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c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1772732904; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=QzxKcQZIerx9h3cSC+oDOEcZgkGbOak7Y+u4U28djJA=; b=KiWokQHDLW0xpbqjn/DSGHRWJGsS3gcjCbFYHbaS6vDHiAkiAsj2RzAbW6DyrMcZTuxsYB TayUzl3/E2Ph6tLsGOa5JejqyWIr2ijEclDoI3DjD6FpQX+YoSHPd81ckiK+3ayEnCa/8G Ev078BJF82F9vQYa7eGu+Gu4GUWO4vg= X-MC-Unique: er88v9eSOWGEK41uH8U2Sg-1 X-Mimecast-MFC-AGG-ID: er88v9eSOWGEK41uH8U2Sg_1772732900 From: =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= To: qemu-devel@nongnu.org Cc: Markus Armbruster , Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , devel@lists.libvirt.org, qemu-rust@nongnu.org, "Dr. David Alan Gilbert" , Gerd Hoffmann , Christian Schoenebeck , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Manos Pitsidianakis , Eduardo Habkost , Pierrick Bouvier , Paolo Bonzini , Stefan Weil , Zhao Liu Subject: [PULL 05/27] docs: simplify DiamondRapids CPU docs Date: Thu, 5 Mar 2026 17:47:21 +0000 Message-ID: <20260305174743.3084606-6-berrange@redhat.com> In-Reply-To: <20260305174743.3084606-1-berrange@redhat.com> References: <20260305174743.3084606-1-berrange@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.0 on 10.30.177.17 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=berrange@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -5 X-Spam_score: -0.6 X-Spam_bar: / X-Spam_report: (-0.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.892, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.622, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1772733037801158500 This aligns the first line of the docs with the style used for previous CPU models, and simplifies the text in the remaining docs. Reviewed-by: Pierrick Bouvier Reviewed-by: Zhao Liu Signed-off-by: Daniel P. Berrang=C3=A9 --- docs/system/cpu-models-x86.rst.inc | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-) diff --git a/docs/system/cpu-models-x86.rst.inc b/docs/system/cpu-models-x8= 6.rst.inc index 3605d05a8c..126c5a1972 100644 --- a/docs/system/cpu-models-x86.rst.inc +++ b/docs/system/cpu-models-x86.rst.inc @@ -72,17 +72,13 @@ compatibility is required, use the newest CPU model tha= t is compatible across all desired hosts. =20 ``DiamondRapids`` - Intel Xeon Processor. + Intel Xeon Processor (DiamondRapids, 2026) =20 - Diamond Rapids product has a topology which differs from previous Xeon - products. It does not support SMT, but instead features a dual core - module (DCM) architecture. It also has core building blocks (CBB - die - level in CPU topology). The cache hierarchy is organized as follows: - L1 i/d cache is per thread, L2 cache is per DCM, and L3 cache is per - CBB. This cache topology can be emulated for DiamondRapids CPU model - using the smp-cache configuration as shown below: - - Example: + This does not include SMT but allows the module (dual core module + - DCM) and die (core building block - CBB) topology levels. The + cache hierarchy is L1 i/d cache per thread, L2 cache per module, + and L3 cache per die, which can be emulated using the smp-cache + option: =20 :: =20 --=20 2.53.0