From nobody Mon Feb 2 07:27:05 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1767841625; cv=none; d=zohomail.com; s=zohoarc; b=NtyD+Ho6qRZR/ciiRkPWGphpioV8RCtyjUQkjhCdJd6SbygSLkKphVYfUVMN77aQ74C/4l5rpK8Jn9RdiMqDT2i5aolDJEA+RssgL1lgGQkIFmIZs8VgF6ubmrG77LwVgmu5onBtDNJC3Dm+0hyiOgdGj5hvaOt2nShna7tJkZs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1767841625; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=EI9gbY1CaxwBSAiBt6/u77NPg+TKKu1RjGWjDhUGd5s=; b=P/hBblOqz3g9pMjSHzE8aVfiXHWrfOrp8gkUD4JyUG7x9H+W+rMh4ywREme14Va5EZEoizyMJRt5YPoHKRKZm30boRdXa2dVNNs8Xpqzr2FdJusoHziWHGU0T4InvFpZZ4/sDdT2hHsIRoVFr/d/5MtscIkrCWQ84mM0e749vjk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 17678416254231006.232753317908; Wed, 7 Jan 2026 19:07:05 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vdgLQ-0006dG-Ty; Wed, 07 Jan 2026 22:05:52 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vdgLN-0006c2-Iw; Wed, 07 Jan 2026 22:05:49 -0500 Received: from mgamail.intel.com ([198.175.65.9]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vdgLL-0004nn-TZ; Wed, 07 Jan 2026 22:05:49 -0500 Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jan 2026 19:05:47 -0800 Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.39]) by orviesa006.jf.intel.com with ESMTP; 07 Jan 2026 19:05:37 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1767841549; x=1799377549; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=sC2TimUoEZyzkwnU9qkeCub4FiWSqIV2ZeA71FBODSU=; b=HJX3T7qq454w0gEyxzNsqiLs5UxI8ggau5HII76jSgdtyKrrgdeCWWMZ Xn87Sy+ZGVQgYSlEU6ID80HgmzL23DoLhik8SnKJTHW2dAHpU5eQnQwOM G90Igg+ZUHPBtegpwVrMtCXep1vhEbUnjGwpD+pqdAhISsJq5my6f9rI8 7tme3LTz15++/PpDVLXUhAp7FQ/OlT9MDcfq72Crr8gLIDGU0LBTdY+4O Q3gJLxi0edoyxyjuMuUKbEiBa5YRO0sgQKkPHC0Y5VS0CY8HFoQVD+QBK 80aojj6PgSzvtJUueOR08ZTxZo7qLOHaccPGD1NoxmMLtZfYHS0OhIMZ/ A==; X-CSE-ConnectionGUID: BUfYhk0+QoyNMRSC91oGkQ== X-CSE-MsgGUID: RwD5EvZfSjeX82RU+sEGgw== X-IronPort-AV: E=McAfee;i="6800,10657,11664"; a="91876905" X-IronPort-AV: E=Sophos;i="6.21,209,1763452800"; d="scan'208";a="91876905" X-CSE-ConnectionGUID: xZVaV3FaSOCzS+IH/Lh2Og== X-CSE-MsgGUID: mBgmgwvKSEuLYKJ+Bwq06A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,209,1763452800"; d="scan'208";a="202210503" From: Zhao Liu To: Paolo Bonzini , "Michael S . Tsirkin" , Igor Mammedov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Thomas Huth Cc: qemu-devel@nongnu.org, devel@lists.libvirt.org, kvm@vger.kernel.org, qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Richard Henderson , Sergio Lopez , Gerd Hoffmann , Peter Maydell , Laurent Vivier , Jiaxun Yang , Yi Liu , Eduardo Habkost , Alistair Francis , Daniel Henrique Barboza , Marcelo Tosatti , Weiwei Li , Amit Shah , Xiaoyao Li , Yanan Wang , Helge Deller , Palmer Dabbelt , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Ani Sinha , Fabiano Rosas , Liu Zhiwei , =?UTF-8?q?Cl=C3=A9ment=20Mathieu--Drif?= , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Huacai Chen , Jason Wang , Mark Cave-Ayland , BALATON Zoltan , Peter Krempa , Jiri Denemark , Zhao Liu Subject: [PATCH v6 01/27] hw/i386/pc: Remove deprecated pc-q35-2.6 and pc-i440fx-2.6 machines Date: Thu, 8 Jan 2026 11:30:25 +0800 Message-Id: <20260108033051.777361-2-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260108033051.777361-1-zhao1.liu@intel.com> References: <20260108033051.777361-1-zhao1.liu@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.9; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1767841627771158501 From: Philippe Mathieu-Daud=C3=A9 These machines has been supported for a period of more than 6 years. According to our versioned machine support policy (see commit ce80c4fa6ff "docs: document special exception for machine type deprecation & removal") they can now be removed. Reviewed-by: Mark Cave-Ayland Reviewed-by: Thomas Huth Reviewed-by: Zhao Liu Reviewed-by: Igor Mammedov Signed-off-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Zhao Liu --- hw/i386/pc_piix.c | 14 -------------- hw/i386/pc_q35.c | 14 -------------- 2 files changed, 28 deletions(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 2e2671d60502..fa1025dcfd85 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -733,20 +733,6 @@ static void pc_i440fx_machine_2_7_options(MachineClass= *m) =20 DEFINE_I440FX_MACHINE(2, 7); =20 -static void pc_i440fx_machine_2_6_options(MachineClass *m) -{ - X86MachineClass *x86mc =3D X86_MACHINE_CLASS(m); - PCMachineClass *pcmc =3D PC_MACHINE_CLASS(m); - - pc_i440fx_machine_2_7_options(m); - pcmc->legacy_cpu_hotplug =3D true; - x86mc->fwcfg_dma_enabled =3D false; - compat_props_add(m->compat_props, hw_compat_2_6, hw_compat_2_6_len); - compat_props_add(m->compat_props, pc_compat_2_6, pc_compat_2_6_len); -} - -DEFINE_I440FX_MACHINE(2, 6); - #ifdef CONFIG_XEN static void xenfv_machine_4_2_options(MachineClass *m) { diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 18158ad15e41..7214a4232ffc 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -681,17 +681,3 @@ static void pc_q35_machine_2_7_options(MachineClass *m) } =20 DEFINE_Q35_MACHINE(2, 7); - -static void pc_q35_machine_2_6_options(MachineClass *m) -{ - X86MachineClass *x86mc =3D X86_MACHINE_CLASS(m); - PCMachineClass *pcmc =3D PC_MACHINE_CLASS(m); - - pc_q35_machine_2_7_options(m); - pcmc->legacy_cpu_hotplug =3D true; - x86mc->fwcfg_dma_enabled =3D false; - compat_props_add(m->compat_props, hw_compat_2_6, hw_compat_2_6_len); - compat_props_add(m->compat_props, pc_compat_2_6, pc_compat_2_6_len); -} - -DEFINE_Q35_MACHINE(2, 6); --=20 2.34.1 From nobody Mon Feb 2 07:27:05 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1767841669; cv=none; d=zohomail.com; s=zohoarc; b=FmxliRjwxRqm+Iq2nOmN1YOBRRN5w9PxwHutZzvGBg3/5+F1+kh8LKh73Gf4dX6GypmkbkeX0IZx+X79Gj9c+tG9If9ro2toyOxQYekNvceNlfmbkNJgymZMYGm708827IVs9gVKIP6NRT2Hw9ZIPJuSdMM2lmByb7Dj1KV1XyQ= ARC-Message-Signature: i=1; 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Tsirkin" , Igor Mammedov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Thomas Huth Cc: qemu-devel@nongnu.org, devel@lists.libvirt.org, kvm@vger.kernel.org, qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Richard Henderson , Sergio Lopez , Gerd Hoffmann , Peter Maydell , Laurent Vivier , Jiaxun Yang , Yi Liu , Eduardo Habkost , Alistair Francis , Daniel Henrique Barboza , Marcelo Tosatti , Weiwei Li , Amit Shah , Xiaoyao Li , Yanan Wang , Helge Deller , Palmer Dabbelt , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Ani Sinha , Fabiano Rosas , Liu Zhiwei , =?UTF-8?q?Cl=C3=A9ment=20Mathieu--Drif?= , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Huacai Chen , Jason Wang , Mark Cave-Ayland , BALATON Zoltan , Peter Krempa , Jiri Denemark , Zhao Liu Subject: [PATCH v6 02/27] tests/acpi: Allow DSDT table change for x86 machines Date: Thu, 8 Jan 2026 11:30:26 +0800 Message-Id: <20260108033051.777361-3-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260108033051.777361-1-zhao1.liu@intel.com> References: <20260108033051.777361-1-zhao1.liu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.9; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1767841672406158500 Content-Type: text/plain; charset="utf-8" From: Igor Mammedov Before dropping legacy CPU hotplug code, mark and allow the affected ACPI tables, to avoid breaking ACPI table testing. Signed-off-by: Igor Mammedov Signed-off-by: Zhao Liu --- Changes since v4: * New patch split off from Igor's v5 [*]. [*]: https://lore.kernel.org/qemu-devel/20251031142825.179239-1-imammedo@re= dhat.com/ --- tests/qtest/bios-tables-test-allowed-diff.h | 42 +++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios= -tables-test-allowed-diff.h index dfb8523c8bf4..eed8ded69335 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1 +1,43 @@ /* List of comma-separated changed AML files to ignore */ +"tests/data/acpi/x86/pc/DSDT", +"tests/data/acpi/x86/pc/DSDT.bridge", +"tests/data/acpi/x86/pc/DSDT.ipmikcs", +"tests/data/acpi/x86/pc/DSDT.cphp", +"tests/data/acpi/x86/pc/DSDT.numamem", +"tests/data/acpi/x86/pc/DSDT.nohpet", +"tests/data/acpi/x86/pc/DSDT.memhp", +"tests/data/acpi/x86/pc/DSDT.dimmpxm", +"tests/data/acpi/x86/pc/DSDT.acpihmat", +"tests/data/acpi/x86/pc/DSDT.acpierst", +"tests/data/acpi/x86/pc/DSDT.roothp", +"tests/data/acpi/x86/pc/DSDT.hpbridge", +"tests/data/acpi/x86/pc/DSDT.hpbrroot", +"tests/data/acpi/x86/q35/DSDT", +"tests/data/acpi/x86/q35/DSDT.tis.tpm2", +"tests/data/acpi/x86/q35/DSDT.tis.tpm12", +"tests/data/acpi/x86/q35/DSDT.bridge", +"tests/data/acpi/x86/q35/DSDT.noacpihp", +"tests/data/acpi/x86/q35/DSDT.multi-bridge", +"tests/data/acpi/x86/q35/DSDT.ipmibt", +"tests/data/acpi/x86/q35/DSDT.cphp", +"tests/data/acpi/x86/q35/DSDT.numamem", +"tests/data/acpi/x86/q35/DSDT.nohpet", +"tests/data/acpi/x86/q35/DSDT.acpihmat-noinitiator", +"tests/data/acpi/x86/q35/DSDT.acpihmat-generic-x", +"tests/data/acpi/x86/q35/DSDT.memhp", +"tests/data/acpi/x86/q35/DSDT.dimmpxm", +"tests/data/acpi/x86/q35/DSDT.acpihmat", +"tests/data/acpi/x86/q35/DSDT.mmio64", +"tests/data/acpi/x86/q35/DSDT.acpierst", +"tests/data/acpi/x86/q35/DSDT.applesmc", +"tests/data/acpi/x86/q35/DSDT.pvpanic-isa", +"tests/data/acpi/x86/q35/DSDT.ivrs", +"tests/data/acpi/x86/q35/DSDT.type4-count", +"tests/data/acpi/x86/q35/DSDT.core-count", +"tests/data/acpi/x86/q35/DSDT.core-count2", +"tests/data/acpi/x86/q35/DSDT.thread-count", +"tests/data/acpi/x86/q35/DSDT.thread-count2", +"tests/data/acpi/x86/q35/DSDT.viot", +"tests/data/acpi/x86/q35/DSDT.cxl", +"tests/data/acpi/x86/q35/DSDT.ipmismbus", +"tests/data/acpi/x86/q35/DSDT.xapic", --=20 2.34.1 From nobody Mon Feb 2 07:27:05 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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d="scan'208";a="202210572" From: Zhao Liu To: Paolo Bonzini , "Michael S . Tsirkin" , Igor Mammedov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Thomas Huth Cc: qemu-devel@nongnu.org, devel@lists.libvirt.org, kvm@vger.kernel.org, qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Richard Henderson , Sergio Lopez , Gerd Hoffmann , Peter Maydell , Laurent Vivier , Jiaxun Yang , Yi Liu , Eduardo Habkost , Alistair Francis , Daniel Henrique Barboza , Marcelo Tosatti , Weiwei Li , Amit Shah , Xiaoyao Li , Yanan Wang , Helge Deller , Palmer Dabbelt , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Ani Sinha , Fabiano Rosas , Liu Zhiwei , =?UTF-8?q?Cl=C3=A9ment=20Mathieu--Drif?= , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Huacai Chen , Jason Wang , Mark Cave-Ayland , BALATON Zoltan , Peter Krempa , Jiri Denemark , Zhao Liu Subject: [PATCH v6 03/27] pc: Start with modern CPU hotplug interface by default Date: Thu, 8 Jan 2026 11:30:27 +0800 Message-Id: <20260108033051.777361-4-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260108033051.777361-1-zhao1.liu@intel.com> References: <20260108033051.777361-1-zhao1.liu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.9; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1767841732348158500 Content-Type: text/plain; charset="utf-8" For compatibility reasons PC/Q35 will start with legacy CPU hotplug interface by default but with new CPU hotplug AML code since 2.7 machine type (in commit 679dd1a957df ("pc: use new CPU hotplug interface since 2.7 machine type")). In that way, legacy firmware that doesn't use QEMU generated ACPI tables was able to continue using legacy CPU hotplug interface. While later machine types, with firmware supporting QEMU provided ACPI tables, generate new CPU hotplug AML, which will switch to new CPU hotplug interface when guest OS executes its _INI method on ACPI tables loading. Since 2.6 machine type is now gone, and consider that the legacy BIOS (based on QEMU ACPI prior to v2.7) should be no longer in use, previous compatibility requirements are no longer necessary. So initialize 'modern' hotplug directly from the very beginning for PC/Q35 machines with cpu_hotplug_hw_init(), and drop _INIT method. Additionally, remove the checks and settings around cpu_hotplug_legacy in cpuhp VMState (for piix4 & ich9), to eliminate the risk of segmentation faults, as gpe_cpu no longer has the opportunity to be initialized. This is safe because all hotplug now start with the modern way, and it's impossible to switch to legacy way at runtime (even the "cpu-hotplug-legacy" properties does not allow it either). Signed-off-by: Igor Mammedov Signed-off-by: Zhao Liu Acked-by: Igor Mammedov --- Changes since v4: * New patch split off from Igor's v5 [*]. [*]: https://lore.kernel.org/qemu-devel/20251031142825.179239-1-imammedo@re= dhat.com/ --- hw/acpi/cpu.c | 10 ---------- hw/acpi/ich9.c | 22 +++------------------- hw/acpi/piix4.c | 21 +++------------------ hw/i386/acpi-build.c | 2 +- hw/loongarch/virt-acpi-build.c | 1 - include/hw/acpi/cpu.h | 1 - 6 files changed, 7 insertions(+), 50 deletions(-) diff --git a/hw/acpi/cpu.c b/hw/acpi/cpu.c index 6f1ae79edbf3..d63ca83c1bcd 100644 --- a/hw/acpi/cpu.c +++ b/hw/acpi/cpu.c @@ -408,16 +408,6 @@ void build_cpus_aml(Aml *table, MachineState *machine,= CPUHotplugFeatures opts, aml_append(field, aml_reserved_field(4 * 8)); aml_append(field, aml_named_field(CPU_DATA, 32)); aml_append(cpu_ctrl_dev, field); - - if (opts.has_legacy_cphp) { - method =3D aml_method("_INI", 0, AML_SERIALIZED); - /* switch off legacy CPU hotplug HW and use new one, - * on reboot system is in new mode and writing 0 - * in CPU_SELECTOR selects BSP, which is NOP at - * the time _INI is called */ - aml_append(method, aml_store(zero, aml_name(CPU_SELECTOR))); - aml_append(cpu_ctrl_dev, method); - } } aml_append(sb_scope, cpu_ctrl_dev); =20 diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c index 2b3b493c014b..54590129c695 100644 --- a/hw/acpi/ich9.c +++ b/hw/acpi/ich9.c @@ -183,26 +183,10 @@ static const VMStateDescription vmstate_tco_io_state = =3D { } }; =20 -static bool vmstate_test_use_cpuhp(void *opaque) -{ - ICH9LPCPMRegs *s =3D opaque; - return !s->cpu_hotplug_legacy; -} - -static int vmstate_cpuhp_pre_load(void *opaque) -{ - ICH9LPCPMRegs *s =3D opaque; - Object *obj =3D OBJECT(s->gpe_cpu.device); - object_property_set_bool(obj, "cpu-hotplug-legacy", false, &error_abor= t); - return 0; -} - static const VMStateDescription vmstate_cpuhp_state =3D { .name =3D "ich9_pm/cpuhp", .version_id =3D 1, .minimum_version_id =3D 1, - .needed =3D vmstate_test_use_cpuhp, - .pre_load =3D vmstate_cpuhp_pre_load, .fields =3D (const VMStateField[]) { VMSTATE_CPU_HOTPLUG(cpuhp_state, ICH9LPCPMRegs), VMSTATE_END_OF_LIST() @@ -338,8 +322,8 @@ void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm= , qemu_irq sci_irq) pm->powerdown_notifier.notify =3D pm_powerdown_req; qemu_register_powerdown_notifier(&pm->powerdown_notifier); =20 - legacy_acpi_cpu_hotplug_init(pci_address_space_io(lpc_pci), - OBJECT(lpc_pci), &pm->gpe_cpu, ICH9_CPU_HOTPLUG_IO_BASE); + cpu_hotplug_hw_init(pci_address_space_io(lpc_pci), + OBJECT(lpc_pci), &pm->cpuhp_state, ICH9_CPU_HOTPLUG_IO_BASE); =20 acpi_memory_hotplug_init(pci_address_space_io(lpc_pci), OBJECT(lpc_pci= ), &pm->acpi_memory_hotplug, @@ -419,7 +403,7 @@ void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs = *pm) { static const uint32_t gpe0_len =3D ICH9_PMIO_GPE0_LEN; pm->acpi_memory_hotplug.is_enabled =3D true; - pm->cpu_hotplug_legacy =3D true; + pm->cpu_hotplug_legacy =3D false; pm->disable_s3 =3D 0; pm->disable_s4 =3D 0; pm->s4_val =3D 2; diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c index 19d4d4be9329..0eda692084d3 100644 --- a/hw/acpi/piix4.c +++ b/hw/acpi/piix4.c @@ -195,25 +195,10 @@ static const VMStateDescription vmstate_memhp_state = =3D { } }; =20 -static bool vmstate_test_use_cpuhp(void *opaque) -{ - PIIX4PMState *s =3D opaque; - return !s->cpu_hotplug_legacy; -} - -static int vmstate_cpuhp_pre_load(void *opaque) -{ - Object *obj =3D OBJECT(opaque); - object_property_set_bool(obj, "cpu-hotplug-legacy", false, &error_abor= t); - return 0; -} - static const VMStateDescription vmstate_cpuhp_state =3D { .name =3D "piix4_pm/cpuhp", .version_id =3D 1, .minimum_version_id =3D 1, - .needed =3D vmstate_test_use_cpuhp, - .pre_load =3D vmstate_cpuhp_pre_load, .fields =3D (const VMStateField[]) { VMSTATE_CPU_HOTPLUG(cpuhp_state, PIIX4PMState), VMSTATE_END_OF_LIST() @@ -573,12 +558,12 @@ static void piix4_acpi_system_hot_add_init(MemoryRegi= on *parent, qbus_set_hotplug_handler(BUS(pci_get_bus(PCI_DEVICE(s))), OBJECT(s= )); } =20 - s->cpu_hotplug_legacy =3D true; + s->cpu_hotplug_legacy =3D false; object_property_add_bool(OBJECT(s), "cpu-hotplug-legacy", piix4_get_cpu_hotplug_legacy, piix4_set_cpu_hotplug_legacy); - legacy_acpi_cpu_hotplug_init(parent, OBJECT(s), &s->gpe_cpu, - PIIX4_CPU_HOTPLUG_IO_BASE); + cpu_hotplug_hw_init(parent, OBJECT(s), &s->cpuhp_state, + PIIX4_CPU_HOTPLUG_IO_BASE); =20 if (s->acpi_memory_hotplug.is_enabled) { acpi_memory_hotplug_init(parent, OBJECT(s), &s->acpi_memory_hotplu= g, diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 9446a9f862ca..23147ddc25e7 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -964,7 +964,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, build_legacy_cpu_hotplug_aml(dsdt, machine, pm->cpu_hp_io_base); } else { CPUHotplugFeatures opts =3D { - .acpi_1_compatible =3D true, .has_legacy_cphp =3D true, + .acpi_1_compatible =3D true, .smi_path =3D pm->smi_on_cpuhp ? "\\_SB.PCI0.SMI0.SMIC" : NULL, .fw_unplugs_cpu =3D pm->smi_on_cpu_unplug, }; diff --git a/hw/loongarch/virt-acpi-build.c b/hw/loongarch/virt-acpi-build.c index 8ff9ebdcd9ed..beed6dcb8f89 100644 --- a/hw/loongarch/virt-acpi-build.c +++ b/hw/loongarch/virt-acpi-build.c @@ -369,7 +369,6 @@ build_la_ged_aml(Aml *dsdt, MachineState *machine) =20 if (event & ACPI_GED_CPU_HOTPLUG_EVT) { opts.acpi_1_compatible =3D false; - opts.has_legacy_cphp =3D false; opts.fw_unplugs_cpu =3D false; opts.smi_path =3D NULL; =20 diff --git a/include/hw/acpi/cpu.h b/include/hw/acpi/cpu.h index 557219d2c638..2809dd8a911e 100644 --- a/include/hw/acpi/cpu.h +++ b/include/hw/acpi/cpu.h @@ -54,7 +54,6 @@ void cpu_hotplug_hw_init(MemoryRegion *as, Object *owner, =20 typedef struct CPUHotplugFeatures { bool acpi_1_compatible; - bool has_legacy_cphp; bool fw_unplugs_cpu; const char *smi_path; } CPUHotplugFeatures; --=20 2.34.1 From nobody Mon Feb 2 07:27:05 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1767841642; cv=none; d=zohomail.com; s=zohoarc; b=Hinvva4PQUYjkkbXKfMmSYtUL8MGA7xORHPn5mllb8YA5qxbDQ8xYuBXAQh6/oMDsgLVNCkNwyeT5tBUvzLyD2kSfMz1xsDHkf2Igjl750oW0iFZqCt16TZxdYacJWCuMZhkumhD6yasQP/4B6eXS3uI8yl6ICfJjlHnr/vuLPs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1767841642; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=c3TGdsMiNGmmAOTBAnd2IYUjdGtOpjwPe6jj7mexzjo=; b=V2m68c+k152FQLjH2JlbWUaG1J/kRR2iJryTLawRAJ2JgdImawmOwWtZuuTmK2A0Xeoe5Jyg2mq1Ku+RWN66xuqL4o7fZCbzDz9O+gz+tvhHhN6ImvmVfIFRgEuUASWULLNm5YXUgErmVSRcJhGztVVXlNfGSFhprLTi0Si77cs= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1767841642884469.05583298894373; Wed, 7 Jan 2026 19:07:22 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vdgLu-0006q5-Gh; Wed, 07 Jan 2026 22:06:22 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vdgLr-0006m4-DN; Wed, 07 Jan 2026 22:06:19 -0500 Received: from mgamail.intel.com ([198.175.65.9]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vdgLp-0004vX-3v; Wed, 07 Jan 2026 22:06:19 -0500 Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jan 2026 19:06:15 -0800 Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.39]) by orviesa006.jf.intel.com with ESMTP; 07 Jan 2026 19:06:05 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1767841578; x=1799377578; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=a1ICcoG/sdPEZBhfNZMIZQHiXJHJ1kxZx56nCigH7eM=; b=PjHCX1Y5TDcqdJBZ3BIfC7SfTrO8fqHqA/VRr8qZo/uRrNhmpA3XZvDO uCsrbE4S87N7zC1nWFwrRzkdv42LThzX2ysbzlrxETeOmH06y2OeP0woe AZy6h5qx4jnn0ngKm2H2QcWMCEW4YgiiTct+EimBc77AdvFaBBph42vII a3jW+TWWu0V1z0ninqz8S5SZhfDWsYuJuG3eaQasZ4rSnKW8VuQ5zqpHe DGaHaLx5FbIVPUqIDbwYanots+Jms/4JJF2uLZUiLrUQx7i7QSB8LYD5r TvJ4+lK0RVEPiKeIaCvtyh7vXc/iQDTJyNU0FwIg/ryPug1yQYLm+dRrT Q==; X-CSE-ConnectionGUID: Gd/cDavORI24BAshRhq9Kw== X-CSE-MsgGUID: e2C21tAJT1+k6cp/qii+aA== X-IronPort-AV: E=McAfee;i="6800,10657,11664"; a="91877014" X-IronPort-AV: E=Sophos;i="6.21,209,1763452800"; d="scan'208";a="91877014" X-CSE-ConnectionGUID: NGU+oToITJKS8JMAp4mXWw== X-CSE-MsgGUID: Z8PrBmNGScGOPr1prHU5Vw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,209,1763452800"; d="scan'208";a="202210617" From: Zhao Liu To: Paolo Bonzini , "Michael S . Tsirkin" , Igor Mammedov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Thomas Huth Cc: qemu-devel@nongnu.org, devel@lists.libvirt.org, kvm@vger.kernel.org, qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Richard Henderson , Sergio Lopez , Gerd Hoffmann , Peter Maydell , Laurent Vivier , Jiaxun Yang , Yi Liu , Eduardo Habkost , Alistair Francis , Daniel Henrique Barboza , Marcelo Tosatti , Weiwei Li , Amit Shah , Xiaoyao Li , Yanan Wang , Helge Deller , Palmer Dabbelt , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Ani Sinha , Fabiano Rosas , Liu Zhiwei , =?UTF-8?q?Cl=C3=A9ment=20Mathieu--Drif?= , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Huacai Chen , Jason Wang , Mark Cave-Ayland , BALATON Zoltan , Peter Krempa , Jiri Denemark , Zhao Liu Subject: [PATCH v6 04/27] hw/i386/pc: Remove PCMachineClass::legacy_cpu_hotplug field Date: Thu, 8 Jan 2026 11:30:28 +0800 Message-Id: <20260108033051.777361-5-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260108033051.777361-1-zhao1.liu@intel.com> References: <20260108033051.777361-1-zhao1.liu@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.9; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1767841643966158500 From: Philippe Mathieu-Daud=C3=A9 Now all PC & Q35 machiens are using modern hotplug from the beginning, and all legacy_cpu_hotplug flags keep false during runtime. So it's safe to remove legacy_cpu_hotplug flags and related properties, with unused gpe_cpu field. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Igor Mammedov Signed-off-by: Zhao Liu Acked-by: Igor Mammedov --- Changes since v4: * Referring Igor's v5 [*], drop gpe_cpu field and does not only remove build_legacy_cpu_hotplug_aml(), but instead remove the entire cpu_hotplug.c file in a separate patch. [*]: https://lore.kernel.org/qemu-devel/20251031142825.179239-1-imammedo@re= dhat.com/ --- hw/acpi/ich9.c | 40 ++++------------------------------------ hw/acpi/piix4.c | 40 ++++------------------------------------ hw/i386/acpi-build.c | 4 +--- include/hw/acpi/ich9.h | 2 -- include/hw/acpi/piix4.h | 2 -- include/hw/i386/pc.h | 3 --- 6 files changed, 9 insertions(+), 82 deletions(-) diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c index 54590129c695..f254f3879716 100644 --- a/hw/acpi/ich9.c +++ b/hw/acpi/ich9.c @@ -339,26 +339,6 @@ static void ich9_pm_get_gpe0_blk(Object *obj, Visitor = *v, const char *name, visit_type_uint32(v, name, &value, errp); } =20 -static bool ich9_pm_get_cpu_hotplug_legacy(Object *obj, Error **errp) -{ - ICH9LPCState *s =3D ICH9_LPC_DEVICE(obj); - - return s->pm.cpu_hotplug_legacy; -} - -static void ich9_pm_set_cpu_hotplug_legacy(Object *obj, bool value, - Error **errp) -{ - ICH9LPCState *s =3D ICH9_LPC_DEVICE(obj); - - assert(!value); - if (s->pm.cpu_hotplug_legacy && value =3D=3D false) { - acpi_switch_to_modern_cphp(&s->pm.gpe_cpu, &s->pm.cpuhp_state, - ICH9_CPU_HOTPLUG_IO_BASE); - } - s->pm.cpu_hotplug_legacy =3D value; -} - static bool ich9_pm_get_enable_tco(Object *obj, Error **errp) { ICH9LPCState *s =3D ICH9_LPC_DEVICE(obj); @@ -403,7 +383,6 @@ void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs = *pm) { static const uint32_t gpe0_len =3D ICH9_PMIO_GPE0_LEN; pm->acpi_memory_hotplug.is_enabled =3D true; - pm->cpu_hotplug_legacy =3D false; pm->disable_s3 =3D 0; pm->disable_s4 =3D 0; pm->s4_val =3D 2; @@ -422,9 +401,6 @@ void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs = *pm) NULL, NULL, pm); object_property_add_uint32_ptr(obj, ACPI_PM_PROP_GPE0_BLK_LEN, &gpe0_len, OBJ_PROP_FLAG_READ); - object_property_add_bool(obj, "cpu-hotplug-legacy", - ich9_pm_get_cpu_hotplug_legacy, - ich9_pm_set_cpu_hotplug_legacy); object_property_add_uint8_ptr(obj, ACPI_PM_PROP_S3_DISABLED, &pm->disable_s3, OBJ_PROP_FLAG_READWRITE= ); object_property_add_uint8_ptr(obj, ACPI_PM_PROP_S4_DISABLED, @@ -477,11 +453,7 @@ void ich9_pm_device_plug_cb(HotplugHandler *hotplug_de= v, DeviceState *dev, dev, errp); } } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { - if (lpc->pm.cpu_hotplug_legacy) { - legacy_acpi_cpu_plug_cb(hotplug_dev, &lpc->pm.gpe_cpu, dev, er= rp); - } else { - acpi_cpu_plug_cb(hotplug_dev, &lpc->pm.cpuhp_state, dev, errp); - } + acpi_cpu_plug_cb(hotplug_dev, &lpc->pm.cpuhp_state, dev, errp); } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { acpi_pcihp_device_plug_cb(hotplug_dev, &lpc->pm.acpi_pci_hotplug, dev, errp); @@ -500,8 +472,7 @@ void ich9_pm_device_unplug_request_cb(HotplugHandler *h= otplug_dev, acpi_memory_unplug_request_cb(hotplug_dev, &lpc->pm.acpi_memory_hotplug, dev, errp); - } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU) && - !lpc->pm.cpu_hotplug_legacy) { + } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { uint64_t negotiated =3D lpc->smi_negotiated_features; =20 if (negotiated & BIT_ULL(ICH9_LPC_SMI_F_BROADCAST_BIT) && @@ -533,8 +504,7 @@ void ich9_pm_device_unplug_cb(HotplugHandler *hotplug_d= ev, DeviceState *dev, =20 if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { acpi_memory_unplug_cb(&lpc->pm.acpi_memory_hotplug, dev, errp); - } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU) && - !lpc->pm.cpu_hotplug_legacy) { + } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { acpi_cpu_unplug_cb(&lpc->pm.cpuhp_state, dev, errp); } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { acpi_pcihp_device_unplug_cb(hotplug_dev, &lpc->pm.acpi_pci_hotplug, @@ -556,7 +526,5 @@ void ich9_pm_ospm_status(AcpiDeviceIf *adev, ACPIOSTInf= oList ***list) ICH9LPCState *s =3D ICH9_LPC_DEVICE(adev); =20 acpi_memory_ospm_status(&s->pm.acpi_memory_hotplug, list); - if (!s->pm.cpu_hotplug_legacy) { - acpi_cpu_ospm_status(&s->pm.cpuhp_state, list); - } + acpi_cpu_ospm_status(&s->pm.cpuhp_state, list); } diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c index 0eda692084d3..05f9d6372a9b 100644 --- a/hw/acpi/piix4.c +++ b/hw/acpi/piix4.c @@ -336,11 +336,7 @@ static void piix4_device_plug_cb(HotplugHandler *hotpl= ug_dev, } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { acpi_pcihp_device_plug_cb(hotplug_dev, &s->acpi_pci_hotplug, dev, = errp); } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { - if (s->cpu_hotplug_legacy) { - legacy_acpi_cpu_plug_cb(hotplug_dev, &s->gpe_cpu, dev, errp); - } else { - acpi_cpu_plug_cb(hotplug_dev, &s->cpuhp_state, dev, errp); - } + acpi_cpu_plug_cb(hotplug_dev, &s->cpuhp_state, dev, errp); } else { g_assert_not_reached(); } @@ -358,8 +354,7 @@ static void piix4_device_unplug_request_cb(HotplugHandl= er *hotplug_dev, } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { acpi_pcihp_device_unplug_request_cb(hotplug_dev, &s->acpi_pci_hotp= lug, dev, errp); - } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU) && - !s->cpu_hotplug_legacy) { + } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { acpi_cpu_unplug_request_cb(hotplug_dev, &s->cpuhp_state, dev, errp= ); } else { error_setg(errp, "acpi: device unplug request for not supported de= vice" @@ -378,8 +373,7 @@ static void piix4_device_unplug_cb(HotplugHandler *hotp= lug_dev, } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { acpi_pcihp_device_unplug_cb(hotplug_dev, &s->acpi_pci_hotplug, dev, errp); - } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU) && - !s->cpu_hotplug_legacy) { + } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { acpi_cpu_unplug_cb(&s->cpuhp_state, dev, errp); } else { error_setg(errp, "acpi: device unplug for not supported device" @@ -523,26 +517,6 @@ static const MemoryRegionOps piix4_gpe_ops =3D { .endianness =3D DEVICE_LITTLE_ENDIAN, }; =20 - -static bool piix4_get_cpu_hotplug_legacy(Object *obj, Error **errp) -{ - PIIX4PMState *s =3D PIIX4_PM(obj); - - return s->cpu_hotplug_legacy; -} - -static void piix4_set_cpu_hotplug_legacy(Object *obj, bool value, Error **= errp) -{ - PIIX4PMState *s =3D PIIX4_PM(obj); - - assert(!value); - if (s->cpu_hotplug_legacy && value =3D=3D false) { - acpi_switch_to_modern_cphp(&s->gpe_cpu, &s->cpuhp_state, - PIIX4_CPU_HOTPLUG_IO_BASE); - } - s->cpu_hotplug_legacy =3D value; -} - static void piix4_acpi_system_hot_add_init(MemoryRegion *parent, PCIBus *bus, PIIX4PMState *s) { @@ -558,10 +532,6 @@ static void piix4_acpi_system_hot_add_init(MemoryRegio= n *parent, qbus_set_hotplug_handler(BUS(pci_get_bus(PCI_DEVICE(s))), OBJECT(s= )); } =20 - s->cpu_hotplug_legacy =3D false; - object_property_add_bool(OBJECT(s), "cpu-hotplug-legacy", - piix4_get_cpu_hotplug_legacy, - piix4_set_cpu_hotplug_legacy); cpu_hotplug_hw_init(parent, OBJECT(s), &s->cpuhp_state, PIIX4_CPU_HOTPLUG_IO_BASE); =20 @@ -576,9 +546,7 @@ static void piix4_ospm_status(AcpiDeviceIf *adev, ACPIO= STInfoList ***list) PIIX4PMState *s =3D PIIX4_PM(adev); =20 acpi_memory_ospm_status(&s->acpi_memory_hotplug, list); - if (!s->cpu_hotplug_legacy) { - acpi_cpu_ospm_status(&s->cpuhp_state, list); - } + acpi_cpu_ospm_status(&s->cpuhp_state, list); } =20 static void piix4_send_gpe(AcpiDeviceIf *adev, AcpiEventStatusBits ev) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 23147ddc25e7..bf7ed2e50837 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -960,9 +960,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, } aml_append(dsdt, scope); =20 - if (pcmc->legacy_cpu_hotplug) { - build_legacy_cpu_hotplug_aml(dsdt, machine, pm->cpu_hp_io_base); - } else { + { CPUHotplugFeatures opts =3D { .acpi_1_compatible =3D true, .smi_path =3D pm->smi_on_cpuhp ? "\\_SB.PCI0.SMI0.SMIC" : NULL, diff --git a/include/hw/acpi/ich9.h b/include/hw/acpi/ich9.h index 245fe08dc245..6a21472eb32e 100644 --- a/include/hw/acpi/ich9.h +++ b/include/hw/acpi/ich9.h @@ -53,8 +53,6 @@ typedef struct ICH9LPCPMRegs { uint32_t pm_io_base; Notifier powerdown_notifier; =20 - bool cpu_hotplug_legacy; - AcpiCpuHotplug gpe_cpu; CPUHotplugState cpuhp_state; =20 bool keep_pci_slot_hpc; diff --git a/include/hw/acpi/piix4.h b/include/hw/acpi/piix4.h index eb1c122d8069..e075f0cbeaf1 100644 --- a/include/hw/acpi/piix4.h +++ b/include/hw/acpi/piix4.h @@ -63,8 +63,6 @@ struct PIIX4PMState { uint8_t disable_s4; uint8_t s4_val; =20 - bool cpu_hotplug_legacy; - AcpiCpuHotplug gpe_cpu; CPUHotplugState cpuhp_state; =20 MemHotplugState acpi_memory_hotplug; diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index b3a45ab71a8b..3f94bc5652a9 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -110,9 +110,6 @@ struct PCMachineClass { bool enforce_amd_1tb_hole; bool isa_bios_alias; =20 - /* generate legacy CPU hotplug AML */ - bool legacy_cpu_hotplug; - /* use PVH to load kernels that support this feature */ bool pvh_enabled; =20 --=20 2.34.1 From nobody Mon Feb 2 07:27:05 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1767841738; cv=none; d=zohomail.com; s=zohoarc; b=LNv0gFzzWhhLixDMFkWqnfSupF3QkM4CVBfzI/n+NZjRALpJpl+Y26xs+M1hv+bbiRtFDTzvGxr3xw0c8ORsHFueFFhPQBNQNmSm+cZO4wulRR/h6FWKbmKsisU32sbGJJXdDSxRoQgpS/iW4MmLVH61y/cb59MOsRRaeBp01kU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1767841738; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=cucQzcSKfOZ/Tvvmkz7PlhLgqnTSNhyhWZL73IhI8xg=; b=Zwi7XIhFFxjInODQmjWuVQrVJG/DL9/OgMBqoShhA+hqsFKSpMHD/W+KfVWvXAdSb84EpwxPH55ck2ZCAGBI5Osba1frOIOnKjCkJJ5PmkodOiaNDNOCCq9xMIspyNvzf27hOpXmOvnNGOBXAAj3UBoifBs6VOlOe2knOHSib/w= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1767841738979820.2583056922358; Wed, 7 Jan 2026 19:08:58 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vdgM3-00077G-DQ; Wed, 07 Jan 2026 22:06:31 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vdgM1-0006xz-FU; Wed, 07 Jan 2026 22:06:29 -0500 Received: from mgamail.intel.com ([198.175.65.9]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vdgLy-0004y8-Dm; Wed, 07 Jan 2026 22:06:29 -0500 Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jan 2026 19:06:24 -0800 Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.39]) by orviesa006.jf.intel.com with ESMTP; 07 Jan 2026 19:06:14 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1767841587; x=1799377587; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=mx/dL+IDNJOtHQOeEz1gLdTNaWGg6GyN6sHNNZGP66g=; b=ZWehBK7M3h/qBnmtriGh48vgO0Y9U2OLVEop9sBj5Js+VfBM+aJur/7Y kJfNg+wW+lwMuxdoTqC4cAgI5hjyBBJfEp7K1LMls5FZ9d9B9E+QHHns1 nhL/XMNIxmMkWGyk6YW5qf5ensJ3vxu+mW9SeUr+iKI2XXwt2p5n1sqzy kQha7OJUkjNS/ya+gAw+jPFGsR8jHEtAfuUJs5Xqlnrk6cu4LrPJyMKwU DlA8uHouAXa27u9O+QbIvDGNsv9MmZ9nCWqXAjlGxTbLHWkJ0EBVtWcQS KVuFewv2SzvBiNbE/4GC6z4oMJNlWrqTJZCl0g/XhDAe1KGmJhzhasgyd g==; X-CSE-ConnectionGUID: oVl8d5bqTEqoQusHV/W62w== X-CSE-MsgGUID: h3kj6GibTRKXKAMGYoRT1w== X-IronPort-AV: E=McAfee;i="6800,10657,11664"; a="91877039" X-IronPort-AV: E=Sophos;i="6.21,209,1763452800"; d="scan'208";a="91877039" X-CSE-ConnectionGUID: lt8bSH+2Sla4s+UtAp15fQ== X-CSE-MsgGUID: //GEWv+QRQSqkeB7sQ6vEQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,209,1763452800"; d="scan'208";a="202210634" From: Zhao Liu To: Paolo Bonzini , "Michael S . Tsirkin" , Igor Mammedov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Thomas Huth Cc: qemu-devel@nongnu.org, devel@lists.libvirt.org, kvm@vger.kernel.org, qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Richard Henderson , Sergio Lopez , Gerd Hoffmann , Peter Maydell , Laurent Vivier , Jiaxun Yang , Yi Liu , Eduardo Habkost , Alistair Francis , Daniel Henrique Barboza , Marcelo Tosatti , Weiwei Li , Amit Shah , Xiaoyao Li , Yanan Wang , Helge Deller , Palmer Dabbelt , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Ani Sinha , Fabiano Rosas , Liu Zhiwei , =?UTF-8?q?Cl=C3=A9ment=20Mathieu--Drif?= , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Huacai Chen , Jason Wang , Mark Cave-Ayland , BALATON Zoltan , Peter Krempa , Jiri Denemark , Zhao Liu Subject: [PATCH v6 05/27] acpi: Remove legacy cpu hotplug utilities Date: Thu, 8 Jan 2026 11:30:29 +0800 Message-Id: <20260108033051.777361-6-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260108033051.777361-1-zhao1.liu@intel.com> References: <20260108033051.777361-1-zhao1.liu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.9; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1767841740386158500 Content-Type: text/plain; charset="utf-8" The cpu_hotplug.h and cpu_hotplug.c contain legacy cpu hotplug utilities. Now there's no use case of legacy cpu hotplug, so it's safe to drop legacy cpu hotplug support totally. Signed-off-by: Igor Mammedov Signed-off-by: Zhao Liu Acked-by: Igor Mammedov --- Changes since v4: * New patch split off from Igor's v5 [*]. [*]: https://lore.kernel.org/qemu-devel/20251031142825.179239-1-imammedo@re= dhat.com/ --- hw/acpi/acpi-cpu-hotplug-stub.c | 19 +- hw/acpi/cpu_hotplug.c | 348 -------------------------------- hw/acpi/generic_event_device.c | 1 + hw/acpi/ich9.c | 1 + hw/acpi/meson.build | 2 +- hw/acpi/piix4.c | 2 +- hw/i386/acpi-build.c | 1 + hw/i386/pc.c | 3 +- hw/i386/x86-common.c | 1 - include/hw/acpi/ich9.h | 2 +- include/hw/acpi/piix4.h | 2 +- 11 files changed, 10 insertions(+), 372 deletions(-) delete mode 100644 hw/acpi/cpu_hotplug.c diff --git a/hw/acpi/acpi-cpu-hotplug-stub.c b/hw/acpi/acpi-cpu-hotplug-stu= b.c index 9872dd55e43f..72c5f05f5c4e 100644 --- a/hw/acpi/acpi-cpu-hotplug-stub.c +++ b/hw/acpi/acpi-cpu-hotplug-stub.c @@ -1,22 +1,10 @@ #include "qemu/osdep.h" -#include "hw/acpi/cpu_hotplug.h" #include "migration/vmstate.h" - +#include "hw/acpi/cpu.h" =20 /* Following stubs are all related to ACPI cpu hotplug */ const VMStateDescription vmstate_cpu_hotplug; =20 -void acpi_switch_to_modern_cphp(AcpiCpuHotplug *gpe_cpu, - CPUHotplugState *cpuhp_state, - uint16_t io_port) -{ -} - -void legacy_acpi_cpu_hotplug_init(MemoryRegion *parent, Object *owner, - AcpiCpuHotplug *gpe_cpu, uint16_t base) -{ -} - void cpu_hotplug_hw_init(MemoryRegion *as, Object *owner, CPUHotplugState *state, hwaddr base_addr) { @@ -31,11 +19,6 @@ void acpi_cpu_plug_cb(HotplugHandler *hotplug_dev, { } =20 -void legacy_acpi_cpu_plug_cb(HotplugHandler *hotplug_dev, - AcpiCpuHotplug *g, DeviceState *dev, Error **= errp) -{ -} - void acpi_cpu_unplug_cb(CPUHotplugState *cpu_st, DeviceState *dev, Error **errp) { diff --git a/hw/acpi/cpu_hotplug.c b/hw/acpi/cpu_hotplug.c deleted file mode 100644 index aa0e1e3efa54..000000000000 --- a/hw/acpi/cpu_hotplug.c +++ /dev/null @@ -1,348 +0,0 @@ -/* - * QEMU ACPI hotplug utilities - * - * Copyright (C) 2013 Red Hat Inc - * - * Authors: - * Igor Mammedov - * - * This work is licensed under the terms of the GNU GPL, version 2 or late= r. - * See the COPYING file in the top-level directory. - */ -#include "qemu/osdep.h" -#include "hw/acpi/cpu_hotplug.h" -#include "qapi/error.h" -#include "hw/core/cpu.h" -#include "hw/i386/x86.h" -#include "hw/pci/pci_device.h" -#include "qemu/error-report.h" - -#define CPU_EJECT_METHOD "CPEJ" -#define CPU_MAT_METHOD "CPMA" -#define CPU_ON_BITMAP "CPON" -#define CPU_STATUS_METHOD "CPST" -#define CPU_STATUS_MAP "PRS" -#define CPU_SCAN_METHOD "PRSC" - -static uint64_t cpu_status_read(void *opaque, hwaddr addr, unsigned int si= ze) -{ - AcpiCpuHotplug *cpus =3D opaque; - uint64_t val =3D cpus->sts[addr]; - - return val; -} - -static void cpu_status_write(void *opaque, hwaddr addr, uint64_t data, - unsigned int size) -{ - /* firmware never used to write in CPU present bitmap so use - this fact as means to switch QEMU into modern CPU hotplug - mode by writing 0 at the beginning of legacy CPU bitmap - */ - if (addr =3D=3D 0 && data =3D=3D 0) { - AcpiCpuHotplug *cpus =3D opaque; - object_property_set_bool(cpus->device, "cpu-hotplug-legacy", false, - &error_abort); - } -} - -static const MemoryRegionOps AcpiCpuHotplug_ops =3D { - .read =3D cpu_status_read, - .write =3D cpu_status_write, - .endianness =3D DEVICE_LITTLE_ENDIAN, - .valid =3D { - .min_access_size =3D 1, - .max_access_size =3D 4, - }, - .impl =3D { - .max_access_size =3D 1, - }, -}; - -static void acpi_set_cpu_present_bit(AcpiCpuHotplug *g, CPUState *cpu, - bool *swtchd_to_modern) -{ - int64_t cpu_id; - - cpu_id =3D cpu->cc->get_arch_id(cpu); - if ((cpu_id / 8) >=3D ACPI_GPE_PROC_LEN) { - object_property_set_bool(g->device, "cpu-hotplug-legacy", false, - &error_abort); - *swtchd_to_modern =3D true; - return; - } - - *swtchd_to_modern =3D false; - g->sts[cpu_id / 8] |=3D (1 << (cpu_id % 8)); -} - -void legacy_acpi_cpu_plug_cb(HotplugHandler *hotplug_dev, - AcpiCpuHotplug *g, DeviceState *dev, Error **= errp) -{ - bool swtchd_to_modern; - Error *local_err =3D NULL; - - acpi_set_cpu_present_bit(g, CPU(dev), &swtchd_to_modern); - if (swtchd_to_modern) { - /* propagate the hotplug to the modern interface */ - hotplug_handler_plug(hotplug_dev, dev, &local_err); - } else { - acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS); - } -} - -void legacy_acpi_cpu_hotplug_init(MemoryRegion *parent, Object *owner, - AcpiCpuHotplug *gpe_cpu, uint16_t base) -{ - CPUState *cpu; - bool swtchd_to_modern; - - memory_region_init_io(&gpe_cpu->io, owner, &AcpiCpuHotplug_ops, - gpe_cpu, "acpi-cpu-hotplug", ACPI_GPE_PROC_LEN); - memory_region_add_subregion(parent, base, &gpe_cpu->io); - gpe_cpu->device =3D owner; - - CPU_FOREACH(cpu) { - acpi_set_cpu_present_bit(gpe_cpu, cpu, &swtchd_to_modern); - } -} - -void acpi_switch_to_modern_cphp(AcpiCpuHotplug *gpe_cpu, - CPUHotplugState *cpuhp_state, - uint16_t io_port) -{ - MemoryRegion *parent =3D pci_address_space_io(PCI_DEVICE(gpe_cpu->devi= ce)); - - memory_region_del_subregion(parent, &gpe_cpu->io); - cpu_hotplug_hw_init(parent, gpe_cpu->device, cpuhp_state, io_port); -} - -void build_legacy_cpu_hotplug_aml(Aml *ctx, MachineState *machine, - uint16_t io_base) -{ - Aml *dev; - Aml *crs; - Aml *pkg; - Aml *field; - Aml *method; - Aml *if_ctx; - Aml *else_ctx; - int i, apic_idx; - Aml *sb_scope =3D aml_scope("_SB"); - uint8_t madt_tmpl[8] =3D {0x00, 0x08, 0x00, 0x00, 0x00, 0, 0, 0}; - Aml *cpu_id =3D aml_arg(1); - Aml *apic_id =3D aml_arg(0); - Aml *cpu_on =3D aml_local(0); - Aml *madt =3D aml_local(1); - Aml *cpus_map =3D aml_name(CPU_ON_BITMAP); - Aml *zero =3D aml_int(0); - Aml *one =3D aml_int(1); - MachineClass *mc =3D MACHINE_GET_CLASS(machine); - const CPUArchIdList *apic_ids =3D mc->possible_cpu_arch_ids(machine); - X86MachineState *x86ms =3D X86_MACHINE(machine); - - /* - * _MAT method - creates an madt apic buffer - * apic_id =3D Arg0 =3D Local APIC ID - * cpu_id =3D Arg1 =3D Processor ID - * cpu_on =3D Local0 =3D CPON flag for this cpu - * madt =3D Local1 =3D Buffer (in madt apic form) to return - */ - method =3D aml_method(CPU_MAT_METHOD, 2, AML_NOTSERIALIZED); - aml_append(method, - aml_store(aml_derefof(aml_index(cpus_map, apic_id)), cpu_on)); - aml_append(method, - aml_store(aml_buffer(sizeof(madt_tmpl), madt_tmpl), madt)); - /* Update the processor id, lapic id, and enable/disable status */ - aml_append(method, aml_store(cpu_id, aml_index(madt, aml_int(2)))); - aml_append(method, aml_store(apic_id, aml_index(madt, aml_int(3)))); - aml_append(method, aml_store(cpu_on, aml_index(madt, aml_int(4)))); - aml_append(method, aml_return(madt)); - aml_append(sb_scope, method); - - /* - * _STA method - return ON status of cpu - * apic_id =3D Arg0 =3D Local APIC ID - * cpu_on =3D Local0 =3D CPON flag for this cpu - */ - method =3D aml_method(CPU_STATUS_METHOD, 1, AML_NOTSERIALIZED); - aml_append(method, - aml_store(aml_derefof(aml_index(cpus_map, apic_id)), cpu_on)); - if_ctx =3D aml_if(cpu_on); - { - aml_append(if_ctx, aml_return(aml_int(0xF))); - } - aml_append(method, if_ctx); - else_ctx =3D aml_else(); - { - aml_append(else_ctx, aml_return(zero)); - } - aml_append(method, else_ctx); - aml_append(sb_scope, method); - - method =3D aml_method(CPU_EJECT_METHOD, 2, AML_NOTSERIALIZED); - aml_append(method, aml_sleep(200)); - aml_append(sb_scope, method); - - method =3D aml_method(CPU_SCAN_METHOD, 0, AML_NOTSERIALIZED); - { - Aml *while_ctx, *if_ctx2, *else_ctx2; - Aml *bus_check_evt =3D aml_int(1); - Aml *remove_evt =3D aml_int(3); - Aml *status_map =3D aml_local(5); /* Local5 =3D active cpu bitmap = */ - Aml *byte =3D aml_local(2); /* Local2 =3D last read byte from bitm= ap */ - Aml *idx =3D aml_local(0); /* Processor ID / APIC ID iterator */ - Aml *is_cpu_on =3D aml_local(1); /* Local1 =3D CPON flag for cpu */ - Aml *status =3D aml_local(3); /* Local3 =3D active state for cpu */ - - aml_append(method, aml_store(aml_name(CPU_STATUS_MAP), status_map)= ); - aml_append(method, aml_store(zero, byte)); - aml_append(method, aml_store(zero, idx)); - - /* While (idx < SizeOf(CPON)) */ - while_ctx =3D aml_while(aml_lless(idx, aml_sizeof(cpus_map))); - aml_append(while_ctx, - aml_store(aml_derefof(aml_index(cpus_map, idx)), is_cpu_on)); - - if_ctx =3D aml_if(aml_and(idx, aml_int(0x07), NULL)); - { - /* Shift down previously read bitmap byte */ - aml_append(if_ctx, aml_shiftright(byte, one, byte)); - } - aml_append(while_ctx, if_ctx); - - else_ctx =3D aml_else(); - { - /* Read next byte from cpu bitmap */ - aml_append(else_ctx, aml_store(aml_derefof(aml_index(status_ma= p, - aml_shiftright(idx, aml_int(3), NULL))), byte)); - } - aml_append(while_ctx, else_ctx); - - aml_append(while_ctx, aml_store(aml_and(byte, one, NULL), status)); - if_ctx =3D aml_if(aml_lnot(aml_equal(is_cpu_on, status))); - { - /* State change - update CPON with new state */ - aml_append(if_ctx, aml_store(status, aml_index(cpus_map, idx))= ); - if_ctx2 =3D aml_if(aml_equal(status, one)); - { - aml_append(if_ctx2, - aml_call2(AML_NOTIFY_METHOD, idx, bus_check_evt)); - } - aml_append(if_ctx, if_ctx2); - else_ctx2 =3D aml_else(); - { - aml_append(else_ctx2, - aml_call2(AML_NOTIFY_METHOD, idx, remove_evt)); - } - } - aml_append(if_ctx, else_ctx2); - aml_append(while_ctx, if_ctx); - - aml_append(while_ctx, aml_increment(idx)); /* go to next cpu */ - aml_append(method, while_ctx); - } - aml_append(sb_scope, method); - - /* The current AML generator can cover the APIC ID range [0..255], - * inclusive, for VCPU hotplug. */ - QEMU_BUILD_BUG_ON(ACPI_CPU_HOTPLUG_ID_LIMIT > 256); - if (x86ms->apic_id_limit > ACPI_CPU_HOTPLUG_ID_LIMIT) { - error_report("max_cpus is too large. APIC ID of last CPU is %u", - x86ms->apic_id_limit - 1); - exit(1); - } - - /* create PCI0.PRES device and its _CRS to reserve CPU hotplug MMIO */ - dev =3D aml_device("PCI0." stringify(CPU_HOTPLUG_RESOURCE_DEVICE)); - aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A06"))); - aml_append(dev, - aml_name_decl("_UID", aml_string("CPU Hotplug resources")) - ); - /* device present, functioning, decoding, not shown in UI */ - aml_append(dev, aml_name_decl("_STA", aml_int(0xB))); - crs =3D aml_resource_template(); - aml_append(crs, - aml_io(AML_DECODE16, io_base, io_base, 1, ACPI_GPE_PROC_LEN) - ); - aml_append(dev, aml_name_decl("_CRS", crs)); - aml_append(sb_scope, dev); - /* declare CPU hotplug MMIO region and PRS field to access it */ - aml_append(sb_scope, aml_operation_region( - "PRST", AML_SYSTEM_IO, aml_int(io_base), ACPI_GPE_PROC_LEN)); - field =3D aml_field("PRST", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE); - aml_append(field, aml_named_field("PRS", 256)); - aml_append(sb_scope, field); - - /* build Processor object for each processor */ - for (i =3D 0; i < apic_ids->len; i++) { - int cpu_apic_id =3D apic_ids->cpus[i].arch_id; - - assert(cpu_apic_id < ACPI_CPU_HOTPLUG_ID_LIMIT); - - dev =3D aml_processor(i, 0, 0, "CP%.02X", cpu_apic_id); - - method =3D aml_method("_MAT", 0, AML_NOTSERIALIZED); - aml_append(method, - aml_return(aml_call2(CPU_MAT_METHOD, - aml_int(cpu_apic_id), aml_int(i)) - )); - aml_append(dev, method); - - method =3D aml_method("_STA", 0, AML_NOTSERIALIZED); - aml_append(method, - aml_return(aml_call1(CPU_STATUS_METHOD, aml_int(cpu_apic_id)))= ); - aml_append(dev, method); - - method =3D aml_method("_EJ0", 1, AML_NOTSERIALIZED); - aml_append(method, - aml_return(aml_call2(CPU_EJECT_METHOD, aml_int(cpu_apic_id), - aml_arg(0))) - ); - aml_append(dev, method); - - aml_append(sb_scope, dev); - } - - /* build this code: - * Method(NTFY, 2) {If (LEqual(Arg0, 0x00)) {Notify(CP00, Arg1)} ...} - */ - /* Arg0 =3D APIC ID */ - method =3D aml_method(AML_NOTIFY_METHOD, 2, AML_NOTSERIALIZED); - for (i =3D 0; i < apic_ids->len; i++) { - int cpu_apic_id =3D apic_ids->cpus[i].arch_id; - - if_ctx =3D aml_if(aml_equal(aml_arg(0), aml_int(cpu_apic_id))); - aml_append(if_ctx, - aml_notify(aml_name("CP%.02X", cpu_apic_id), aml_arg(1)) - ); - aml_append(method, if_ctx); - } - aml_append(sb_scope, method); - - /* build "Name(CPON, Package() { One, One, ..., Zero, Zero, ... })" - * - * Note: The ability to create variable-sized packages was first - * introduced in ACPI 2.0. ACPI 1.0 only allowed fixed-size packages - * ith up to 255 elements. Windows guests up to win2k8 fail when - * VarPackageOp is used. - */ - pkg =3D x86ms->apic_id_limit <=3D 255 ? aml_package(x86ms->apic_id_lim= it) : - aml_varpackage(x86ms->apic_id_limi= t); - - for (i =3D 0, apic_idx =3D 0; i < apic_ids->len; i++) { - int cpu_apic_id =3D apic_ids->cpus[i].arch_id; - - for (; apic_idx < cpu_apic_id; apic_idx++) { - aml_append(pkg, aml_int(0)); - } - aml_append(pkg, aml_int(apic_ids->cpus[i].cpu ? 1 : 0)); - apic_idx =3D cpu_apic_id + 1; - } - aml_append(sb_scope, aml_name_decl(CPU_ON_BITMAP, pkg)); - aml_append(ctx, sb_scope); - - method =3D aml_method("\\_GPE._E02", 0, AML_NOTSERIALIZED); - aml_append(method, aml_call0("\\_SB." CPU_SCAN_METHOD)); - aml_append(ctx, method); -} diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c index 6741f46723cb..30dab43a00ce 100644 --- a/hw/acpi/generic_event_device.c +++ b/hw/acpi/generic_event_device.c @@ -13,6 +13,7 @@ #include "qapi/error.h" #include "hw/acpi/acpi.h" #include "hw/acpi/pcihp.h" +#include "hw/acpi/cpu.h" #include "hw/acpi/generic_event_device.h" #include "hw/pci/pci.h" #include "hw/core/irq.h" diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c index f254f3879716..bbb1bd60a206 100644 --- a/hw/acpi/ich9.c +++ b/hw/acpi/ich9.c @@ -40,6 +40,7 @@ #include "hw/southbridge/ich9.h" #include "hw/mem/pc-dimm.h" #include "hw/mem/nvdimm.h" +#include "hw/acpi/pc-hotplug.h" =20 static void ich9_pm_update_sci_fn(ACPIREGS *regs) { diff --git a/hw/acpi/meson.build b/hw/acpi/meson.build index 56b5d1ec9691..66c978aae836 100644 --- a/hw/acpi/meson.build +++ b/hw/acpi/meson.build @@ -6,7 +6,7 @@ acpi_ss.add(files( 'core.c', 'utils.c', )) -acpi_ss.add(when: 'CONFIG_ACPI_CPU_HOTPLUG', if_true: files('cpu.c', 'cpu_= hotplug.c')) +acpi_ss.add(when: 'CONFIG_ACPI_CPU_HOTPLUG', if_true: files('cpu.c')) acpi_ss.add(when: 'CONFIG_ACPI_CPU_HOTPLUG', if_false: files('acpi-cpu-hot= plug-stub.c')) acpi_ss.add(when: 'CONFIG_ACPI_MEMORY_HOTPLUG', if_true: files('memory_hot= plug.c')) acpi_ss.add(when: 'CONFIG_ACPI_MEMORY_HOTPLUG', if_false: files('acpi-mem-= hotplug-stub.c')) diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c index 05f9d6372a9b..138ac3d39408 100644 --- a/hw/acpi/piix4.c +++ b/hw/acpi/piix4.c @@ -33,7 +33,6 @@ #include "system/xen.h" #include "qapi/error.h" #include "qemu/range.h" -#include "hw/acpi/cpu_hotplug.h" #include "hw/acpi/cpu.h" #include "hw/core/hotplug.h" #include "hw/mem/pc-dimm.h" @@ -43,6 +42,7 @@ #include "migration/vmstate.h" #include "hw/core/cpu.h" #include "qom/object.h" +#include "hw/acpi/pc-hotplug.h" =20 #define GPE_BASE 0xafe0 #define GPE_LEN 4 diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index bf7ed2e50837..a744eb6c3a9b 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -35,6 +35,7 @@ #include "hw/acpi/acpi-defs.h" #include "hw/acpi/acpi.h" #include "hw/acpi/cpu.h" +#include "hw/acpi/pc-hotplug.h" #include "hw/nvram/fw_cfg.h" #include "hw/acpi/bios-linker-loader.h" #include "hw/acpi/acpi_aml_interface.h" diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 1478a26f11b7..15d21f380c43 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -48,7 +48,8 @@ #include "hw/xen/xen.h" #include "qobject/qlist.h" #include "qemu/error-report.h" -#include "hw/acpi/cpu_hotplug.h" +#include "hw/acpi/acpi.h" +#include "hw/acpi/pc-hotplug.h" #include "acpi-build.h" #include "hw/mem/nvdimm.h" #include "hw/cxl/cxl_host.h" diff --git a/hw/i386/x86-common.c b/hw/i386/x86-common.c index c1c922403924..85b90ff43248 100644 --- a/hw/i386/x86-common.c +++ b/hw/i386/x86-common.c @@ -36,7 +36,6 @@ #include "hw/rtc/mc146818rtc.h" #include "target/i386/sev.h" =20 -#include "hw/acpi/cpu_hotplug.h" #include "hw/core/irq.h" #include "hw/core/loader.h" #include "multiboot.h" diff --git a/include/hw/acpi/ich9.h b/include/hw/acpi/ich9.h index 6a21472eb32e..019f0915c110 100644 --- a/include/hw/acpi/ich9.h +++ b/include/hw/acpi/ich9.h @@ -22,12 +22,12 @@ #define HW_ACPI_ICH9_H =20 #include "hw/acpi/acpi.h" -#include "hw/acpi/cpu_hotplug.h" #include "hw/acpi/cpu.h" #include "hw/acpi/pcihp.h" #include "hw/acpi/memory_hotplug.h" #include "hw/acpi/acpi_dev_interface.h" #include "hw/acpi/ich9_tco.h" +#include "hw/acpi/cpu.h" =20 #define ACPI_PCIHP_ADDR_ICH9 0x0cc0 =20 diff --git a/include/hw/acpi/piix4.h b/include/hw/acpi/piix4.h index e075f0cbeaf1..863382a814ad 100644 --- a/include/hw/acpi/piix4.h +++ b/include/hw/acpi/piix4.h @@ -24,11 +24,11 @@ =20 #include "hw/pci/pci_device.h" #include "hw/acpi/acpi.h" -#include "hw/acpi/cpu_hotplug.h" #include "hw/acpi/memory_hotplug.h" #include "hw/acpi/pcihp.h" #include "hw/i2c/pm_smbus.h" #include "hw/isa/apm.h" +#include "hw/acpi/cpu.h" =20 #define TYPE_PIIX4_PM "PIIX4_PM" OBJECT_DECLARE_SIMPLE_TYPE(PIIX4PMState, PIIX4_PM) --=20 2.34.1 From nobody Mon Feb 2 07:27:05 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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d="scan'208";a="202210652" From: Zhao Liu To: Paolo Bonzini , "Michael S . Tsirkin" , Igor Mammedov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Thomas Huth Cc: qemu-devel@nongnu.org, devel@lists.libvirt.org, kvm@vger.kernel.org, qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Richard Henderson , Sergio Lopez , Gerd Hoffmann , Peter Maydell , Laurent Vivier , Jiaxun Yang , Yi Liu , Eduardo Habkost , Alistair Francis , Daniel Henrique Barboza , Marcelo Tosatti , Weiwei Li , Amit Shah , Xiaoyao Li , Yanan Wang , Helge Deller , Palmer Dabbelt , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Ani Sinha , Fabiano Rosas , Liu Zhiwei , =?UTF-8?q?Cl=C3=A9ment=20Mathieu--Drif?= , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Huacai Chen , Jason Wang , Mark Cave-Ayland , BALATON Zoltan , Peter Krempa , Jiri Denemark , Zhao Liu Subject: [PATCH v6 06/27] docs/specs/acpi_cpu_hotplug: Remove legacy cpu hotplug descriptions Date: Thu, 8 Jan 2026 11:30:30 +0800 Message-Id: <20260108033051.777361-7-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260108033051.777361-1-zhao1.liu@intel.com> References: <20260108033051.777361-1-zhao1.liu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.9; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1767841639831158500 Content-Type: text/plain; charset="utf-8" Legacy cpu hotplug has been removed totally and machines start with modern cpu hotplug interface directly. Therefore, update the documentation to describe current QEMU cpu hotplug logic. Reviewed-by: Igor Mammedov Signed-off-by: Zhao Liu --- Changes since v4: * New patch. --- docs/specs/acpi_cpu_hotplug.rst | 28 +++------------------------- 1 file changed, 3 insertions(+), 25 deletions(-) diff --git a/docs/specs/acpi_cpu_hotplug.rst b/docs/specs/acpi_cpu_hotplug.= rst index 351057c96761..f49678100044 100644 --- a/docs/specs/acpi_cpu_hotplug.rst +++ b/docs/specs/acpi_cpu_hotplug.rst @@ -8,22 +8,6 @@ ACPI BIOS GPE.2 handler is dedicated for notifying OS abou= t CPU hot-add and hot-remove events. =20 =20 -Legacy ACPI CPU hotplug interface registers -------------------------------------------- - -CPU present bitmap for: - -- ICH9-LPC (IO port 0x0cd8-0xcf7, 1-byte access) -- PIIX-PM (IO port 0xaf00-0xaf1f, 1-byte access) -- One bit per CPU. Bit position reflects corresponding CPU APIC ID. Read-o= nly. -- The first DWORD in bitmap is used in write mode to switch from legacy - to modern CPU hotplug interface, write 0 into it to do switch. - -QEMU sets corresponding CPU bit on hot-add event and issues SCI -with GPE.2 event set. CPU present map is read by ACPI BIOS GPE.2 handler -to notify OS about CPU hot-add events. CPU hot-remove isn't supported. - - Modern ACPI CPU hotplug interface registers ------------------------------------------- =20 @@ -189,20 +173,14 @@ Typical usecases (x86) Detecting and enabling modern CPU hotplug interface ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ =20 -QEMU starts with legacy CPU hotplug interface enabled. Detecting and -switching to modern interface is based on the 2 legacy CPU hotplug feature= s: - -#. Writes into CPU bitmap are ignored. -#. CPU bitmap always has bit #0 set, corresponding to boot CPU. - -Use following steps to detect and enable modern CPU hotplug interface: +QEMU starts with modern CPU hotplug interface enabled. Use following steps= to +detect modern CPU hotplug interface: =20 -#. Store 0x0 to the 'CPU selector' register, attempting to switch to moder= n mode #. Store 0x0 to the 'CPU selector' register, to ensure valid selector value #. Store 0x0 to the 'Command field' register #. Read the 'Command data 2' register. If read value is 0x0, the modern interface is enabled. - Otherwise legacy or no CPU hotplug interface available + Otherwise no CPU hotplug interface available =20 Get a cpu with pending event ^^^^^^^^^^^^^^^^^^^^^^^^^^^^ --=20 2.34.1 From nobody Mon Feb 2 07:27:05 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1767841904; cv=none; d=zohomail.com; s=zohoarc; b=BThCQ7qU7s1gzQUfLxExvZC+wwM5HFkgRW19G8wco9y8g/hFOL4rU/TtW7gxaXHqqpgOczd8Th3E/V7qYztNap9OGfTpl/APWQK/FmLhvoTLytlhzOgNbHnszYys/+YQY9JgOWDhxyqQhfdIkAqk9fBoc2K546jRw+GgLf6FE24= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1767841904; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=BvlrW9CLfhEBbtjp7Reii2ghes0vT13SPQutzvzIQbs=; b=MHkZLTUB4zNn5+r0raNw4OmzR5LluwEv5BWXdbztclcru9Lk9kjtbM3VhNBmMS0qCApzsYJ6jVOv6V3vWPef0wYEbzKQRfswqIqPWeABNrhXn1ueFQx22q6VFNPeSh1/ORTu66FLZYNz9yjEpO8N2BxEL9QxMuB8s8Ipqw2gp08= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 17678419041421007.6943242381549; Wed, 7 Jan 2026 19:11:44 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vdgMN-00082R-68; Wed, 07 Jan 2026 22:06:51 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vdgMK-0007yc-KI; Wed, 07 Jan 2026 22:06:48 -0500 Received: from mgamail.intel.com ([198.175.65.9]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vdgMH-00053Y-Hr; Wed, 07 Jan 2026 22:06:48 -0500 Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jan 2026 19:06:43 -0800 Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.39]) by orviesa006.jf.intel.com with ESMTP; 07 Jan 2026 19:06:33 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1767841606; x=1799377606; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=db3qja+kX083B6+UzCGJxLKjvW/gb7ZPUoZ7IK0uF60=; b=GZzDmsKJgwH+XwuGcmrQcA999diKNn8t8p/qxvSyZF01Bqh1XvsHROYt bmgbYMuDsGHArnRCG0vXoITtbUngm2tToKLI7R0AGzxaXPMnpEivYGqKm nwjZGoyZ29sEjm6Vufs5wn/wXVSHotFQbiaXH3Dvr22g4RbIiPmu1vm2S ZUI7rCETawIUD1ETPCN2ADkcKlGMSAAR/xNYv3e14wtKLV9pxv38UYc4d swOQGlUy5yCy1+xrNMZJNKekDOrZb9FIZ3eNYyqr/hHCan15pUT0qmQbt z/y1N4UIxzbMH8nytCfzpL2OVNMBkGAOcopeARkAX9fRLdrk5aGuXdrJz w==; X-CSE-ConnectionGUID: nRVzpUlqR0WaYKpp56y6TA== X-CSE-MsgGUID: 2FfYJGo8TE6g4A/Wet8gKg== X-IronPort-AV: E=McAfee;i="6800,10657,11664"; a="91877094" X-IronPort-AV: E=Sophos;i="6.21,209,1763452800"; d="scan'208";a="91877094" X-CSE-ConnectionGUID: jhjTk7MuQ02pJA2MeiRrCQ== X-CSE-MsgGUID: 25rxTYTyTMijk2mwGBJf9A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,209,1763452800"; d="scan'208";a="202210696" From: Zhao Liu To: Paolo Bonzini , "Michael S . Tsirkin" , Igor Mammedov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Thomas Huth Cc: qemu-devel@nongnu.org, devel@lists.libvirt.org, kvm@vger.kernel.org, qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Richard Henderson , Sergio Lopez , Gerd Hoffmann , Peter Maydell , Laurent Vivier , Jiaxun Yang , Yi Liu , Eduardo Habkost , Alistair Francis , Daniel Henrique Barboza , Marcelo Tosatti , Weiwei Li , Amit Shah , Xiaoyao Li , Yanan Wang , Helge Deller , Palmer Dabbelt , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Ani Sinha , Fabiano Rosas , Liu Zhiwei , =?UTF-8?q?Cl=C3=A9ment=20Mathieu--Drif?= , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Huacai Chen , Jason Wang , Mark Cave-Ayland , BALATON Zoltan , Peter Krempa , Jiri Denemark , Zhao Liu Subject: [PATCH v6 07/27] tests/acpi: Update DSDT tables for pc & q35 machines Date: Thu, 8 Jan 2026 11:30:31 +0800 Message-Id: <20260108033051.777361-8-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260108033051.777361-1-zhao1.liu@intel.com> References: <20260108033051.777361-1-zhao1.liu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.9; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1767841904703158500 Content-Type: text/plain; charset="utf-8" Now the legacy cpu hotplug way has gone away, and there's no _INIT method in DSDT table for modern cpu hotplug support. Update DSDT tables for pc machine, and_INIT methods are removed from DSDT tables: - Method (_INI, 0, Serialized) // _INI: Initialize - { - CSEL =3D Zero - } Signed-off-by: Zhao Liu Acked-by: Igor Mammedov --- Changes since v5: * Merge pc & q35 changes into one patch and simplify the commit message. Changes since v4: * New patch. --- tests/data/acpi/x86/pc/DSDT | Bin 8611 -> 8598 bytes tests/data/acpi/x86/pc/DSDT.acpierst | Bin 8522 -> 8509 bytes tests/data/acpi/x86/pc/DSDT.acpihmat | Bin 9936 -> 9923 bytes tests/data/acpi/x86/pc/DSDT.bridge | Bin 15482 -> 15469 bytes tests/data/acpi/x86/pc/DSDT.cphp | Bin 9075 -> 9062 bytes tests/data/acpi/x86/pc/DSDT.dimmpxm | Bin 10265 -> 10252 bytes tests/data/acpi/x86/pc/DSDT.hpbridge | Bin 8562 -> 8549 bytes tests/data/acpi/x86/pc/DSDT.hpbrroot | Bin 5100 -> 5087 bytes tests/data/acpi/x86/pc/DSDT.ipmikcs | Bin 8683 -> 8670 bytes tests/data/acpi/x86/pc/DSDT.memhp | Bin 9970 -> 9957 bytes tests/data/acpi/x86/pc/DSDT.nohpet | Bin 8469 -> 8456 bytes tests/data/acpi/x86/pc/DSDT.numamem | Bin 8617 -> 8604 bytes tests/data/acpi/x86/pc/DSDT.roothp | Bin 12404 -> 12391 bytes tests/data/acpi/x86/q35/DSDT | Bin 8440 -> 8427 bytes tests/data/acpi/x86/q35/DSDT.acpierst | Bin 8457 -> 8444 bytes tests/data/acpi/x86/q35/DSDT.acpihmat | Bin 9765 -> 9752 bytes .../data/acpi/x86/q35/DSDT.acpihmat-generic-x | Bin 12650 -> 12637 bytes .../acpi/x86/q35/DSDT.acpihmat-noinitiator | Bin 8719 -> 8706 bytes tests/data/acpi/x86/q35/DSDT.applesmc | Bin 8486 -> 8473 bytes tests/data/acpi/x86/q35/DSDT.bridge | Bin 12053 -> 12040 bytes tests/data/acpi/x86/q35/DSDT.core-count | Bin 12998 -> 12985 bytes tests/data/acpi/x86/q35/DSDT.core-count2 | Bin 33855 -> 33842 bytes tests/data/acpi/x86/q35/DSDT.cphp | Bin 8904 -> 8891 bytes tests/data/acpi/x86/q35/DSDT.cxl | Bin 13231 -> 13218 bytes tests/data/acpi/x86/q35/DSDT.dimmpxm | Bin 10094 -> 10081 bytes tests/data/acpi/x86/q35/DSDT.ipmibt | Bin 8515 -> 8502 bytes tests/data/acpi/x86/q35/DSDT.ipmismbus | Bin 8528 -> 8515 bytes tests/data/acpi/x86/q35/DSDT.ivrs | Bin 8457 -> 8444 bytes tests/data/acpi/x86/q35/DSDT.memhp | Bin 9799 -> 9786 bytes tests/data/acpi/x86/q35/DSDT.mmio64 | Bin 9570 -> 9557 bytes tests/data/acpi/x86/q35/DSDT.multi-bridge | Bin 13293 -> 13280 bytes tests/data/acpi/x86/q35/DSDT.noacpihp | Bin 8302 -> 8289 bytes tests/data/acpi/x86/q35/DSDT.nohpet | Bin 8298 -> 8285 bytes tests/data/acpi/x86/q35/DSDT.numamem | Bin 8446 -> 8433 bytes tests/data/acpi/x86/q35/DSDT.pvpanic-isa | Bin 8541 -> 8528 bytes tests/data/acpi/x86/q35/DSDT.thread-count | Bin 12998 -> 12985 bytes tests/data/acpi/x86/q35/DSDT.thread-count2 | Bin 33855 -> 33842 bytes tests/data/acpi/x86/q35/DSDT.tis.tpm12 | Bin 9046 -> 9033 bytes tests/data/acpi/x86/q35/DSDT.tis.tpm2 | Bin 9072 -> 9059 bytes tests/data/acpi/x86/q35/DSDT.type4-count | Bin 18674 -> 18661 bytes tests/data/acpi/x86/q35/DSDT.viot | Bin 14697 -> 14684 bytes tests/data/acpi/x86/q35/DSDT.xapic | Bin 35803 -> 35790 bytes tests/qtest/bios-tables-test-allowed-diff.h | 42 ------------------ 43 files changed, 42 deletions(-) diff --git a/tests/data/acpi/x86/pc/DSDT b/tests/data/acpi/x86/pc/DSDT index 4beb5194b84a711fcb52e3e52cc2096497d18442..6ea2d36d138daffb59a86367590= 78500adc58f24 100644 GIT binary patch delta 39 vcmZ4NJk6QQCDX&x?Dr}$u}_~<5Y&dK+AW^QifJt_o=3DlEc!_~<4NuF3a#X7Y;g#C!UAauhH)2fO-g JuHZc?3;?HG5552Z diff --git a/tests/data/acpi/x86/pc/DSDT.acpihmat b/tests/data/acpi/x86/pc/= DSDT.acpihmat index d081db26d7ba504b3344fad130d5812419291ac0..ba363d6af76af728b7c88bbaf47= f7e0ea3dcb41f 100644 GIT binary patch delta 39 vcmccMd)SxDCD5>CDJ>!F&;-i~9xF+A{naL}{6YuHg$x*=3DI9PH|| Jxq{bQ5&+kc5ODwi diff --git a/tests/data/acpi/x86/pc/DSDT.bridge b/tests/data/acpi/x86/pc/DS= DT.bridge index e16897dc5f0fbb3f7b4de8db913884046246cc3b..b68302363cb24181988d6e3dceb= 04a0946838d5e 100644 GIT binary patch delta 39 vcmexW@wS4?CDz>G&hf!c@zG5lT$Atf%;Xi}iTCvLhl5#|5@ diff --git a/tests/data/acpi/x86/pc/DSDT.cphp b/tests/data/acpi/x86/pc/DSDT= .cphp index e95711cd9cde5d50b841b701ae0fed5a4b15e872..20688edf2da41146ece4faa4141= 517408a42870c 100644 GIT binary patch delta 39 vcmezD_RNjTCD52&X&x@u`1oL__~<5Y&dK+AW^QifeJ2V42kQ;C delta 53 zcmaFn_SucgCD+d~}mH=3Dj6{kGdIuVZIA*0-Iz366_KpslmX&D6o<1J`b07NPMtUd~}ls*W}MUGkHaL;ywL5ISLq@gI#?# J_wY7I0RWRv4?X|@ diff --git a/tests/data/acpi/x86/pc/DSDT.hpbridge b/tests/data/acpi/x86/pc/= DSDT.hpbridge index 0eafe5fbf3d73719c9c3e6e26371863bfb44ed2f..2b5b885b862a2fe8bc4a2444640= 0dccf685dab85 100644 GIT binary patch delta 39 vcmez5^wf#VCDo=3DlEc!_~<4NuF3a#X7Y;g#C!UAauhH)2fO-g JuHbzu3;?^p5J~_5 diff --git a/tests/data/acpi/x86/pc/DSDT.hpbrroot b/tests/data/acpi/x86/pc/= DSDT.hpbrroot index 077a4cc988dc417a1bc9317dddd2dbd96ff1ff50..cc6f26a3f8fe85f34a8acb5432b= ab3cf4d3ab1f6 100644 GIT binary patch delta 39 vcmaE(eqWu-CD9BwWr=3DlEc!_~<4NuE`DDGkHaL;ywL5ISLq@gI#?# JOY$6J2LQ7!4`2WQ diff --git a/tests/data/acpi/x86/pc/DSDT.ipmikcs b/tests/data/acpi/x86/pc/D= SDT.ipmikcs index 8d465f027772f9c59b0c328c1a099e374a6d2a90..052a84e294eee4ecef9a3634149= 3f841caf887a5 100644 GIT binary patch delta 39 vcmaFue9xK7CDz?RPVvD`@zG7*oRjbK%-r0{nz>G&hf!c@zG5lT$Atf%;Xi}iTCvLAHfb0 delta 53 zcmaFr`^lHfCD%W5&-Wd5fK0Y diff --git a/tests/data/acpi/x86/pc/DSDT.nohpet b/tests/data/acpi/x86/pc/DS= DT.nohpet index 9e772c1316d0ea07c51717466c4c7e383553f345..7eedfcd64ebd0193744864b4f6c= bead35c7c3ab2 100644 GIT binary patch delta 39 vcmbR0)ZxVC66_Mfp~%3%cwi%!Ef1HgQ+%*fd~}mH=3Dj1@1nVY}!$cX>|)oKe* delta 53 zcmeBhn(D;m66_Kps>r~=3DxN{?yEf1HIb9}HKCDz?>PVvD`@zG7*oRjbK%-r0{t0Dpb_GAo) delta 53 zcmbQ^ywaJ=3DCDz=3Dr&hf!c@zG5lT$Atf%;Xi}iTCvLo=3DlEc!_~<4NuF3a#X7Y;g#C!UAauhH)2fO-g JuHb#I1OV9F5d;7L diff --git a/tests/data/acpi/x86/q35/DSDT b/tests/data/acpi/x86/q35/DSDT index e5e8d1e041e20e1b3ee56a5c93fe3d6ebd721ee6..377e880175f6f11101548c0c64d= a61b5aee00bd9 100644 GIT binary patch delta 39 vcmez2_}Y=3DnCDUnVT<5ny~`_^t=3Dod delta 53 zcmez4*y+UO66_MfsmQ><7`u^6Qj*KbIX>7aKDx<+YqGB7OkNS5cuzl1jsgbfU{{~b I$0W_z0eo!^6aWAK diff --git a/tests/data/acpi/x86/q35/DSDT.acpihmat b/tests/data/acpi/x86/q3= 5/DSDT.acpihmat index 2a4f2fc1d5c5649673353186e67ff5b5e59e8d53..f1b8483d8da21dd57f3e5e7a1e4= eb787df2c38ac 100644 GIT binary patch delta 39 vcmZ4LGsB0=3DCDUnVT<52Jrv@*4zt4 delta 53 zcmbQ?v($&nCDUnVT<5P8SCN^mq(Y delta 53 zcmcbc^eTzVCD#Fm33dr#Qet3WwBE=3DiDaqv%93SiyAKm25Iayb7=3DH|389B33dtLS7KmbG}*`{Daqv-5+CdoAKm1^HCb13Ca(xjyr-WhM*)L#u&dAJ IW0E!;0Apnhq5uE@ diff --git a/tests/data/acpi/x86/q35/DSDT.applesmc b/tests/data/acpi/x86/q3= 5/DSDT.applesmc index 5e8220e38d6f88b103f6eb3eb7c78dfa466882dc..92c8fdb6cbb8ae8bdf5ede9679e= ea92486eaf372 100644 GIT binary patch delta 39 vcmZ4HG}DR8CDUnVT<5I*9@R-%JaY delta 53 zcmeB(n;OUE66_Kps?Wf{cyl9{q$HPx-*r_CDe delta 56 zcmdng!L+}FiOVI}CB(jkfq}7oBbTHkcV{_Ue6Uk|bdv|yWIf55ydpgDo_?Mj1q{x? Mu0ETOOJ-*Q0MS7ZZ~y=3DR diff --git a/tests/data/acpi/x86/q35/DSDT.cphp b/tests/data/acpi/x86/q35/DS= DT.cphp index a055c2e7d3c4f5a00a03be20fd73227e322283a4..7c87d41d03fcfd2b5b82f2581f1= 6de6bc0bb10bf 100644 GIT binary patch delta 39 vcmX@%y4#h@CDWl9F6b&hf!c@zG5lT$6PrXYz{h#C!UAauhH)2fO-g JJ|=3Dlb5&*aE5HJ7$ diff --git a/tests/data/acpi/x86/q35/DSDT.dimmpxm b/tests/data/acpi/x86/q35= /DSDT.dimmpxm index 664e926e90765550136242f7e3e0bdc7719c1853..a2d812e5a23a3ce7739789246b3= 42e703f8c96c0 100644 GIT binary patch delta 39 vcmaFo_t1~aCDrf04 delta 53 zcmdnybl8c@CD4-o(W diff --git a/tests/data/acpi/x86/q35/DSDT.ipmismbus b/tests/data/acpi/x86/q= 35/DSDT.ipmismbus index 6d0b6b95c2a9fd01befc37b26650781ee1562e2a..1b998820d46e522b3129e42a867= ed691c1f83e8f 100644 GIT binary patch delta 39 vcmccMbl8c@CD@oAq$HQCQ+%*fd~}mH=3DVV>UnVT<5*0KWt;?)bb delta 53 zcmX@?bis+sCD0q$HPUQ diff --git a/tests/data/acpi/x86/q35/DSDT.ivrs b/tests/data/acpi/x86/q35/DS= DT.ivrs index 072a3fe2cd17dfe06658dfd82588f69787810114..026bfdfebf66c1803f158ac8c11= 5eb5f49b5cb19 100644 GIT binary patch delta 39 vcmeBl`s2vu66_N4M}dKXF?A!Cq$HQCQ+%*fd~}mH=3DVV>UnVT<5ny~`_^t=3Dod delta 53 zcmez4*y+UO66_MfsmQ><7`u^6Qj*KbIX>7aKDx<+YqGB7OkNS5cuzl1jsgbfU{{~b I$0W_z0eo!^6aWAK diff --git a/tests/data/acpi/x86/q35/DSDT.memhp b/tests/data/acpi/x86/q35/D= SDT.memhp index 4f2f9bcfceff076490cc49b8286380295a340004..7346125d23fb3174c0ce678a2cd= f2fdc77c4a9fa 100644 GIT binary patch delta 39 vcmX@^v&)CeCD)i9q$HQOQ+%*fd~}mH=3DVV>UnVT<5_HzRO>=3Dz6S delta 53 zcmccW^~j6MCDN9l9F6b&hf!c@zG5lT$6PrXYz{h#C!UAauhH)2fO-g JJ|-z81pw8G5DEYQ diff --git a/tests/data/acpi/x86/q35/DSDT.noacpihp b/tests/data/acpi/x86/q3= 5/DSDT.noacpihp index 9f7261d1b06bbf5d8a3e5a7a46b247a2a21eb544..780616774f97a2d7305faf9e9a9= d12afeb0e2fa2 100644 GIT binary patch delta 39 vcmaFo@X&$FCDPVvD`@zG7*oRiOq&)i%h@rxY*2F?wn delta 53 zcmaFp@XmqDCD4J diff --git a/tests/data/acpi/x86/q35/DSDT.pvpanic-isa b/tests/data/acpi/x86= /q35/DSDT.pvpanic-isa index 89032fa0290f496be0c06c6382586541aa1118a8..da3ce12787c28e555b6ba5eacb2= 6275bdd4587f1 100644 GIT binary patch delta 39 vcmccXbis+sCDUnVT<5cCiBh>8}g; delta 53 zcmccMbk~W?CDx-*r_CDe delta 56 zcmdng!L+}FiOVI}CB(jkfq}7oBbTHkcV{_Ue6Uk|bdv|yWIf55ydpgDo_?Mj1q{x? Mu0ETOOJ-*Q0MS7ZZ~y=3DR diff --git a/tests/data/acpi/x86/q35/DSDT.tis.tpm12 b/tests/data/acpi/x86/q= 35/DSDT.tis.tpm12 index f2ed40ca70cb13e733e39f4bad756be8688e01fe..67ebd7c158759221b801ecb67d8= 562d92fa219d5 100644 GIT binary patch delta 39 vcmccScG8W@CDas5UvNl7kOr}$u}_~<5Y&dIuxGdEwBoXZIS_>T;T delta 53 zcmaFt_Q8$ICD`3u4~PH& diff --git a/tests/data/acpi/x86/q35/DSDT.type4-count b/tests/data/acpi/x86= /q35/DSDT.type4-count index 3194a82b8b4f66aff1ecf7d2d60b4890181fc600..17a64adb2055ad3168754ca121b= f29851d2ee496 100644 GIT binary patch delta 42 ycmew~k@4w7MlP3Nmyo9(3=3DE7>8@VJUx%&??#RogZM>lzMPS%s0x%rBuoIU_FstxM^ delta 56 zcmaDlk@3?+MlP3Nmyk~$3=3DE9H8@VJUxqA*V#RogZM>lzJP1ci~$t%JW@9F2sQNZ9F M?CP`mxTKsu001Nq>i_@% diff --git a/tests/data/acpi/x86/q35/DSDT.viot b/tests/data/acpi/x86/q35/DS= DT.viot index 129d43e1e561be3fd7cd71406829ab81d0a8aba0..6eb30e8f4b2c54e4789c649475a= dff356c8c58a4 100644 GIT binary patch delta 39 vcmaD^bf<{RCDlzMPS%s0x%rADdl3LU$qs)2 delta 56 zcmX>%o$2;;CN7s?myp}t3=3DE9T8@VJUxm!Q7#RogZM>lzJP1ci~$t%JW@9F2sQNZ9F M?CP`mxFmZK01fjIe*gdg diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios= -tables-test-allowed-diff.h index eed8ded69335..dfb8523c8bf4 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1,43 +1 @@ /* List of comma-separated changed AML files to ignore */ -"tests/data/acpi/x86/pc/DSDT", -"tests/data/acpi/x86/pc/DSDT.bridge", -"tests/data/acpi/x86/pc/DSDT.ipmikcs", -"tests/data/acpi/x86/pc/DSDT.cphp", -"tests/data/acpi/x86/pc/DSDT.numamem", -"tests/data/acpi/x86/pc/DSDT.nohpet", -"tests/data/acpi/x86/pc/DSDT.memhp", -"tests/data/acpi/x86/pc/DSDT.dimmpxm", -"tests/data/acpi/x86/pc/DSDT.acpihmat", -"tests/data/acpi/x86/pc/DSDT.acpierst", -"tests/data/acpi/x86/pc/DSDT.roothp", -"tests/data/acpi/x86/pc/DSDT.hpbridge", -"tests/data/acpi/x86/pc/DSDT.hpbrroot", -"tests/data/acpi/x86/q35/DSDT", -"tests/data/acpi/x86/q35/DSDT.tis.tpm2", -"tests/data/acpi/x86/q35/DSDT.tis.tpm12", -"tests/data/acpi/x86/q35/DSDT.bridge", -"tests/data/acpi/x86/q35/DSDT.noacpihp", -"tests/data/acpi/x86/q35/DSDT.multi-bridge", -"tests/data/acpi/x86/q35/DSDT.ipmibt", -"tests/data/acpi/x86/q35/DSDT.cphp", -"tests/data/acpi/x86/q35/DSDT.numamem", -"tests/data/acpi/x86/q35/DSDT.nohpet", -"tests/data/acpi/x86/q35/DSDT.acpihmat-noinitiator", -"tests/data/acpi/x86/q35/DSDT.acpihmat-generic-x", -"tests/data/acpi/x86/q35/DSDT.memhp", -"tests/data/acpi/x86/q35/DSDT.dimmpxm", -"tests/data/acpi/x86/q35/DSDT.acpihmat", -"tests/data/acpi/x86/q35/DSDT.mmio64", -"tests/data/acpi/x86/q35/DSDT.acpierst", -"tests/data/acpi/x86/q35/DSDT.applesmc", -"tests/data/acpi/x86/q35/DSDT.pvpanic-isa", -"tests/data/acpi/x86/q35/DSDT.ivrs", -"tests/data/acpi/x86/q35/DSDT.type4-count", -"tests/data/acpi/x86/q35/DSDT.core-count", -"tests/data/acpi/x86/q35/DSDT.core-count2", -"tests/data/acpi/x86/q35/DSDT.thread-count", -"tests/data/acpi/x86/q35/DSDT.thread-count2", -"tests/data/acpi/x86/q35/DSDT.viot", -"tests/data/acpi/x86/q35/DSDT.cxl", -"tests/data/acpi/x86/q35/DSDT.ipmismbus", -"tests/data/acpi/x86/q35/DSDT.xapic", --=20 2.34.1 From nobody Mon Feb 2 07:27:05 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1767841636; cv=none; d=zohomail.com; s=zohoarc; b=P2fqTJYGu1s3X1yQ3cIBs7DMAa2+uu8oXTEC3rgUlCoA1915swgZetr4Gj5OAnJHGdpDyUGXRG7thyt+BeasbdaPLrnT94xvfyZg4DdntibacqX/ZVIYVis2YcqDaYOywxCtCBMk4NQXkco4+FgUMZEqA2dKuuvu2/iKzGzLbyA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1767841636; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=N4jlih9Kt8yvsDCBoerg2yVIPhTkyAeeAPWFj+QBFrQ=; b=KHUxW4eVpuFRR/8U/TJgpUdnBYJF2ssf6vpkpgDD2ctHkor0x8c9hfrIW0Uy6u/1p1aiXH0aVTtOHSATMmwyFXBQaRG1j8EgZV4Ue6l9Q5px+AwJlcLNMsgAlSwhYq+itH6LIQrZixIPI5TLTsa6WH5PVfhhhe5jKRlse1Hw7/I= ARC-Authentication-Results: i=1; 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d="scan'208";a="202210746" From: Zhao Liu To: Paolo Bonzini , "Michael S . Tsirkin" , Igor Mammedov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Thomas Huth Cc: qemu-devel@nongnu.org, devel@lists.libvirt.org, kvm@vger.kernel.org, qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Richard Henderson , Sergio Lopez , Gerd Hoffmann , Peter Maydell , Laurent Vivier , Jiaxun Yang , Yi Liu , Eduardo Habkost , Alistair Francis , Daniel Henrique Barboza , Marcelo Tosatti , Weiwei Li , Amit Shah , Xiaoyao Li , Yanan Wang , Helge Deller , Palmer Dabbelt , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Ani Sinha , Fabiano Rosas , Liu Zhiwei , =?UTF-8?q?Cl=C3=A9ment=20Mathieu--Drif?= , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Huacai Chen , Jason Wang , Mark Cave-Ayland , BALATON Zoltan , Peter Krempa , Jiri Denemark , Zhao Liu Subject: [PATCH v6 08/27] hw/nvram/fw_cfg: Rename fw_cfg_init_mem() with '_nodma' suffix Date: Thu, 8 Jan 2026 11:30:32 +0800 Message-Id: <20260108033051.777361-9-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260108033051.777361-1-zhao1.liu@intel.com> References: <20260108033051.777361-1-zhao1.liu@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.9; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1767841638286158500 From: Philippe Mathieu-Daud=C3=A9 Rename fw_cfg_init_mem() as fw_cfg_init_mem_nodma() to distinct with the DMA version (currently named fw_cfg_init_mem_wide). Suggested-by: Zhao Liu Reviewed-by: Igor Mammedov Reviewed-by: Zhao Liu Reviewed-by: Xiaoyao Li Signed-off-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Zhao Liu --- hw/hppa/machine.c | 2 +- hw/nvram/fw_cfg.c | 7 +++---- include/hw/nvram/fw_cfg.h | 3 ++- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c index 960aefc9e262..c3680667aee5 100644 --- a/hw/hppa/machine.c +++ b/hw/hppa/machine.c @@ -208,7 +208,7 @@ static FWCfgState *create_fw_cfg(MachineState *ms, PCIB= us *pci_bus, int btlb_entries =3D HPPA_BTLB_ENTRIES(&cpu[0]->env); int len; =20 - fw_cfg =3D fw_cfg_init_mem(addr, addr + 4); + fw_cfg =3D fw_cfg_init_mem_nodma(addr, addr + 4, 1); fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, ms->smp.cpus); fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, HPPA_MAX_CPUS); fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, ms->ram_size); diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c index 437ab6e210fc..a0315ea9ae6b 100644 --- a/hw/nvram/fw_cfg.c +++ b/hw/nvram/fw_cfg.c @@ -1088,11 +1088,10 @@ FWCfgState *fw_cfg_init_mem_wide(hwaddr ctl_addr, return s; } =20 -FWCfgState *fw_cfg_init_mem(hwaddr ctl_addr, hwaddr data_addr) +FWCfgState *fw_cfg_init_mem_nodma(hwaddr ctl_addr, hwaddr data_addr, + unsigned data_width) { - return fw_cfg_init_mem_wide(ctl_addr, data_addr, - fw_cfg_data_mem_ops.valid.max_access_size, - 0, NULL); + return fw_cfg_init_mem_wide(ctl_addr, data_addr, data_width, 0, NULL); } =20 =20 diff --git a/include/hw/nvram/fw_cfg.h b/include/hw/nvram/fw_cfg.h index a29a5d55eab5..510b227b7ef1 100644 --- a/include/hw/nvram/fw_cfg.h +++ b/include/hw/nvram/fw_cfg.h @@ -307,7 +307,8 @@ bool fw_cfg_add_file_from_generator(FWCfgState *s, =20 FWCfgState *fw_cfg_init_io_dma(uint32_t iobase, uint32_t dma_iobase, AddressSpace *dma_as); -FWCfgState *fw_cfg_init_mem(hwaddr ctl_addr, hwaddr data_addr); +FWCfgState *fw_cfg_init_mem_nodma(hwaddr ctl_addr, hwaddr data_addr, + unsigned data_width); FWCfgState *fw_cfg_init_mem_wide(hwaddr ctl_addr, hwaddr data_addr, uint32_t data_width, hwaddr dma_addr, AddressSpace *dma_as); --=20 2.34.1 From nobody Mon Feb 2 07:27:05 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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d="scan'208";a="202210784" From: Zhao Liu To: Paolo Bonzini , "Michael S . Tsirkin" , Igor Mammedov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Thomas Huth Cc: qemu-devel@nongnu.org, devel@lists.libvirt.org, kvm@vger.kernel.org, qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Richard Henderson , Sergio Lopez , Gerd Hoffmann , Peter Maydell , Laurent Vivier , Jiaxun Yang , Yi Liu , Eduardo Habkost , Alistair Francis , Daniel Henrique Barboza , Marcelo Tosatti , Weiwei Li , Amit Shah , Xiaoyao Li , Yanan Wang , Helge Deller , Palmer Dabbelt , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Ani Sinha , Fabiano Rosas , Liu Zhiwei , =?UTF-8?q?Cl=C3=A9ment=20Mathieu--Drif?= , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Huacai Chen , Jason Wang , Mark Cave-Ayland , BALATON Zoltan , Peter Krempa , Jiri Denemark , Zhao Liu Subject: [PATCH v6 09/27] hw/mips/loongson3_virt: Prefer using fw_cfg_init_mem_nodma() Date: Thu, 8 Jan 2026 11:30:33 +0800 Message-Id: <20260108033051.777361-10-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260108033051.777361-1-zhao1.liu@intel.com> References: <20260108033051.777361-1-zhao1.liu@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.9; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1767841638304158500 From: Philippe Mathieu-Daud=C3=A9 fw_cfg_init_mem_wide() is prefered to initialize fw_cfg with DMA support. Without DMA, use fw_cfg_init_mem_nodma(). Reviewed-by: Xiaoyao Li Reviewed-by: Igor Mammedov Reviewed-by: Zhao Liu Signed-off-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Zhao Liu --- hw/mips/loongson3_virt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/mips/loongson3_virt.c b/hw/mips/loongson3_virt.c index fe51fb66f6f2..cd94e9f5f77e 100644 --- a/hw/mips/loongson3_virt.c +++ b/hw/mips/loongson3_virt.c @@ -287,7 +287,7 @@ static void fw_conf_init(void) FWCfgState *fw_cfg; hwaddr cfg_addr =3D virt_memmap[VIRT_FW_CFG].base; =20 - fw_cfg =3D fw_cfg_init_mem_wide(cfg_addr, cfg_addr + 8, 8, 0, NULL); + fw_cfg =3D fw_cfg_init_mem_nodma(cfg_addr, cfg_addr + 8, 8); fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)current_machine->smp.= cpus); fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)current_machine->smp= .max_cpus); fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, loaderparams.ram_size); --=20 2.34.1 From nobody Mon Feb 2 07:27:05 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1767841757; cv=none; d=zohomail.com; s=zohoarc; b=YfkUqhSPhV/ldldRa1JtCSnXoS7RjaCP0ezaXYw5wn39YWbivpmJvQ8qFgEqYJafDzbLkL1iMIxmAP9yltHCvv95RGoqXuhY2eHje5E+nCU83l3LIedHMP7ie0RS8HRH+1cuNXjPREAaxDXdcmnTjAHsGOHN/7/7b4YOAvnXGs0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1767841757; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=gLPceXb6rkJuX6HmojMc/rzA0IdqEiT9adI2PpMI4oA=; b=Wmb4ZT+lmrOkMVHSS6ux6wpA2NL162zqKvMULXo8rh1I+HR3QHdmpULu0+3XubsDOimavGk1sfeTjQeJKLECmtFjk5EPzGzjfrlkK6FEBvywsKzXORYkhK16dZ+Pb3f68ANGXokA2A7p9rQYrmQZA2JnSIAQtCVKrgNDxcA8p+M= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1767841757411409.4725027463169; Wed, 7 Jan 2026 19:09:17 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vdgMn-0000eh-Db; Wed, 07 Jan 2026 22:07:17 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vdgMk-0000VW-PF; Wed, 07 Jan 2026 22:07:14 -0500 Received: from mgamail.intel.com ([198.175.65.9]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vdgMj-00058c-24; Wed, 07 Jan 2026 22:07:14 -0500 Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jan 2026 19:07:11 -0800 Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.39]) by orviesa006.jf.intel.com with ESMTP; 07 Jan 2026 19:07:01 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1767841634; x=1799377634; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=+W2nuu0RATsALTShNsBWCjQLHRQFKTYW61n5Szq2eRA=; b=mOjSiVVmLFBNe5Q3L/oCk09Tesj3KmNSi9ws73DLg25tW6Nk9NKPyfnk vEOVNOKIRjbrqRbc+8CjMP0+P9oBGziMmH+2HnmyPgADT4z3itvxfnajd WjWD+Q2Y2SfOQp86T4KKSQn6zxOsJsJQHKCkY6UdZw79V3OZCEhAkYO5c qYit9NU9WwGptiJxou4elziM5pqS5jxoV6b9XzRLAXG2yHsW3wHP6ynD0 K0t6xA3EULs0jDUFLictJ0N7FrUruECiXqy94H3nSt4XLlsrnYpQ0M63b PwKoWEusEPG0555QU6yser8U2Pag5jhyuYNlIuVdw+TDIrunvx0DtbabG Q==; X-CSE-ConnectionGUID: f8ujD27RS76r86nY/5cS7A== X-CSE-MsgGUID: PPDGTK4HSTGGeiK63x4+NQ== X-IronPort-AV: E=McAfee;i="6800,10657,11664"; a="91877192" X-IronPort-AV: E=Sophos;i="6.21,209,1763452800"; d="scan'208";a="91877192" X-CSE-ConnectionGUID: 1axfT+9ORDaOUvqICDifyQ== X-CSE-MsgGUID: xBlaUGDlSmWMvr0XoQBtsA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,209,1763452800"; d="scan'208";a="202210810" From: Zhao Liu To: Paolo Bonzini , "Michael S . Tsirkin" , Igor Mammedov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Thomas Huth Cc: qemu-devel@nongnu.org, devel@lists.libvirt.org, kvm@vger.kernel.org, qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Richard Henderson , Sergio Lopez , Gerd Hoffmann , Peter Maydell , Laurent Vivier , Jiaxun Yang , Yi Liu , Eduardo Habkost , Alistair Francis , Daniel Henrique Barboza , Marcelo Tosatti , Weiwei Li , Amit Shah , Xiaoyao Li , Yanan Wang , Helge Deller , Palmer Dabbelt , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Ani Sinha , Fabiano Rosas , Liu Zhiwei , =?UTF-8?q?Cl=C3=A9ment=20Mathieu--Drif?= , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Huacai Chen , Jason Wang , Mark Cave-Ayland , BALATON Zoltan , Peter Krempa , Jiri Denemark , Zhao Liu Subject: [PATCH v6 10/27] hw/nvram/fw_cfg: Factor fw_cfg_init_mem_internal() out Date: Thu, 8 Jan 2026 11:30:34 +0800 Message-Id: <20260108033051.777361-11-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260108033051.777361-1-zhao1.liu@intel.com> References: <20260108033051.777361-1-zhao1.liu@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.9; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1767841758281158500 From: Philippe Mathieu-Daud=C3=A9 Factor fw_cfg_init_mem_internal() out of fw_cfg_init_mem_wide(). In fw_cfg_init_mem_wide(), assert DMA arguments are provided. Callers without DMA have to use the fw_cfg_init_mem() helper. Reviewed-by: Igor Mammedov Reviewed-by: Zhao Liu Reviewed-by: Xiaoyao Li Signed-off-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Zhao Liu --- Changes since v4: * Fix a "typo" argument in fw_cfg_init_mem_wide(). --- hw/nvram/fw_cfg.c | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c index a0315ea9ae6b..3c1d0b9c1d09 100644 --- a/hw/nvram/fw_cfg.c +++ b/hw/nvram/fw_cfg.c @@ -1054,9 +1054,9 @@ FWCfgState *fw_cfg_init_io_dma(uint32_t iobase, uint3= 2_t dma_iobase, return s; } =20 -FWCfgState *fw_cfg_init_mem_wide(hwaddr ctl_addr, - hwaddr data_addr, uint32_t data_width, - hwaddr dma_addr, AddressSpace *dma_as) +static FWCfgState *fw_cfg_init_mem_internal(hwaddr ctl_addr, + hwaddr data_addr, uint32_t dat= a_width, + hwaddr dma_addr, AddressSpace = *dma_as) { DeviceState *dev; SysBusDevice *sbd; @@ -1088,10 +1088,19 @@ FWCfgState *fw_cfg_init_mem_wide(hwaddr ctl_addr, return s; } =20 +FWCfgState *fw_cfg_init_mem_wide(hwaddr ctl_addr, + hwaddr data_addr, uint32_t data_width, + hwaddr dma_addr, AddressSpace *dma_as) +{ + assert(dma_addr && dma_as); + return fw_cfg_init_mem_internal(ctl_addr, data_addr, data_width, + dma_addr, dma_as); +} + FWCfgState *fw_cfg_init_mem_nodma(hwaddr ctl_addr, hwaddr data_addr, unsigned data_width) { - return fw_cfg_init_mem_wide(ctl_addr, data_addr, data_width, 0, NULL); + return fw_cfg_init_mem_internal(ctl_addr, data_addr, data_width, 0, NU= LL); } =20 =20 --=20 2.34.1 From nobody Mon Feb 2 07:27:05 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1767841677; cv=none; d=zohomail.com; s=zohoarc; b=k9uPDQ8P0A538iO6Y/+pd/P8dBBBz9abuAakUs33McMYaubiUvykh5EMXqKShjwKt+YX1wogPnvOUayUQyIs8vcANZJDHFSslDsS9lrN+jaNxveGdh5aIVkfzyITR18om6y2v7KI6f5S3ih+zyGq0rw1OkFgrhuOMviiQXKaylA= ARC-Message-Signature: i=1; a=rsa-sha256; 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Tsirkin" , Igor Mammedov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Thomas Huth Cc: qemu-devel@nongnu.org, devel@lists.libvirt.org, kvm@vger.kernel.org, qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Richard Henderson , Sergio Lopez , Gerd Hoffmann , Peter Maydell , Laurent Vivier , Jiaxun Yang , Yi Liu , Eduardo Habkost , Alistair Francis , Daniel Henrique Barboza , Marcelo Tosatti , Weiwei Li , Amit Shah , Xiaoyao Li , Yanan Wang , Helge Deller , Palmer Dabbelt , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Ani Sinha , Fabiano Rosas , Liu Zhiwei , =?UTF-8?q?Cl=C3=A9ment=20Mathieu--Drif?= , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Huacai Chen , Jason Wang , Mark Cave-Ayland , BALATON Zoltan , Peter Krempa , Jiri Denemark , Zhao Liu Subject: [PATCH v6 11/27] hw/nvram/fw_cfg: Rename fw_cfg_init_mem_wide() -> fw_cfg_init_mem_dma() Date: Thu, 8 Jan 2026 11:30:35 +0800 Message-Id: <20260108033051.777361-12-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260108033051.777361-1-zhao1.liu@intel.com> References: <20260108033051.777361-1-zhao1.liu@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.9; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1767841678112158500 From: Philippe Mathieu-Daud=C3=A9 "wide" in fw_cfg_init_mem_wide() means "DMA support". Rename for clarity. Suggested-by: Zhao Liu Reviewed-by: Xiaoyao Li Reviewed-by: Zhao Liu Reviewed-by: Igor Mammedov Signed-off-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Zhao Liu --- Changes since v4: * Fix a missing case in hw/loongarch/fw_cfg.c. --- hw/arm/virt.c | 2 +- hw/loongarch/fw_cfg.c | 4 ++-- hw/nvram/fw_cfg.c | 6 +++--- hw/riscv/virt.c | 4 ++-- include/hw/nvram/fw_cfg.h | 6 +++--- 5 files changed, 11 insertions(+), 11 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index fd0e28f030a3..52ab01d7bb72 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1412,7 +1412,7 @@ static FWCfgState *create_fw_cfg(const VirtMachineSta= te *vms, AddressSpace *as) FWCfgState *fw_cfg; char *nodename; =20 - fw_cfg =3D fw_cfg_init_mem_wide(base + 8, base, 8, base + 16, as); + fw_cfg =3D fw_cfg_init_mem_dma(base + 8, base, 8, base + 16, as); fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)ms->smp.cpus); =20 nodename =3D g_strdup_printf("/fw-cfg@%" PRIx64, base); diff --git a/hw/loongarch/fw_cfg.c b/hw/loongarch/fw_cfg.c index 493563669e5b..d2a79efbf767 100644 --- a/hw/loongarch/fw_cfg.c +++ b/hw/loongarch/fw_cfg.c @@ -23,8 +23,8 @@ FWCfgState *virt_fw_cfg_init(ram_addr_t ram_size, Machine= State *ms) int max_cpus =3D ms->smp.max_cpus; int smp_cpus =3D ms->smp.cpus; =20 - fw_cfg =3D fw_cfg_init_mem_wide(VIRT_FWCFG_BASE + 8, VIRT_FWCFG_BASE, = 8, - VIRT_FWCFG_BASE + 16, &address_space_mem= ory); + fw_cfg =3D fw_cfg_init_mem_dma(VIRT_FWCFG_BASE + 8, VIRT_FWCFG_BASE, 8, + VIRT_FWCFG_BASE + 16, &address_space_memo= ry); fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus); fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size); fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus); diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c index 3c1d0b9c1d09..f962480e6685 100644 --- a/hw/nvram/fw_cfg.c +++ b/hw/nvram/fw_cfg.c @@ -1088,9 +1088,9 @@ static FWCfgState *fw_cfg_init_mem_internal(hwaddr ct= l_addr, return s; } =20 -FWCfgState *fw_cfg_init_mem_wide(hwaddr ctl_addr, - hwaddr data_addr, uint32_t data_width, - hwaddr dma_addr, AddressSpace *dma_as) +FWCfgState *fw_cfg_init_mem_dma(hwaddr ctl_addr, + hwaddr data_addr, uint32_t data_width, + hwaddr dma_addr, AddressSpace *dma_as) { assert(dma_addr && dma_as); return fw_cfg_init_mem_internal(ctl_addr, data_addr, data_width, diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index bd8608ea5bfd..07e66b39364c 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -1274,8 +1274,8 @@ static FWCfgState *create_fw_cfg(const MachineState *= ms, hwaddr base) { FWCfgState *fw_cfg; =20 - fw_cfg =3D fw_cfg_init_mem_wide(base + 8, base, 8, base + 16, - &address_space_memory); + fw_cfg =3D fw_cfg_init_mem_dma(base + 8, base, 8, base + 16, + &address_space_memory); fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)ms->smp.cpus); =20 return fw_cfg; diff --git a/include/hw/nvram/fw_cfg.h b/include/hw/nvram/fw_cfg.h index 510b227b7ef1..56f17a0bdcf7 100644 --- a/include/hw/nvram/fw_cfg.h +++ b/include/hw/nvram/fw_cfg.h @@ -309,9 +309,9 @@ FWCfgState *fw_cfg_init_io_dma(uint32_t iobase, uint32_= t dma_iobase, AddressSpace *dma_as); FWCfgState *fw_cfg_init_mem_nodma(hwaddr ctl_addr, hwaddr data_addr, unsigned data_width); -FWCfgState *fw_cfg_init_mem_wide(hwaddr ctl_addr, - hwaddr data_addr, uint32_t data_width, - hwaddr dma_addr, AddressSpace *dma_as); +FWCfgState *fw_cfg_init_mem_dma(hwaddr ctl_addr, + hwaddr data_addr, uint32_t data_width, + hwaddr dma_addr, AddressSpace *dma_as); =20 FWCfgState *fw_cfg_find(void); bool fw_cfg_dma_enabled(void *opaque); --=20 2.34.1 From nobody Mon Feb 2 07:27:05 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1767841696; cv=none; d=zohomail.com; s=zohoarc; b=KTxbZO6fjkKrfxrc1JEmZ7AapOUMjvRwX7dI6JjameZ11Eb1/eURCJWcBBJhgYSsaX8Y+8rEiGRq4Sq849CBzyYWUycYF2s/EqnSxMtQoi7a88BxCnNZ/XZJC4vBC7jCYSsaDmDkhbuc1nCCbHvlFAczFkJ/ZJou4AlXNQpP9w8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1767841696; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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Tsirkin" , Igor Mammedov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Thomas Huth Cc: qemu-devel@nongnu.org, devel@lists.libvirt.org, kvm@vger.kernel.org, qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Richard Henderson , Sergio Lopez , Gerd Hoffmann , Peter Maydell , Laurent Vivier , Jiaxun Yang , Yi Liu , Eduardo Habkost , Alistair Francis , Daniel Henrique Barboza , Marcelo Tosatti , Weiwei Li , Amit Shah , Xiaoyao Li , Yanan Wang , Helge Deller , Palmer Dabbelt , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Ani Sinha , Fabiano Rosas , Liu Zhiwei , =?UTF-8?q?Cl=C3=A9ment=20Mathieu--Drif?= , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Huacai Chen , Jason Wang , Mark Cave-Ayland , BALATON Zoltan , Peter Krempa , Jiri Denemark , Zhao Liu Subject: [PATCH v6 12/27] hw/i386/x86: Remove X86MachineClass::fwcfg_dma_enabled field Date: Thu, 8 Jan 2026 11:30:36 +0800 Message-Id: <20260108033051.777361-13-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260108033051.777361-1-zhao1.liu@intel.com> References: <20260108033051.777361-1-zhao1.liu@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.9; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1767841698100158500 From: Philippe Mathieu-Daud=C3=A9 The X86MachineClass::fwcfg_dma_enabled boolean was only used by the pc-q35-2.6 and pc-i440fx-2.6 machines, which got removed. Remove it and simplify. 'multiboot.bin' isn't used anymore, we'll remove it in the next commit. Reviewed-by: Zhao Liu Reviewed-by: Igor Mammedov Signed-off-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Zhao Liu --- hw/i386/microvm.c | 3 --- hw/i386/multiboot.c | 7 +------ hw/i386/x86-common.c | 3 +-- hw/i386/x86.c | 2 -- include/hw/i386/x86.h | 2 -- 5 files changed, 2 insertions(+), 15 deletions(-) diff --git a/hw/i386/microvm.c b/hw/i386/microvm.c index 8cf99ad66237..7ff205126365 100644 --- a/hw/i386/microvm.c +++ b/hw/i386/microvm.c @@ -640,7 +640,6 @@ GlobalProperty microvm_properties[] =3D { =20 static void microvm_class_init(ObjectClass *oc, const void *data) { - X86MachineClass *x86mc =3D X86_MACHINE_CLASS(oc); MicrovmMachineClass *mmc =3D MICROVM_MACHINE_CLASS(oc); MachineClass *mc =3D MACHINE_CLASS(oc); HotplugHandlerClass *hc =3D HOTPLUG_HANDLER_CLASS(oc); @@ -674,8 +673,6 @@ static void microvm_class_init(ObjectClass *oc, const v= oid *data) hc->unplug_request =3D microvm_device_unplug_request_cb; hc->unplug =3D microvm_device_unplug_cb; =20 - x86mc->fwcfg_dma_enabled =3D true; - object_class_property_add(oc, MICROVM_MACHINE_RTC, "OnOffAuto", microvm_machine_get_rtc, microvm_machine_set_rtc, diff --git a/hw/i386/multiboot.c b/hw/i386/multiboot.c index 8b6acfee9ba8..0e960a15dda4 100644 --- a/hw/i386/multiboot.c +++ b/hw/i386/multiboot.c @@ -153,7 +153,6 @@ int load_multiboot(X86MachineState *x86ms, int kernel_file_size, uint8_t *header) { - bool multiboot_dma_enabled =3D X86_MACHINE_GET_CLASS(x86ms)->fwcfg_dma= _enabled; int i, is_multiboot =3D 0; uint32_t flags =3D 0; uint32_t mh_entry_addr; @@ -402,11 +401,7 @@ int load_multiboot(X86MachineState *x86ms, fw_cfg_add_bytes(fw_cfg, FW_CFG_INITRD_DATA, mb_bootinfo_data, sizeof(bootinfo)); =20 - if (multiboot_dma_enabled) { - option_rom[nb_option_roms].name =3D "multiboot_dma.bin"; - } else { - option_rom[nb_option_roms].name =3D "multiboot.bin"; - } + option_rom[nb_option_roms].name =3D "multiboot_dma.bin"; option_rom[nb_option_roms].bootindex =3D 0; nb_option_roms++; =20 diff --git a/hw/i386/x86-common.c b/hw/i386/x86-common.c index 85b90ff43248..192e91042f22 100644 --- a/hw/i386/x86-common.c +++ b/hw/i386/x86-common.c @@ -645,7 +645,6 @@ void x86_load_linux(X86MachineState *x86ms, int acpi_data_size, bool pvh_enabled) { - bool linuxboot_dma_enabled =3D X86_MACHINE_GET_CLASS(x86ms)->fwcfg_dma= _enabled; uint16_t protocol; int setup_size, kernel_size, cmdline_size; int dtb_size, setup_data_offset; @@ -1004,7 +1003,7 @@ void x86_load_linux(X86MachineState *x86ms, =20 option_rom[nb_option_roms].bootindex =3D 0; option_rom[nb_option_roms].name =3D "linuxboot.bin"; - if (linuxboot_dma_enabled && fw_cfg_dma_enabled(fw_cfg)) { + if (fw_cfg_dma_enabled(fw_cfg)) { option_rom[nb_option_roms].name =3D "linuxboot_dma.bin"; } nb_option_roms++; diff --git a/hw/i386/x86.c b/hw/i386/x86.c index c29856c810a5..01872cba0733 100644 --- a/hw/i386/x86.c +++ b/hw/i386/x86.c @@ -375,14 +375,12 @@ static void x86_machine_initfn(Object *obj) static void x86_machine_class_init(ObjectClass *oc, const void *data) { MachineClass *mc =3D MACHINE_CLASS(oc); - X86MachineClass *x86mc =3D X86_MACHINE_CLASS(oc); NMIClass *nc =3D NMI_CLASS(oc); =20 mc->cpu_index_to_instance_props =3D x86_cpu_index_to_props; mc->get_default_cpu_node_id =3D x86_get_default_cpu_node_id; mc->possible_cpu_arch_ids =3D x86_possible_cpu_arch_ids; mc->kvm_type =3D x86_kvm_type; - x86mc->fwcfg_dma_enabled =3D true; nc->nmi_monitor_handler =3D x86_nmi; =20 object_class_property_add(oc, X86_MACHINE_SMM, "OnOffAuto", diff --git a/include/hw/i386/x86.h b/include/hw/i386/x86.h index 0dffba95f9a4..23be62743774 100644 --- a/include/hw/i386/x86.h +++ b/include/hw/i386/x86.h @@ -30,8 +30,6 @@ struct X86MachineClass { MachineClass parent; =20 - /* use DMA capable linuxboot option rom */ - bool fwcfg_dma_enabled; /* CPU and apic information: */ bool apic_xrupt_override; }; --=20 2.34.1 From nobody Mon Feb 2 07:27:05 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1767841697; cv=none; d=zohomail.com; s=zohoarc; b=BkwIN8jIer/N5vwp2pALvnkZOI8O18zUZurOH+jMwcLfxXun4AQim3o8bOEVkdHYXvbHCTfQSjH6R0C8PuQdIxiJAkaUNdRPoMpsZtbo9De4RAxRiHdtyBhnXH+SUMOf8SPOyf6bs0QFpw9pGgJ/LYJdNNWb2rdKd8HYfz/m+fA= ARC-Message-Signature: i=1; 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Tsirkin" , Igor Mammedov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Thomas Huth Cc: qemu-devel@nongnu.org, devel@lists.libvirt.org, kvm@vger.kernel.org, qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Richard Henderson , Sergio Lopez , Gerd Hoffmann , Peter Maydell , Laurent Vivier , Jiaxun Yang , Yi Liu , Eduardo Habkost , Alistair Francis , Daniel Henrique Barboza , Marcelo Tosatti , Weiwei Li , Amit Shah , Xiaoyao Li , Yanan Wang , Helge Deller , Palmer Dabbelt , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Ani Sinha , Fabiano Rosas , Liu Zhiwei , =?UTF-8?q?Cl=C3=A9ment=20Mathieu--Drif?= , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Huacai Chen , Jason Wang , Mark Cave-Ayland , BALATON Zoltan , Peter Krempa , Jiri Denemark , Zhao Liu Subject: [PATCH v6 13/27] hw/i386/pc: Remove multiboot.bin Date: Thu, 8 Jan 2026 11:30:37 +0800 Message-Id: <20260108033051.777361-14-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260108033051.777361-1-zhao1.liu@intel.com> References: <20260108033051.777361-1-zhao1.liu@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.9; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1767841700157158500 From: Philippe Mathieu-Daud=C3=A9 All PC machines now use the multiboot_dma.bin binary, we can remove the non-DMA version (multiboot.bin). This doesn't change multiboot_dma binary file. Suggested-by: Thomas Huth Reviewed-by: Zhao Liu Reviewed-by: Igor Mammedov Signed-off-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Zhao Liu --- Changes since v4: * There's a recent change for multiboot.S: commit 4c8f69b94839. Rebase this patch on that. --- hw/i386/pc.c | 1 - pc-bios/meson.build | 1 - pc-bios/multiboot.bin | Bin 1024 -> 0 bytes pc-bios/optionrom/Makefile | 2 +- pc-bios/optionrom/multiboot.S | 232 ----------------------------- pc-bios/optionrom/multiboot_dma.S | 234 +++++++++++++++++++++++++++++- pc-bios/optionrom/optionrom.h | 4 - 7 files changed, 233 insertions(+), 241 deletions(-) delete mode 100644 pc-bios/multiboot.bin delete mode 100644 pc-bios/optionrom/multiboot.S diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 15d21f380c43..f029c7323bcb 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -669,7 +669,6 @@ void xen_load_linux(PCMachineState *pcms) assert(!strcmp(option_rom[i].name, "linuxboot.bin") || !strcmp(option_rom[i].name, "linuxboot_dma.bin") || !strcmp(option_rom[i].name, "pvh.bin") || - !strcmp(option_rom[i].name, "multiboot.bin") || !strcmp(option_rom[i].name, "multiboot_dma.bin")); rom_add_option(option_rom[i].name, option_rom[i].bootindex); } diff --git a/pc-bios/meson.build b/pc-bios/meson.build index 9260aaad78e8..efe45c16705d 100644 --- a/pc-bios/meson.build +++ b/pc-bios/meson.build @@ -62,7 +62,6 @@ blobs =3D [ 'efi-e1000e.rom', 'efi-vmxnet3.rom', 'qemu-nsis.bmp', - 'multiboot.bin', 'multiboot_dma.bin', 'linuxboot.bin', 'linuxboot_dma.bin', diff --git a/pc-bios/multiboot.bin b/pc-bios/multiboot.bin deleted file mode 100644 index e772713c95749bee82c20002b50ec6d05b2d4987..000000000000000000000000000= 0000000000000 GIT binary patch literal 0 HcmV?d00001 literal 1024 zcmeHFF-Tic6utlZQ$OjD#Hxcx2u0GNQv6GySOkZR(ulaX<>%N!Y#>cWhY}nf36J7X zN(%*X6NHY>xcqO11dG^02a8L@B~ihln|%1*|7(haWa`)l@80w7;U4Ziyv0rZ8{K-w zX(Ib3tLZ)RgZ}w1ei{~QEqQq9q1J-iHc} z{m%E-b32A??+@XljSYirtWObwngil#NmvPZ7KCt40l-CQ}*)y. - * - * Copyright Novell Inc, 2009 - * Authors: Alexander Graf - */ - -#include "optionrom.h" - -#define BOOT_ROM_PRODUCT "multiboot loader" - -#define MULTIBOOT_MAGIC 0x2badb002 - -#define GS_PROT_JUMP 0 -#define GS_GDT_DESC 6 - - -BOOT_ROM_START - -run_multiboot: - - cli - cld - - mov %cs, %eax - shl $0x4, %eax - - /* set up a long jump descriptor that is PC relative */ - - /* move stack memory to %gs */ - mov %ss, %ecx - shl $0x4, %ecx - mov %esp, %ebx - add %ebx, %ecx - sub $0x20, %ecx - sub $0x30, %esp - shr $0x4, %ecx - mov %cx, %gs - - /* now push the indirect jump descriptor there */ - mov (prot_jump), %ebx - add %eax, %ebx - movl %ebx, %gs:GS_PROT_JUMP - mov $8, %bx - movw %bx, %gs:GS_PROT_JUMP + 4 - - /* fix the gdt descriptor to be PC relative */ - movw (gdt_desc), %bx - movw %bx, %gs:GS_GDT_DESC - movl (gdt_desc+2), %ebx - add %eax, %ebx - movl %ebx, %gs:GS_GDT_DESC + 2 - - xor %eax, %eax - mov %eax, %es - - /* Read the bootinfo struct into RAM */ - read_fw_blob_dma(FW_CFG_INITRD) - - /* FS =3D bootinfo_struct */ - read_fw FW_CFG_INITRD_ADDR - shr $4, %eax - mov %ax, %fs - - /* Account for the EBDA in the multiboot structure's e801 - * map. - */ - int $0x12 - cwtl - movl %eax, %fs:4 - - /* ES =3D mmap_addr */ - mov %fs:48, %eax - shr $4, %eax - mov %ax, %es - - /* Initialize multiboot mmap structs using int 0x15(e820) */ - xor %ebx, %ebx - /* Start storing mmap data at %es:0 */ - xor %edi, %edi - -mmap_loop: - /* The multiboot entry size has offset -4, so leave some space */ - add $4, %di - /* entry size (mmap struct) & max buffer size (int15) */ - movl $20, %ecx - /* e820 */ - movl $0x0000e820, %eax - /* 'SMAP' magic */ - movl $0x534d4150, %edx - int $0x15 - -mmap_check_entry: - /* Error or last entry already done? */ - jb mmap_done - -mmap_store_entry: - /* store entry size */ - /* old as(1) doesn't like this insn so emit the bytes instead: - movl %ecx, %es:-4(%edi) - */ - .dc.b 0x26,0x67,0x66,0x89,0x4f,0xfc - - /* %edi +=3D entry_size, store as mbs_mmap_length */ - add %ecx, %edi - movw %di, %fs:0x2c - - /* Continuation value 0 means last entry */ - test %ebx, %ebx - jnz mmap_loop - -mmap_done: - /* Calculate upper_mem field: The amount of memory between 1 MB and - the first upper memory hole. Get it from the mmap. */ - xor %di, %di - mov $0x100000, %edx -upper_mem_entry: - cmp %fs:0x2c, %di - je upper_mem_done - add $4, %di - - /* Skip if type !=3D 1 */ - cmpl $1, %es:16(%di) - jne upper_mem_next - - /* Skip if > 4 GB */ - movl %es:4(%di), %eax - test %eax, %eax - jnz upper_mem_next - - /* Check for contiguous extension (base <=3D %edx < base + length) */ - movl %es:(%di), %eax - cmp %eax, %edx - jb upper_mem_next - addl %es:8(%di), %eax - cmp %eax, %edx - jae upper_mem_next - - /* If so, update %edx, and restart the search (mmap isn't ordered) */ - mov %eax, %edx - xor %di, %di - jmp upper_mem_entry - -upper_mem_next: - addl %es:-4(%di), %edi - jmp upper_mem_entry - -upper_mem_done: - sub $0x100000, %edx - shr $10, %edx - mov %edx, %fs:0x8 - -real_to_prot: - /* Load the GDT before going into protected mode */ -lgdt: - data32 lgdt %gs:GS_GDT_DESC - - /* get us to protected mode now */ - movl $1, %eax - movl %eax, %cr0 - - /* the LJMP sets CS for us and gets us to 32-bit */ -ljmp: - data32 ljmp *%gs:GS_PROT_JUMP - -prot_mode: -.code32 - - /* initialize all other segments */ - movl $0x10, %eax - movl %eax, %ss - movl %eax, %ds - movl %eax, %es - movl %eax, %fs - movl %eax, %gs - - /* Read the kernel and modules into RAM */ - read_fw_blob_dma(FW_CFG_KERNEL) - - /* Jump off to the kernel */ - read_fw FW_CFG_KERNEL_ENTRY - mov %eax, %ecx - - /* EBX contains a pointer to the bootinfo struct */ - read_fw FW_CFG_INITRD_ADDR - movl %eax, %ebx - - /* EAX has to contain the magic */ - movl $MULTIBOOT_MAGIC, %eax -ljmp2: - jmp *%ecx - -/* Variables */ -.align 4, 0 -prot_jump: .long prot_mode - .short 8 - -.align 8, 0 -gdt: - /* 0x00 */ -.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 - - /* 0x08: code segment (base=3D0, limit=3D0xfffff, type=3D32bit code exec/= read, DPL=3D0, 4k) */ -.byte 0xff, 0xff, 0x00, 0x00, 0x00, 0x9a, 0xcf, 0x00 - - /* 0x10: data segment (base=3D0, limit=3D0xfffff, type=3D32bit data read/= write, DPL=3D0, 4k) */ -.byte 0xff, 0xff, 0x00, 0x00, 0x00, 0x92, 0xcf, 0x00 - - /* 0x18: code segment (base=3D0, limit=3D0x0ffff, type=3D16bit code exec/= read/conf, DPL=3D0, 1b) */ -.byte 0xff, 0xff, 0x00, 0x00, 0x00, 0x9e, 0x00, 0x00 - - /* 0x20: data segment (base=3D0, limit=3D0x0ffff, type=3D16bit data read/= write, DPL=3D0, 1b) */ -.byte 0xff, 0xff, 0x00, 0x00, 0x00, 0x92, 0x00, 0x00 - -gdt_desc: -.short (5 * 8) - 1 -.long gdt - -BOOT_ROM_END diff --git a/pc-bios/optionrom/multiboot_dma.S b/pc-bios/optionrom/multiboo= t_dma.S index d809af3e23fc..c95e35c9cb62 100644 --- a/pc-bios/optionrom/multiboot_dma.S +++ b/pc-bios/optionrom/multiboot_dma.S @@ -1,2 +1,232 @@ -#define USE_FW_CFG_DMA 1 -#include "multiboot.S" +/* + * Multiboot Option ROM + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . + * + * Copyright Novell Inc, 2009 + * Authors: Alexander Graf + */ + +#include "optionrom.h" + +#define BOOT_ROM_PRODUCT "multiboot loader" + +#define MULTIBOOT_MAGIC 0x2badb002 + +#define GS_PROT_JUMP 0 +#define GS_GDT_DESC 6 + + +BOOT_ROM_START + +run_multiboot: + + cli + cld + + mov %cs, %eax + shl $0x4, %eax + + /* set up a long jump descriptor that is PC relative */ + + /* move stack memory to %gs */ + mov %ss, %ecx + shl $0x4, %ecx + mov %esp, %ebx + add %ebx, %ecx + sub $0x20, %ecx + sub $0x30, %esp + shr $0x4, %ecx + mov %cx, %gs + + /* now push the indirect jump descriptor there */ + mov (prot_jump), %ebx + add %eax, %ebx + movl %ebx, %gs:GS_PROT_JUMP + mov $8, %bx + movw %bx, %gs:GS_PROT_JUMP + 4 + + /* fix the gdt descriptor to be PC relative */ + movw (gdt_desc), %bx + movw %bx, %gs:GS_GDT_DESC + movl (gdt_desc+2), %ebx + add %eax, %ebx + movl %ebx, %gs:GS_GDT_DESC + 2 + + xor %eax, %eax + mov %eax, %es + + /* Read the bootinfo struct into RAM */ + read_fw_blob_dma(FW_CFG_INITRD) + + /* FS =3D bootinfo_struct */ + read_fw FW_CFG_INITRD_ADDR + shr $4, %eax + mov %ax, %fs + + /* Account for the EBDA in the multiboot structure's e801 + * map. + */ + int $0x12 + cwtl + movl %eax, %fs:4 + + /* ES =3D mmap_addr */ + mov %fs:48, %eax + shr $4, %eax + mov %ax, %es + + /* Initialize multiboot mmap structs using int 0x15(e820) */ + xor %ebx, %ebx + /* Start storing mmap data at %es:0 */ + xor %edi, %edi + +mmap_loop: + /* The multiboot entry size has offset -4, so leave some space */ + add $4, %di + /* entry size (mmap struct) & max buffer size (int15) */ + movl $20, %ecx + /* e820 */ + movl $0x0000e820, %eax + /* 'SMAP' magic */ + movl $0x534d4150, %edx + int $0x15 + +mmap_check_entry: + /* Error or last entry already done? */ + jb mmap_done + +mmap_store_entry: + /* store entry size */ + /* old as(1) doesn't like this insn so emit the bytes instead: + movl %ecx, %es:-4(%edi) + */ + .dc.b 0x26,0x67,0x66,0x89,0x4f,0xfc + + /* %edi +=3D entry_size, store as mbs_mmap_length */ + add %ecx, %edi + movw %di, %fs:0x2c + + /* Continuation value 0 means last entry */ + test %ebx, %ebx + jnz mmap_loop + +mmap_done: + /* Calculate upper_mem field: The amount of memory between 1 MB and + the first upper memory hole. Get it from the mmap. */ + xor %di, %di + mov $0x100000, %edx +upper_mem_entry: + cmp %fs:0x2c, %di + je upper_mem_done + add $4, %di + + /* Skip if type !=3D 1 */ + cmpl $1, %es:16(%di) + jne upper_mem_next + + /* Skip if > 4 GB */ + movl %es:4(%di), %eax + test %eax, %eax + jnz upper_mem_next + + /* Check for contiguous extension (base <=3D %edx < base + length) */ + movl %es:(%di), %eax + cmp %eax, %edx + jb upper_mem_next + addl %es:8(%di), %eax + cmp %eax, %edx + jae upper_mem_next + + /* If so, update %edx, and restart the search (mmap isn't ordered) */ + mov %eax, %edx + xor %di, %di + jmp upper_mem_entry + +upper_mem_next: + addl %es:-4(%di), %edi + jmp upper_mem_entry + +upper_mem_done: + sub $0x100000, %edx + shr $10, %edx + mov %edx, %fs:0x8 + +real_to_prot: + /* Load the GDT before going into protected mode */ +lgdt: + data32 lgdt %gs:GS_GDT_DESC + + /* get us to protected mode now */ + movl $1, %eax + movl %eax, %cr0 + + /* the LJMP sets CS for us and gets us to 32-bit */ +ljmp: + data32 ljmp *%gs:GS_PROT_JUMP + +prot_mode: +.code32 + + /* initialize all other segments */ + movl $0x10, %eax + movl %eax, %ss + movl %eax, %ds + movl %eax, %es + movl %eax, %fs + movl %eax, %gs + + /* Read the kernel and modules into RAM */ + read_fw_blob_dma(FW_CFG_KERNEL) + + /* Jump off to the kernel */ + read_fw FW_CFG_KERNEL_ENTRY + mov %eax, %ecx + + /* EBX contains a pointer to the bootinfo struct */ + read_fw FW_CFG_INITRD_ADDR + movl %eax, %ebx + + /* EAX has to contain the magic */ + movl $MULTIBOOT_MAGIC, %eax +ljmp2: + jmp *%ecx + +/* Variables */ +.align 4, 0 +prot_jump: .long prot_mode + .short 8 + +.align 8, 0 +gdt: + /* 0x00 */ +.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + + /* 0x08: code segment (base=3D0, limit=3D0xfffff, type=3D32bit code exec/= read, DPL=3D0, 4k) */ +.byte 0xff, 0xff, 0x00, 0x00, 0x00, 0x9a, 0xcf, 0x00 + + /* 0x10: data segment (base=3D0, limit=3D0xfffff, type=3D32bit data read/= write, DPL=3D0, 4k) */ +.byte 0xff, 0xff, 0x00, 0x00, 0x00, 0x92, 0xcf, 0x00 + + /* 0x18: code segment (base=3D0, limit=3D0x0ffff, type=3D16bit code exec/= read/conf, DPL=3D0, 1b) */ +.byte 0xff, 0xff, 0x00, 0x00, 0x00, 0x9e, 0x00, 0x00 + + /* 0x20: data segment (base=3D0, limit=3D0x0ffff, type=3D16bit data read/= write, DPL=3D0, 1b) */ +.byte 0xff, 0xff, 0x00, 0x00, 0x00, 0x92, 0x00, 0x00 + +gdt_desc: +.short (5 * 8) - 1 +.long gdt + +BOOT_ROM_END diff --git a/pc-bios/optionrom/optionrom.h b/pc-bios/optionrom/optionrom.h index 7bcdf0eeb240..2e6e2493f83f 100644 --- a/pc-bios/optionrom/optionrom.h +++ b/pc-bios/optionrom/optionrom.h @@ -117,16 +117,12 @@ * * Clobbers: %eax, %edx, %es, %ecx, %edi and adresses %esp-20 to %esp */ -#ifdef USE_FW_CFG_DMA #define read_fw_blob_dma(var) \ read_fw var ## _SIZE; \ mov %eax, %ecx; \ read_fw var ## _ADDR; \ mov %eax, %edi ; \ read_fw_dma var ## _DATA, %ecx, %edi -#else -#define read_fw_blob_dma(var) read_fw_blob(var) -#endif =20 #define read_fw_blob_pre(var) \ read_fw var ## _SIZE; \ --=20 2.34.1 From nobody Mon Feb 2 07:27:05 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1767841701; cv=none; d=zohomail.com; s=zohoarc; b=S8D98UB4hsLJq/nCikTdpSGB1U7mSFB7te9wJs7hN72HXwOuuhBhv4MwOIkz5hAF28sW5BWEYLj1P5yhkxrfXgZdSiUObwV8c0G5gz5ZJSahPrszREqm0ErBb9QCpq9xRNgfDWv7Gu4LvRwv5wDPdGU6XtvtRtH869MbuSJqR+Q= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1767841701; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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X-CSE-ConnectionGUID: lHkPksKFTI2+5T0Rq0xbgg== X-CSE-MsgGUID: UJy8Jg+vTlK49dee0qx5WA== X-IronPort-AV: E=McAfee;i="6800,10657,11664"; a="91877296" X-IronPort-AV: E=Sophos;i="6.21,209,1763452800"; d="scan'208";a="91877296" X-CSE-ConnectionGUID: muz8WEMJR1aLs41oUukI4w== X-CSE-MsgGUID: nZtYAevLSdqV6SnKthR/1w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,209,1763452800"; d="scan'208";a="202210997" From: Zhao Liu To: Paolo Bonzini , "Michael S . Tsirkin" , Igor Mammedov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Thomas Huth Cc: qemu-devel@nongnu.org, devel@lists.libvirt.org, kvm@vger.kernel.org, qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Richard Henderson , Sergio Lopez , Gerd Hoffmann , Peter Maydell , Laurent Vivier , Jiaxun Yang , Yi Liu , Eduardo Habkost , Alistair Francis , Daniel Henrique Barboza , Marcelo Tosatti , Weiwei Li , Amit Shah , Xiaoyao Li , Yanan Wang , Helge Deller , Palmer Dabbelt , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Ani Sinha , Fabiano Rosas , Liu Zhiwei , =?UTF-8?q?Cl=C3=A9ment=20Mathieu--Drif?= , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Huacai Chen , Jason Wang , Mark Cave-Ayland , BALATON Zoltan , Peter Krempa , Jiri Denemark , Zhao Liu Subject: [PATCH v6 14/27] hw/i386: Assume fw_cfg DMA is always enabled Date: Thu, 8 Jan 2026 11:30:38 +0800 Message-Id: <20260108033051.777361-15-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260108033051.777361-1-zhao1.liu@intel.com> References: <20260108033051.777361-1-zhao1.liu@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.9; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1767841702076158500 From: Philippe Mathieu-Daud=C3=A9 Now all calls of x86 machines to fw_cfg_init_io_dma() pass DMA arguments, so the FWCfgState (FWCfgIoState) created by x86 machines enables DMA by default. Although other callers of fw_cfg_init_io_dma() besides x86 also pass DMA arguments to create DMA-enabled FwCfgIoState, the "dma_enabled" property of FwCfgIoState cannot yet be removed, because Sun4u and Sun4v still create DMA-disabled FwCfgIoState (bypass fw_cfg_init_io_dma()) in sun4uv_init() (hw/sparc64/sun4u.c). Maybe reusing fw_cfg_init_io_dma() for them would be a better choice, or adding fw_cfg_init_io_nodma(). However, before that, first simplify the handling of FwCfgState in x86. Considering that FwCfgIoState in x86 enables DMA by default, remove the handling for DMA-disabled cases and replace DMA checks with assertions to ensure that the default DMA-enabled setting is not broken. Then 'linuxboot.bin' isn't used anymore, and it will be removed in the next commit. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Zhao Liu Acked-by: Igor Mammedov Reviewed-by: Thomas Huth --- Changes since v4: * Keep "dma_enabled" property in fw_cfg_io_properties[]. * Replace DMA checks with assertions for x86 machines. --- hw/i386/fw_cfg.c | 16 ++++++++-------- hw/i386/x86-common.c | 6 ++---- 2 files changed, 10 insertions(+), 12 deletions(-) diff --git a/hw/i386/fw_cfg.c b/hw/i386/fw_cfg.c index 5c0bcd5f8a9f..5670e8553eaa 100644 --- a/hw/i386/fw_cfg.c +++ b/hw/i386/fw_cfg.c @@ -215,18 +215,18 @@ void fw_cfg_build_feature_control(MachineState *ms, F= WCfgState *fw_cfg) #ifdef CONFIG_ACPI void fw_cfg_add_acpi_dsdt(Aml *scope, FWCfgState *fw_cfg) { + uint8_t io_size; + Aml *dev =3D aml_device("FWCF"); + Aml *crs =3D aml_resource_template(); + /* * when using port i/o, the 8-bit data register *always* overlaps * with half of the 16-bit control register. Hence, the total size - * of the i/o region used is FW_CFG_CTL_SIZE; when using DMA, the - * DMA control register is located at FW_CFG_DMA_IO_BASE + 4 + * of the i/o region used is FW_CFG_CTL_SIZE; And the DMA control + * register is located at FW_CFG_DMA_IO_BASE + 4 */ - Object *obj =3D OBJECT(fw_cfg); - uint8_t io_size =3D object_property_get_bool(obj, "dma_enabled", NULL)= ? - ROUND_UP(FW_CFG_CTL_SIZE, 4) + sizeof(dma_addr_t) : - FW_CFG_CTL_SIZE; - Aml *dev =3D aml_device("FWCF"); - Aml *crs =3D aml_resource_template(); + assert(fw_cfg_dma_enabled(fw_cfg)); + io_size =3D ROUND_UP(FW_CFG_CTL_SIZE, 4) + sizeof(dma_addr_t); =20 aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0002"))); =20 diff --git a/hw/i386/x86-common.c b/hw/i386/x86-common.c index 192e91042f22..de4cd7650a40 100644 --- a/hw/i386/x86-common.c +++ b/hw/i386/x86-common.c @@ -1002,10 +1002,8 @@ void x86_load_linux(X86MachineState *x86ms, } =20 option_rom[nb_option_roms].bootindex =3D 0; - option_rom[nb_option_roms].name =3D "linuxboot.bin"; - if (fw_cfg_dma_enabled(fw_cfg)) { - option_rom[nb_option_roms].name =3D "linuxboot_dma.bin"; - } + assert(fw_cfg_dma_enabled(fw_cfg)); + option_rom[nb_option_roms].name =3D "linuxboot_dma.bin"; nb_option_roms++; } =20 --=20 2.34.1 From nobody Mon Feb 2 07:27:05 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1767841777; cv=none; d=zohomail.com; s=zohoarc; b=Z5DRDweQUJb4SMh1c2ODdV9Ey3XVJXH98+VnY/v9N0PtBkG9PZ9NR/VDAe9IthmSD9BwIAZWmIr6NvB8je/GmNM2qekEwo2SI/r/cSM5+45/PPImRmB0b9GF8anFLcJ88B1OTa5G/pMdHNXlx9gS5Ylax6oFN+VwmYHe9KbZTHM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1767841777; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=/HhPehhAuFhyLLemtCdIp/vGwUPyi422Xw/bsYHBVI8=; b=TjBM0AOx372zblqJKaivSLeNfr4MTRJT2+EB7ynZQMFhXMFKgoFKODqVw6IwNSlu43t0NiRz29U4SZ6+yUA15yuhlvax4Rq95EFkUAs5K/S2RzQ7f1ixy6hHci2q32r7+LybLldL27baLYYSTMKjE/hfD5VQY3K4FhxDlmr3Emw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1767841777737274.44000634768963; Wed, 7 Jan 2026 19:09:37 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vdgNa-0003Ql-6y; Wed, 07 Jan 2026 22:08:06 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vdgNV-0002yO-GK; Wed, 07 Jan 2026 22:08:01 -0500 Received: from mgamail.intel.com ([198.175.65.9]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vdgNT-0005Eu-0I; Wed, 07 Jan 2026 22:08:01 -0500 Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jan 2026 19:07:58 -0800 Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.39]) by orviesa006.jf.intel.com with ESMTP; 07 Jan 2026 19:07:48 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1767841680; x=1799377680; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ewMdi3J36bgoZApjfpJ73KEayVLziVNcREWFVjth8/s=; b=ACQ7m4T5Kj43ntzbSNhkEOcMpZuvxYwjH31ezL+YkuRfVkmCOEYSi7Od oaF4Xvh1VDozVEg9jPoq2Dg7jCSwTnOUhBooWMRwuQpsBJYqVWldCkPS9 h2JE9gjRp5cUdEkEW3uod/tyx7vwdo8KzXt0UO7Y/p2P9zkPWO9Dyv2rt 1y79wtfEHe0q0nhl822RUin7KsoZPWeuGzaFSncs9bKYvcobfKqHi0EX/ Tptd66Rb9ITuiV4fNEF7mFjsxJM1EjohpxwCiLvi/FY6KrhcLPR4A9fvG Fqn1u4DqokVMfsYihAMMFhBSkDz4MzD1ZrxCjQ/1TsoN5QV2tz1zSoME7 Q==; X-CSE-ConnectionGUID: oXDpNee7RDqU2oi/vc3mIQ== X-CSE-MsgGUID: Akvwrn7zR2etu+XoRUMnhQ== X-IronPort-AV: E=McAfee;i="6800,10657,11664"; a="91877344" X-IronPort-AV: E=Sophos;i="6.21,209,1763452800"; d="scan'208";a="91877344" X-CSE-ConnectionGUID: muyk1UiNQFSNyc9Nq0qsSw== X-CSE-MsgGUID: HyOsGDbcSkO6Sy0E3UOWgQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,209,1763452800"; d="scan'208";a="202211021" From: Zhao Liu To: Paolo Bonzini , "Michael S . Tsirkin" , Igor Mammedov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Thomas Huth Cc: qemu-devel@nongnu.org, devel@lists.libvirt.org, kvm@vger.kernel.org, qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Richard Henderson , Sergio Lopez , Gerd Hoffmann , Peter Maydell , Laurent Vivier , Jiaxun Yang , Yi Liu , Eduardo Habkost , Alistair Francis , Daniel Henrique Barboza , Marcelo Tosatti , Weiwei Li , Amit Shah , Xiaoyao Li , Yanan Wang , Helge Deller , Palmer Dabbelt , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Ani Sinha , Fabiano Rosas , Liu Zhiwei , =?UTF-8?q?Cl=C3=A9ment=20Mathieu--Drif?= , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Huacai Chen , Jason Wang , Mark Cave-Ayland , BALATON Zoltan , Peter Krempa , Jiri Denemark , Zhao Liu Subject: [PATCH v6 15/27] hw/i386: Remove linuxboot.bin Date: Thu, 8 Jan 2026 11:30:39 +0800 Message-Id: <20260108033051.777361-16-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260108033051.777361-1-zhao1.liu@intel.com> References: <20260108033051.777361-1-zhao1.liu@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.9; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -22 X-Spam_score: -2.3 X-Spam_bar: -- X-Spam_report: (-2.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, LOTS_OF_MONEY=0.001, MONEY_NOHTML=2.091, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1767841778394158500 From: Philippe Mathieu-Daud=C3=A9 All machines now use the linuxboot_dma.bin binary, so it's safe to remove the non-DMA version (linuxboot.bin). Suggested-by: Thomas Huth Reviewed-by: Zhao Liu Signed-off-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Zhao Liu Reviewed-by: Thomas Huth --- Changes since v4: * Update commit message: not only pc, but also microvm enables DMA for FwCfgState (in microvm_memory_init). --- hw/i386/pc.c | 3 +- pc-bios/meson.build | 1 - pc-bios/optionrom/Makefile | 2 +- pc-bios/optionrom/linuxboot.S | 195 ---------------------------------- 4 files changed, 2 insertions(+), 199 deletions(-) delete mode 100644 pc-bios/optionrom/linuxboot.S diff --git a/hw/i386/pc.c b/hw/i386/pc.c index f029c7323bcb..4783216c5e09 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -666,8 +666,7 @@ void xen_load_linux(PCMachineState *pcms) =20 x86_load_linux(x86ms, fw_cfg, PC_FW_DATA, pcmc->pvh_enabled); for (i =3D 0; i < nb_option_roms; i++) { - assert(!strcmp(option_rom[i].name, "linuxboot.bin") || - !strcmp(option_rom[i].name, "linuxboot_dma.bin") || + assert(!strcmp(option_rom[i].name, "linuxboot_dma.bin") || !strcmp(option_rom[i].name, "pvh.bin") || !strcmp(option_rom[i].name, "multiboot_dma.bin")); rom_add_option(option_rom[i].name, option_rom[i].bootindex); diff --git a/pc-bios/meson.build b/pc-bios/meson.build index efe45c16705d..2f470ed12942 100644 --- a/pc-bios/meson.build +++ b/pc-bios/meson.build @@ -63,7 +63,6 @@ blobs =3D [ 'efi-vmxnet3.rom', 'qemu-nsis.bmp', 'multiboot_dma.bin', - 'linuxboot.bin', 'linuxboot_dma.bin', 'kvmvapic.bin', 'pvh.bin', diff --git a/pc-bios/optionrom/Makefile b/pc-bios/optionrom/Makefile index 1183ef889228..e694c7aac007 100644 --- a/pc-bios/optionrom/Makefile +++ b/pc-bios/optionrom/Makefile @@ -2,7 +2,7 @@ include config.mak SRC_DIR :=3D $(TOPSRC_DIR)/pc-bios/optionrom VPATH =3D $(SRC_DIR) =20 -all: multiboot_dma.bin linuxboot.bin linuxboot_dma.bin kvmvapic.bin pvh.bin +all: multiboot_dma.bin linuxboot_dma.bin kvmvapic.bin pvh.bin # Dummy command so that make thinks it has done something @true =20 diff --git a/pc-bios/optionrom/linuxboot.S b/pc-bios/optionrom/linuxboot.S deleted file mode 100644 index ba821ab922da..000000000000 --- a/pc-bios/optionrom/linuxboot.S +++ /dev/null @@ -1,195 +0,0 @@ -/* - * Linux Boot Option ROM - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see . - * - * Copyright Novell Inc, 2009 - * Authors: Alexander Graf - * - * Based on code in hw/pc.c. - */ - -#include "optionrom.h" - -#define BOOT_ROM_PRODUCT "Linux loader" - -BOOT_ROM_START - -run_linuxboot: - - cli - cld - - jmp copy_kernel -boot_kernel: - - read_fw FW_CFG_SETUP_ADDR - - mov %eax, %ebx - shr $4, %ebx - - /* All segments contain real_addr */ - mov %bx, %ds - mov %bx, %es - mov %bx, %fs - mov %bx, %gs - mov %bx, %ss - - /* CX =3D CS we want to jump to */ - add $0x20, %bx - mov %bx, %cx - - /* SP =3D cmdline_addr-real_addr-16 */ - read_fw FW_CFG_CMDLINE_ADDR - mov %eax, %ebx - read_fw FW_CFG_SETUP_ADDR - sub %eax, %ebx - sub $16, %ebx - mov %ebx, %esp - - /* Build indirect lret descriptor */ - pushw %cx /* CS */ - xor %ax, %ax - pushw %ax /* IP =3D 0 */ - - /* Clear registers */ - xor %eax, %eax - xor %ebx, %ebx - xor %ecx, %ecx - xor %edx, %edx - xor %edi, %edi - xor %ebp, %ebp - - /* Jump to Linux */ - lret - - -copy_kernel: - /* Read info block in low memory (0x10000 or 0x90000) */ - read_fw FW_CFG_SETUP_ADDR - shr $4, %eax - mov %eax, %es - xor %edi, %edi - read_fw_blob_addr32_edi(FW_CFG_SETUP) - - cmpw $0x203, %es:0x206 // if protocol >=3D 0x203 - jae 1f // have initrd_max - movl $0x37ffffff, %es:0x22c // else assume 0x37ffffff -1: - - /* Check if using kernel-specified initrd address */ - read_fw FW_CFG_INITRD_ADDR - mov %eax, %edi // (load_kernel wants it in %edi) - read_fw FW_CFG_INITRD_SIZE // find end of initrd - add %edi, %eax - xor %es:0x22c, %eax // if it matches es:0x22c - and $-4096, %eax // (apart from padding for page) - jz load_kernel // then initrd is not at top - // of memory - - /* pc.c placed the initrd at end of memory. Compute a better - * initrd address based on e801 data. - */ - mov $0xe801, %ax - xor %cx, %cx - xor %dx, %dx - int $0x15 - - /* Output could be in AX/BX or CX/DX */ - or %cx, %cx - jnz 1f - or %dx, %dx - jnz 1f - mov %ax, %cx - mov %bx, %dx -1: - - or %dx, %dx - jnz 2f - addw $1024, %cx /* add 1 MB */ - movzwl %cx, %edi - shll $10, %edi /* convert to bytes */ - jmp 3f - -2: - addw $16777216 >> 16, %dx /* add 16 MB */ - movzwl %dx, %edi - shll $16, %edi /* convert to bytes */ - -3: - read_fw FW_CFG_INITRD_SIZE - subl %eax, %edi - andl $-4096, %edi /* EDI =3D start of initrd */ - movl %edi, %es:0x218 /* put it in the header */ - -load_kernel: - /* We need to load the kernel into memory we can't access in 16 bit - mode, so let's get into 32 bit mode, write the kernel and jump - back again. */ - - /* Reserve space on the stack for our GDT descriptor. */ - mov %esp, %ebp - sub $16, %esp - - /* Now create the GDT descriptor */ - movw $((3 * 8) - 1), -16(%bp) - mov %cs, %eax - movzwl %ax, %eax - shl $4, %eax - addl $gdt, %eax - movl %eax, -14(%bp) - - /* And load the GDT */ - data32 lgdt -16(%bp) - mov %ebp, %esp - - /* Get us to protected mode now */ - mov $1, %eax - mov %eax, %cr0 - - /* So we can set ES to a 32-bit segment */ - mov $0x10, %eax - mov %eax, %es - - /* We're now running in 16-bit CS, but 32-bit ES! */ - - /* Load kernel and initrd */ - read_fw_blob_addr32_edi(FW_CFG_INITRD) - read_fw_blob_addr32(FW_CFG_KERNEL) - read_fw_blob_addr32(FW_CFG_CMDLINE) - - /* And now jump into Linux! */ - mov $0, %eax - mov %eax, %cr0 - - /* ES =3D CS */ - mov %cs, %ax - mov %ax, %es - - jmp boot_kernel - -/* Variables */ - -.align 4, 0 -gdt: - /* 0x00 */ -.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 - - /* 0x08: code segment (base=3D0, limit=3D0xfffff, type=3D32bit code exec/= read, DPL=3D0, 4k) */ -.byte 0xff, 0xff, 0x00, 0x00, 0x00, 0x9a, 0xcf, 0x00 - - /* 0x10: data segment (base=3D0, limit=3D0xfffff, type=3D32bit data read/= write, DPL=3D0, 4k) */ -.byte 0xff, 0xff, 0x00, 0x00, 0x00, 0x92, 0xcf, 0x00 - -BOOT_ROM_END --=20 2.34.1 From nobody Mon Feb 2 07:27:05 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1767841840; cv=none; d=zohomail.com; s=zohoarc; b=b/elVHsSWOeONFWEuT5+EgNliz/9ba8kRgC+60pF31eHMUZAv/LJZPSR1RPcjUVa5YqBi1hdqyvYvkMaSGwHWiGlZTdVfdknisS88kno5Xb/CS0mBl/dUalP1bNfyuzpjaQyfKZkIEDZY3bAdEBB7wOIV6QHoofNSk4X7a/b+yc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1767841840; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=UDA+ph7wZkhpEv7qXkRa/j6txu70Cj2RAJ5P6yYXxoo=; b=CuIUmlIc57Z9f53FnB9BgIyvoYnmpAIvo5F//2bq6rkgQfIlT23859oNgv5wFBZjEXszhjLoWd5tcbFuS62MXO92a+oq7WMTKk9RfH9GespPeDEHLwPZjJPAJydhU/AVgrxwgqBWJjEfndWDa6tHTGZ71xSIwf4vicx+bGVs4ss= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1767841840298425.66213025287084; Wed, 7 Jan 2026 19:10:40 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vdgNi-0004Tb-09; Wed, 07 Jan 2026 22:08:14 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vdgNe-00047J-Vv; Wed, 07 Jan 2026 22:08:11 -0500 Received: from mgamail.intel.com ([198.175.65.9]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vdgNd-0005Lk-3T; Wed, 07 Jan 2026 22:08:10 -0500 Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jan 2026 19:08:07 -0800 Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.39]) by orviesa006.jf.intel.com with ESMTP; 07 Jan 2026 19:07:57 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1767841690; x=1799377690; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ckSnMyvgyGeZ6bDNlS111ojYxxq4qhk1knTSa06gqf0=; b=O6M1zEbs+b2ps5iqtj14RO03XrvmqzJtjkQ7JI03BnIfe5tZ8iwHj/IM TzbnbZhBBnYeO8OoX8LlMyBFchyumXJ/pGERE1nH2bUMo8QDiEMEz+uny UiM+ZFTaIrwJgWQeOExiNaxO9ZTm19rW3BLz1JwXx2Xd/pDiR4lJ4OeJt deCOcCGxv8ywhtsfNZTsW9b9NqsPPNC+4is9is7cNnwW6/W3qAAan9elJ o8aV436ErKiur/Kf+ZyhRyIwgKi1ZwgT30Fkoo5vt0dXau5F0FHvGKKmb qbeUo8Rse7faLK/YlfdEwzqXD8RfE2EQoXgK2jG1iECIUqpcIAQ4yvDrc A==; X-CSE-ConnectionGUID: Il/l8DjzT8KQxK4dWc7BLg== X-CSE-MsgGUID: j+PM9o4iSGmD57ha63e5NA== X-IronPort-AV: E=McAfee;i="6800,10657,11664"; a="91877365" X-IronPort-AV: E=Sophos;i="6.21,209,1763452800"; d="scan'208";a="91877365" X-CSE-ConnectionGUID: zRNw9JwVQaSJl0olFtIhew== X-CSE-MsgGUID: SbQo8FEXQlKfMzmxoAHulg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,209,1763452800"; d="scan'208";a="202211059" From: Zhao Liu To: Paolo Bonzini , "Michael S . Tsirkin" , Igor Mammedov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Thomas Huth Cc: qemu-devel@nongnu.org, devel@lists.libvirt.org, kvm@vger.kernel.org, qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Richard Henderson , Sergio Lopez , Gerd Hoffmann , Peter Maydell , Laurent Vivier , Jiaxun Yang , Yi Liu , Eduardo Habkost , Alistair Francis , Daniel Henrique Barboza , Marcelo Tosatti , Weiwei Li , Amit Shah , Xiaoyao Li , Yanan Wang , Helge Deller , Palmer Dabbelt , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Ani Sinha , Fabiano Rosas , Liu Zhiwei , =?UTF-8?q?Cl=C3=A9ment=20Mathieu--Drif?= , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Huacai Chen , Jason Wang , Mark Cave-Ayland , BALATON Zoltan , Peter Krempa , Jiri Denemark , Zhao Liu Subject: [PATCH v6 16/27] hw/i386/pc: Remove pc_compat_2_6[] array Date: Thu, 8 Jan 2026 11:30:40 +0800 Message-Id: <20260108033051.777361-17-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260108033051.777361-1-zhao1.liu@intel.com> References: <20260108033051.777361-1-zhao1.liu@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.9; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1767841840531158500 From: Philippe Mathieu-Daud=C3=A9 The pc_compat_2_6[] array was only used by the pc-q35-2.6 and pc-i440fx-2.6 machines, which got removed. Remove it. Reviewed-by: Mark Cave-Ayland Reviewed-by: Thomas Huth Reviewed-by: Zhao Liu Reviewed-by: Igor Mammedov Signed-off-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Zhao Liu --- hw/i386/pc.c | 8 -------- include/hw/i386/pc.h | 3 --- 2 files changed, 11 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 4783216c5e09..4b5b7f24d7de 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -263,14 +263,6 @@ GlobalProperty pc_compat_2_7[] =3D { }; const size_t pc_compat_2_7_len =3D G_N_ELEMENTS(pc_compat_2_7); =20 -GlobalProperty pc_compat_2_6[] =3D { - { TYPE_X86_CPU, "cpuid-0xb", "off" }, - { "vmxnet3", "romfile", "" }, - { TYPE_X86_CPU, "fill-mtrr-mask", "off" }, - { "apic-common", "legacy-instance-id", "on", } -}; -const size_t pc_compat_2_6_len =3D G_N_ELEMENTS(pc_compat_2_6); - /* * @PC_FW_DATA: * Size of the chunk of memory at the top of RAM for the BIOS ACPI tables diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 3f94bc5652a9..0f7d656b3f3b 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -295,9 +295,6 @@ extern const size_t pc_compat_2_8_len; extern GlobalProperty pc_compat_2_7[]; extern const size_t pc_compat_2_7_len; =20 -extern GlobalProperty pc_compat_2_6[]; -extern const size_t pc_compat_2_6_len; - #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ static void pc_machine_##suffix##_class_init(ObjectClass *oc, \ const void *data) \ --=20 2.34.1 From nobody Mon Feb 2 07:27:05 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1767841808; cv=none; d=zohomail.com; s=zohoarc; b=Q02tpwCdnrSOqv5pN7v185ULMIBUaWkYtoHN9zhwrG0tdGVqOBkaypcVoK0+wjjWtyjxHTxG+wHonnsLk8MLbrf4pXlhp4DdI2XEZBcKiT2CIE7uAJa1zYTugj2bGCq9CG+cpelwYlwe5KVYxcN6xiEplGXvGo328F9PrjPh3lI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1767841808; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=psC573tyGNWjwpdIgqwyd6FMrKM6PhfBcJ8Eh872OQk=; b=PYKG4dRU+vnxOAA3+dZI+UUoSnrUjTln06/k+/UB9ud3LfoIEBBBz97yh6KcPC8wb1DuRw/4vAPZmPHnndX7NeNzdV8xCaTlsZRbsh67Wm3W6yYY3SsO+Dm2u9P1zKDtBD8KntosQ/dNuVzPUb2LVLB4ic2IV1PRfNLym2iGD28= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 176784180814754.160283481187776; Wed, 7 Jan 2026 19:10:08 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vdgOP-0005VB-Tv; Wed, 07 Jan 2026 22:09:00 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vdgNn-00054d-Vl; Wed, 07 Jan 2026 22:08:20 -0500 Received: from mgamail.intel.com ([198.175.65.9]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vdgNm-0005Om-4Y; Wed, 07 Jan 2026 22:08:19 -0500 Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jan 2026 19:08:16 -0800 Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.39]) by orviesa006.jf.intel.com with ESMTP; 07 Jan 2026 19:08:06 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1767841699; x=1799377699; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=bViFc5gPbLLdovLuGgpm8Gleys7YArcVZOQcG9JoFFs=; b=SL2SlEOS60ZeSNhC/CHMoIZDwnwd36DbgZ5zvbha1LY9nCFQlbYaWML8 33mJYnmZ+19iOxyHtIaAwx5y7s3LgCqCDHD1/MbE32rY/ypcEJsUY8NMG 1QuLPIYp7t210KqefReRNAV9JT8DsJaCGOQ7gi7yZMugb+jse+DwmgzuI ahp/f2bw/gFVmwI/RmgV7z0jvu9SJway/8EcNNqT27+dpxTjpdT3SqnVZ re+71dtqDsYiNcmV29DwRSdLUXsOqny5uX3RubeUvr5SNChEhnYHKJ55P 3c/jYgwv36K0ANxAb9AMmnD+aa9UVsDEZcupwGnRRBHt6Q8MO2vqZpxWK w==; X-CSE-ConnectionGUID: YK5TJXYCS06WxmXfCM98LQ== X-CSE-MsgGUID: I5vruoR4S+62TQIrdKGuTw== X-IronPort-AV: E=McAfee;i="6800,10657,11664"; a="91877398" X-IronPort-AV: E=Sophos;i="6.21,209,1763452800"; d="scan'208";a="91877398" X-CSE-ConnectionGUID: X5XOSFyWTH+WzpY7szud8w== X-CSE-MsgGUID: BPvuIPPmRlOxQNQ51FXsYQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,209,1763452800"; d="scan'208";a="202211086" From: Zhao Liu To: Paolo Bonzini , "Michael S . Tsirkin" , Igor Mammedov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Thomas Huth Cc: qemu-devel@nongnu.org, devel@lists.libvirt.org, kvm@vger.kernel.org, qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Richard Henderson , Sergio Lopez , Gerd Hoffmann , Peter Maydell , Laurent Vivier , Jiaxun Yang , Yi Liu , Eduardo Habkost , Alistair Francis , Daniel Henrique Barboza , Marcelo Tosatti , Weiwei Li , Amit Shah , Xiaoyao Li , Yanan Wang , Helge Deller , Palmer Dabbelt , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Ani Sinha , Fabiano Rosas , Liu Zhiwei , =?UTF-8?q?Cl=C3=A9ment=20Mathieu--Drif?= , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Huacai Chen , Jason Wang , Mark Cave-Ayland , BALATON Zoltan , Peter Krempa , Jiri Denemark , Zhao Liu Subject: [PATCH v6 17/27] hw/intc/apic: Remove APICCommonState::legacy_instance_id field Date: Thu, 8 Jan 2026 11:30:41 +0800 Message-Id: <20260108033051.777361-18-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260108033051.777361-1-zhao1.liu@intel.com> References: <20260108033051.777361-1-zhao1.liu@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.9; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1767841808461158500 From: Philippe Mathieu-Daud=C3=A9 The APICCommonState::legacy_instance_id boolean was only set in the pc_compat_2_6[] array, via the 'legacy-instance-id=3Don' property. We removed all machines using that array, lets remove that property, simplifying apic_common_realize(). Because instance_id is initialized as initial_apic_id, we can not register vmstate_apic_common directly via dc->vmsd. Reviewed-by: Mark Cave-Ayland Reviewed-by: Thomas Huth Reviewed-by: Igor Mammedov Reviewed-by: Zhao Liu Signed-off-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Zhao Liu --- hw/intc/apic_common.c | 5 ----- include/hw/i386/apic_internal.h | 1 - 2 files changed, 6 deletions(-) diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c index 4e9e30899457..bf4abc21d7bb 100644 --- a/hw/intc/apic_common.c +++ b/hw/intc/apic_common.c @@ -276,9 +276,6 @@ static void apic_common_realize(DeviceState *dev, Error= **errp) info->enable_tpr_reporting(s, true); } =20 - if (s->legacy_instance_id) { - instance_id =3D VMSTATE_INSTANCE_ID_ANY; - } vmstate_register_with_alias_id(NULL, instance_id, &vmstate_apic_common, s, -1, 0, NULL); =20 @@ -395,8 +392,6 @@ static const Property apic_properties_common[] =3D { DEFINE_PROP_UINT8("version", APICCommonState, version, 0x14), DEFINE_PROP_BIT("vapic", APICCommonState, vapic_control, VAPIC_ENABLE_= BIT, true), - DEFINE_PROP_BOOL("legacy-instance-id", APICCommonState, legacy_instanc= e_id, - false), }; =20 static void apic_common_get_id(Object *obj, Visitor *v, const char *name, diff --git a/include/hw/i386/apic_internal.h b/include/hw/i386/apic_interna= l.h index 4a62fdceb4ea..0cb06bbc76c9 100644 --- a/include/hw/i386/apic_internal.h +++ b/include/hw/i386/apic_internal.h @@ -187,7 +187,6 @@ struct APICCommonState { uint32_t vapic_control; DeviceState *vapic; hwaddr vapic_paddr; /* note: persistence via kvmvapic */ - bool legacy_instance_id; uint32_t extended_log_dest; }; =20 --=20 2.34.1 From nobody Mon Feb 2 07:27:05 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1767841800; cv=none; d=zohomail.com; s=zohoarc; b=WvkqcqngNDbixed84o9OwQl6wjcE8Av0967m/L4zwio+xJBzczYXIJ4vCGhzIDczLtD7N3e5QhV7N7bbDvzcZdme2cytAU8Z/DgTHrikkDcIQQS/DDckO2nBIdsbPDG5SpvUqpwWrpcSfeZVJvmyQYCDbEg24E1NjhiJe6Kq4cA= ARC-Message-Signature: i=1; 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Tsirkin" , Igor Mammedov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Thomas Huth Cc: qemu-devel@nongnu.org, devel@lists.libvirt.org, kvm@vger.kernel.org, qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Richard Henderson , Sergio Lopez , Gerd Hoffmann , Peter Maydell , Laurent Vivier , Jiaxun Yang , Yi Liu , Eduardo Habkost , Alistair Francis , Daniel Henrique Barboza , Marcelo Tosatti , Weiwei Li , Amit Shah , Xiaoyao Li , Yanan Wang , Helge Deller , Palmer Dabbelt , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Ani Sinha , Fabiano Rosas , Liu Zhiwei , =?UTF-8?q?Cl=C3=A9ment=20Mathieu--Drif?= , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Huacai Chen , Jason Wang , Mark Cave-Ayland , BALATON Zoltan , Peter Krempa , Jiri Denemark , Zhao Liu Subject: [PATCH v6 18/27] hw/core/machine: Remove hw_compat_2_6[] array Date: Thu, 8 Jan 2026 11:30:42 +0800 Message-Id: <20260108033051.777361-19-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260108033051.777361-1-zhao1.liu@intel.com> References: <20260108033051.777361-1-zhao1.liu@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.9; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1767841802491158500 From: Philippe Mathieu-Daud=C3=A9 The hw_compat_2_6[] array was only used by the pc-q35-2.6 and pc-i440fx-2.6 machines, which got removed. Remove it. Reviewed-by: Mark Cave-Ayland Reviewed-by: Thomas Huth Reviewed-by: Zhao Liu Reviewed-by: Igor Mammedov Signed-off-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Zhao Liu --- hw/core/machine.c | 8 -------- include/hw/core/boards.h | 3 --- 2 files changed, 11 deletions(-) diff --git a/hw/core/machine.c b/hw/core/machine.c index 51c28468ff96..b01838c88a60 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -290,14 +290,6 @@ GlobalProperty hw_compat_2_7[] =3D { }; const size_t hw_compat_2_7_len =3D G_N_ELEMENTS(hw_compat_2_7); =20 -GlobalProperty hw_compat_2_6[] =3D { - { "virtio-mmio", "format_transport_address", "off" }, - /* Optional because not all virtio-pci devices support legacy mode */ - { "virtio-pci", "disable-modern", "on", .optional =3D true }, - { "virtio-pci", "disable-legacy", "off", .optional =3D true }, -}; -const size_t hw_compat_2_6_len =3D G_N_ELEMENTS(hw_compat_2_6); - MachineState *current_machine; =20 static char *machine_get_kernel(Object *obj, Error **errp) diff --git a/include/hw/core/boards.h b/include/hw/core/boards.h index 815845207b01..b0e3a523a107 100644 --- a/include/hw/core/boards.h +++ b/include/hw/core/boards.h @@ -882,7 +882,4 @@ extern const size_t hw_compat_2_8_len; extern GlobalProperty hw_compat_2_7[]; extern const size_t hw_compat_2_7_len; =20 -extern GlobalProperty hw_compat_2_6[]; -extern const size_t hw_compat_2_6_len; - #endif --=20 2.34.1 From nobody Mon Feb 2 07:27:05 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1767841850; cv=none; d=zohomail.com; s=zohoarc; b=EXEGxylz/kabu7R+xr0fBG1PEI3OWhNNcFbHhziZFqxwXrQEXx6vHNdcjrUlCUFJS1E+h51ns3zC55UvuFxS1rLH70gXwEflBvS/OuLgBm3VkfHInciLU9EGiD+vkTt8Ij7wIk9bnfUsJtzvwg7YwVdb+fyIKBwCr1w/XcHUK6w= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1767841850; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=JA7wigJA4Hch6RdRQ5CdYv97RssAul4OzL/Y87Gs3/k=; b=aBvwnMCe+vWkmDyeBFI9e/4LRs7ydf1eMmHoaYvRXtAAV0osm4B0eytlEfMr/fxCbn47yqw3+lEOr34bvVnRswrunjFg/02p03dfd+9vw6m0dNxbCGLFilI1ibPYOiZrJa/jhliQ2daQiRi1YVH0R1xHjtGoS+GR4uD7FKHFGNU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 176784185092221.72422510293552; Wed, 7 Jan 2026 19:10:50 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vdgPo-00006K-Mw; Wed, 07 Jan 2026 22:10:24 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vdgO6-0005TK-FV; Wed, 07 Jan 2026 22:08:44 -0500 Received: from mgamail.intel.com ([198.175.65.9]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vdgO4-0005Ri-Pg; Wed, 07 Jan 2026 22:08:38 -0500 Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jan 2026 19:08:35 -0800 Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.39]) by orviesa006.jf.intel.com with ESMTP; 07 Jan 2026 19:08:25 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1767841717; x=1799377717; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Q2S1HbfA2OWc8pT/OJc71U77jdxwWD7j1qTYdHBk0fg=; b=kFFpRCRh4bwBTnMslBhyKmuu7RFa+44ZDA7TDCKFXueXLf4/IM4L2da9 VvuddEE2YIRv0auQyXW09oUH43YcYBam/IDLHEhTV0NRiwxgQp2i8nH5T JzhvfwFFKzt5Cv9GPUpzlm07v/9f5+VoCLagyvUMFZQDGRuWDoF60UHDX dNJbktvV0poXPbtIEyx/RCRbERvBK2InGQ2Iuho2B65Ux00249EKrCtWd 3z0KCMDhgCsB3tIfuHYVJnm0yxQ+WkdeWQ4QSRVX7Yxy4EmpdV40fqG9c Xvg2Xf9gm49IY6Ypealj2HBr9Vv0iZig08AFS6ZinorEYYOV9P+Wl0yEr Q==; X-CSE-ConnectionGUID: Ljx2KXscQPWkNsqLfoR1PQ== X-CSE-MsgGUID: wMS6wA9iTxyTY7Y+hred5w== X-IronPort-AV: E=McAfee;i="6800,10657,11664"; a="91877465" X-IronPort-AV: E=Sophos;i="6.21,209,1763452800"; d="scan'208";a="91877465" X-CSE-ConnectionGUID: Zt7DD7dHSre3gamWpWGPog== X-CSE-MsgGUID: 7KNtoah0RZ2dbmCmnpAKyA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,209,1763452800"; d="scan'208";a="202211171" From: Zhao Liu To: Paolo Bonzini , "Michael S . Tsirkin" , Igor Mammedov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Thomas Huth Cc: qemu-devel@nongnu.org, devel@lists.libvirt.org, kvm@vger.kernel.org, qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Richard Henderson , Sergio Lopez , Gerd Hoffmann , Peter Maydell , Laurent Vivier , Jiaxun Yang , Yi Liu , Eduardo Habkost , Alistair Francis , Daniel Henrique Barboza , Marcelo Tosatti , Weiwei Li , Amit Shah , Xiaoyao Li , Yanan Wang , Helge Deller , Palmer Dabbelt , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Ani Sinha , Fabiano Rosas , Liu Zhiwei , =?UTF-8?q?Cl=C3=A9ment=20Mathieu--Drif?= , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Huacai Chen , Jason Wang , Mark Cave-Ayland , BALATON Zoltan , Peter Krempa , Jiri Denemark , Zhao Liu Subject: [PATCH v6 19/27] hw/virtio/virtio-mmio: Remove VirtIOMMIOProxy::format_transport_address field Date: Thu, 8 Jan 2026 11:30:43 +0800 Message-Id: <20260108033051.777361-20-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260108033051.777361-1-zhao1.liu@intel.com> References: <20260108033051.777361-1-zhao1.liu@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.9; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1767841852564158500 From: Philippe Mathieu-Daud=C3=A9 The VirtIOMMIOProxy::format_transport_address boolean was only set in the hw_compat_2_6[] array, via the 'format_transport_address=3Doff' property. We removed all machines using that array, lets remove that property, simplifying virtio_mmio_bus_get_dev_path(). Reviewed-by: Mark Cave-Ayland Reviewed-by: Thomas Huth Reviewed-by: Zhao Liu Reviewed-by: Igor Mammedov Signed-off-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Zhao Liu --- hw/virtio/virtio-mmio.c | 15 --------------- include/hw/virtio/virtio-mmio.h | 1 - 2 files changed, 16 deletions(-) diff --git a/hw/virtio/virtio-mmio.c b/hw/virtio/virtio-mmio.c index 0b0412b22f23..742ca3d3e4d3 100644 --- a/hw/virtio/virtio-mmio.c +++ b/hw/virtio/virtio-mmio.c @@ -764,8 +764,6 @@ static void virtio_mmio_pre_plugged(DeviceState *d, Err= or **errp) /* virtio-mmio device */ =20 static const Property virtio_mmio_properties[] =3D { - DEFINE_PROP_BOOL("format_transport_address", VirtIOMMIOProxy, - format_transport_address, true), DEFINE_PROP_BOOL("force-legacy", VirtIOMMIOProxy, legacy, true), DEFINE_PROP_BIT("ioeventfd", VirtIOMMIOProxy, flags, VIRTIO_IOMMIO_FLAG_USE_IOEVENTFD_BIT, true), @@ -827,19 +825,6 @@ static char *virtio_mmio_bus_get_dev_path(DeviceState = *dev) virtio_mmio_proxy =3D VIRTIO_MMIO(virtio_mmio_bus->parent); proxy_path =3D qdev_get_dev_path(DEVICE(virtio_mmio_proxy)); =20 - /* - * If @format_transport_address is false, then we just perform the sam= e as - * virtio_bus_get_dev_path(): we delegate the address formatting for t= he - * device on the virtio-mmio bus to the bus that the virtio-mmio proxy - * (i.e., the device that implements the virtio-mmio bus) resides on. = In - * this case the base address of the virtio-mmio transport will be - * invisible. - */ - if (!virtio_mmio_proxy->format_transport_address) { - return proxy_path; - } - - /* Otherwise, we append the base address of the transport. */ section =3D memory_region_find(&virtio_mmio_proxy->iomem, 0, 0x200); assert(section.mr); =20 diff --git a/include/hw/virtio/virtio-mmio.h b/include/hw/virtio/virtio-mmi= o.h index 1eab3c0decef..1644d0981050 100644 --- a/include/hw/virtio/virtio-mmio.h +++ b/include/hw/virtio/virtio-mmio.h @@ -66,7 +66,6 @@ struct VirtIOMMIOProxy { uint32_t guest_page_shift; /* virtio-bus */ VirtioBusState bus; - bool format_transport_address; /* Fields only used for non-legacy (v2) devices */ uint32_t guest_features[2]; VirtIOMMIOQueue vqs[VIRTIO_QUEUE_MAX]; --=20 2.34.1 From nobody Mon Feb 2 07:27:05 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1767841849; cv=none; d=zohomail.com; s=zohoarc; b=DItBM+q7U5bSZA3ClzkrZfDzrQhFYH8ifHubM2sWuvVhYYhgbS/iF2nDwR92vyRnSamDSLlPemxPDDAJwTOl2e0UXwpEY6TLPG9keAC5kwLf8mDzdDMLYpCjsdIEHPvkbG+egmoGUOi6nEDyUp0UMnaMaKbm5osuJ5cCaHr8ftM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1767841849; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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X-CSE-ConnectionGUID: KA9xDJMuS0eYe9O7O9l07Q== X-CSE-MsgGUID: 7lhevCihQEWm1gTg6PAeFQ== X-IronPort-AV: E=McAfee;i="6800,10657,11664"; a="91877479" X-IronPort-AV: E=Sophos;i="6.21,209,1763452800"; d="scan'208";a="91877479" X-CSE-ConnectionGUID: Zv1AUI/OSAW+OTck5ZMlOQ== X-CSE-MsgGUID: tkO918hkRPCB9Zo2CiWFPw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,209,1763452800"; d="scan'208";a="202211203" From: Zhao Liu To: Paolo Bonzini , "Michael S . Tsirkin" , Igor Mammedov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Thomas Huth Cc: qemu-devel@nongnu.org, devel@lists.libvirt.org, kvm@vger.kernel.org, qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Richard Henderson , Sergio Lopez , Gerd Hoffmann , Peter Maydell , Laurent Vivier , Jiaxun Yang , Yi Liu , Eduardo Habkost , Alistair Francis , Daniel Henrique Barboza , Marcelo Tosatti , Weiwei Li , Amit Shah , Xiaoyao Li , Yanan Wang , Helge Deller , Palmer Dabbelt , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Ani Sinha , Fabiano Rosas , Liu Zhiwei , =?UTF-8?q?Cl=C3=A9ment=20Mathieu--Drif?= , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Huacai Chen , Jason Wang , Mark Cave-Ayland , BALATON Zoltan , Peter Krempa , Jiri Denemark , Zhao Liu Subject: [PATCH v6 20/27] hw/i386/pc: Remove deprecated pc-q35-2.7 and pc-i440fx-2.7 machines Date: Thu, 8 Jan 2026 11:30:44 +0800 Message-Id: <20260108033051.777361-21-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260108033051.777361-1-zhao1.liu@intel.com> References: <20260108033051.777361-1-zhao1.liu@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.9; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1767841850633158500 From: Philippe Mathieu-Daud=C3=A9 These machines has been supported for a period of more than 6 years. According to our versioned machine support policy (see commit ce80c4fa6ff "docs: document special exception for machine type deprecation & removal") they can now be removed. Remove the qtest in test-x86-cpuid-compat.c file. Reviewed-by: Mark Cave-Ayland Reviewed-by: Thomas Huth Reviewed-by: Zhao Liu Reviewed-by: Igor Mammedov Signed-off-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Zhao Liu --- hw/i386/pc_piix.c | 9 --------- hw/i386/pc_q35.c | 10 ---------- tests/qtest/test-x86-cpuid-compat.c | 11 ----------- 3 files changed, 30 deletions(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index fa1025dcfd85..6f6e011d6c42 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -724,15 +724,6 @@ static void pc_i440fx_machine_2_8_options(MachineClass= *m) =20 DEFINE_I440FX_MACHINE(2, 8); =20 -static void pc_i440fx_machine_2_7_options(MachineClass *m) -{ - pc_i440fx_machine_2_8_options(m); - compat_props_add(m->compat_props, hw_compat_2_7, hw_compat_2_7_len); - compat_props_add(m->compat_props, pc_compat_2_7, pc_compat_2_7_len); -} - -DEFINE_I440FX_MACHINE(2, 7); - #ifdef CONFIG_XEN static void xenfv_machine_4_2_options(MachineClass *m) { diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 7214a4232ffc..969366df9608 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -671,13 +671,3 @@ static void pc_q35_machine_2_8_options(MachineClass *m) } =20 DEFINE_Q35_MACHINE(2, 8); - -static void pc_q35_machine_2_7_options(MachineClass *m) -{ - pc_q35_machine_2_8_options(m); - m->max_cpus =3D 255; - compat_props_add(m->compat_props, hw_compat_2_7, hw_compat_2_7_len); - compat_props_add(m->compat_props, pc_compat_2_7, pc_compat_2_7_len); -} - -DEFINE_Q35_MACHINE(2, 7); diff --git a/tests/qtest/test-x86-cpuid-compat.c b/tests/qtest/test-x86-cpu= id-compat.c index 456e2af66572..5e0547e81b7b 100644 --- a/tests/qtest/test-x86-cpuid-compat.c +++ b/tests/qtest/test-x86-cpuid-compat.c @@ -345,17 +345,6 @@ int main(int argc, char **argv) =20 /* Check compatibility of old machine-types that didn't * auto-increase level/xlevel/xlevel2: */ - if (qtest_has_machine("pc-i440fx-2.7")) { - add_cpuid_test("x86/cpuid/auto-level/pc-2.7", - "486", "arat=3Don,avx512vbmi=3Don,xsaveopt=3Don", - "pc-i440fx-2.7", "level", 1); - add_cpuid_test("x86/cpuid/auto-xlevel/pc-2.7", - "486", "3dnow=3Don,sse4a=3Don,invtsc=3Don,npt=3Don,= svm=3Don", - "pc-i440fx-2.7", "xlevel", 0); - add_cpuid_test("x86/cpuid/auto-xlevel2/pc-2.7", - "486", "xstore=3Don", "pc-i440fx-2.7", - "xlevel2", 0); - } if (qtest_has_machine("pc-i440fx-2.9")) { add_cpuid_test("x86/cpuid/auto-level7/pc-i440fx-2.9/off", "Conroe", NULL, "pc-i440fx-2.9", --=20 2.34.1 From nobody Mon Feb 2 07:27:05 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1767841882; cv=none; d=zohomail.com; s=zohoarc; b=PK/YNtHUsEU1iZsW0/rE9zlmFIZ3u8MevD7LSjWVEnvmLyrl2o8ogOFeIfb8voMoR/HyuP5SmC6G2qfkbw6KdDMBzEzjhNKXcmJ/PNps4UwcLJmQA5tfIRpSfSuWHU8gpR6rpxsOm6xxRsj9c34neEUSOCZY3HnmlTej9OkmNwQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1767841882; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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X-CSE-ConnectionGUID: r1yTFqcHRfqyXRuj+3ZY2w== X-CSE-MsgGUID: i36SkxgiSFGauR4F7h05pw== X-IronPort-AV: E=McAfee;i="6800,10657,11664"; a="91877516" X-IronPort-AV: E=Sophos;i="6.21,209,1763452800"; d="scan'208";a="91877516" X-CSE-ConnectionGUID: QeaaR3ZcS/GCyk4pHbqDXA== X-CSE-MsgGUID: QP/qxYHGQt2VmzYGLblkNA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,209,1763452800"; d="scan'208";a="202211209" From: Zhao Liu To: Paolo Bonzini , "Michael S . Tsirkin" , Igor Mammedov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Thomas Huth Cc: qemu-devel@nongnu.org, devel@lists.libvirt.org, kvm@vger.kernel.org, qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Richard Henderson , Sergio Lopez , Gerd Hoffmann , Peter Maydell , Laurent Vivier , Jiaxun Yang , Yi Liu , Eduardo Habkost , Alistair Francis , Daniel Henrique Barboza , Marcelo Tosatti , Weiwei Li , Amit Shah , Xiaoyao Li , Yanan Wang , Helge Deller , Palmer Dabbelt , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Ani Sinha , Fabiano Rosas , Liu Zhiwei , =?UTF-8?q?Cl=C3=A9ment=20Mathieu--Drif?= , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Huacai Chen , Jason Wang , Mark Cave-Ayland , BALATON Zoltan , Peter Krempa , Jiri Denemark , Zhao Liu Subject: [PATCH v6 21/27] hw/i386/pc: Remove pc_compat_2_7[] array Date: Thu, 8 Jan 2026 11:30:45 +0800 Message-Id: <20260108033051.777361-22-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260108033051.777361-1-zhao1.liu@intel.com> References: <20260108033051.777361-1-zhao1.liu@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.9; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1767841882648158500 From: Philippe Mathieu-Daud=C3=A9 The pc_compat_2_7[] array was only used by the pc-q35-2.7 and pc-i440fx-2.7 machines, which got removed. Remove it. Reviewed-by: Mark Cave-Ayland Reviewed-by: Zhao Liu Reviewed-by: Thomas Huth Reviewed-by: Igor Mammedov Signed-off-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Zhao Liu --- hw/i386/pc.c | 10 ---------- include/hw/i386/pc.h | 3 --- 2 files changed, 13 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 4b5b7f24d7de..4dfdd040fb13 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -253,16 +253,6 @@ GlobalProperty pc_compat_2_8[] =3D { }; const size_t pc_compat_2_8_len =3D G_N_ELEMENTS(pc_compat_2_8); =20 -GlobalProperty pc_compat_2_7[] =3D { - { TYPE_X86_CPU, "l3-cache", "off" }, - { TYPE_X86_CPU, "full-cpuid-auto-level", "off" }, - { "Opteron_G3" "-" TYPE_X86_CPU, "family", "15" }, - { "Opteron_G3" "-" TYPE_X86_CPU, "model", "6" }, - { "Opteron_G3" "-" TYPE_X86_CPU, "stepping", "1" }, - { "isa-pcspk", "migrate", "off" }, -}; -const size_t pc_compat_2_7_len =3D G_N_ELEMENTS(pc_compat_2_7); - /* * @PC_FW_DATA: * Size of the chunk of memory at the top of RAM for the BIOS ACPI tables diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 0f7d656b3f3b..5d698d024258 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -292,9 +292,6 @@ extern const size_t pc_compat_2_9_len; extern GlobalProperty pc_compat_2_8[]; extern const size_t pc_compat_2_8_len; =20 -extern GlobalProperty pc_compat_2_7[]; -extern const size_t pc_compat_2_7_len; - #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ static void pc_machine_##suffix##_class_init(ObjectClass *oc, \ const void *data) \ --=20 2.34.1 From nobody Mon Feb 2 07:27:05 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1767841851; cv=none; d=zohomail.com; s=zohoarc; b=fMtKfucYX0C8+/lEe/WF5qDifOC4F4MrZ++lPHe9VW6fm6qMDNsh+3KtJSHZLC7NjmtmjL073LMZnjMCOgdYbJzJYXSZbc61hlvvU5xEre+qGNgyEW8MR1M/+rjcz6WfPwy4HKga0mkvyBx/1VyscctF10AJGKsVUJh9TsI9e4M= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; 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Tsirkin" , Igor Mammedov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Thomas Huth Cc: qemu-devel@nongnu.org, devel@lists.libvirt.org, kvm@vger.kernel.org, qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Richard Henderson , Sergio Lopez , Gerd Hoffmann , Peter Maydell , Laurent Vivier , Jiaxun Yang , Yi Liu , Eduardo Habkost , Alistair Francis , Daniel Henrique Barboza , Marcelo Tosatti , Weiwei Li , Amit Shah , Xiaoyao Li , Yanan Wang , Helge Deller , Palmer Dabbelt , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Ani Sinha , Fabiano Rosas , Liu Zhiwei , =?UTF-8?q?Cl=C3=A9ment=20Mathieu--Drif?= , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Huacai Chen , Jason Wang , Mark Cave-Ayland , BALATON Zoltan , Peter Krempa , Jiri Denemark , Zhao Liu Subject: [PATCH v6 22/27] target/i386/cpu: Remove CPUX86State::full_cpuid_auto_level field Date: Thu, 8 Jan 2026 11:30:46 +0800 Message-Id: <20260108033051.777361-23-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260108033051.777361-1-zhao1.liu@intel.com> References: <20260108033051.777361-1-zhao1.liu@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.9; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1767841852530158500 From: Philippe Mathieu-Daud=C3=A9 The CPUX86State::full_cpuid_auto_level boolean was only disabled for the pc-q35-2.7 and pc-i440fx-2.7 machines, which got removed. Being now always %true, we can remove it and simplify x86_cpu_expand_features(). Reviewed-by: Zhao Liu Reviewed-by: Igor Mammedov Signed-off-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Zhao Liu --- Note, although libvirt still uses this property in its test cases, it was confirmed this property is not exposed to user directly [*]. [*]: https://lore.kernel.org/qemu-devel/aDmphSY1MSxu7L9R@orkuz.int.mamuti.n= et/ --- target/i386/cpu.c | 119 ++++++++++++++++++++++------------------------ target/i386/cpu.h | 3 -- 2 files changed, 58 insertions(+), 64 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 37803cd72490..1de70ad99db1 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -9518,74 +9518,72 @@ void x86_cpu_expand_features(X86CPU *cpu, Error **e= rrp) =20 /* CPUID[EAX=3D7,ECX=3D0].EBX always increased level automatically: */ x86_cpu_adjust_feat_level(cpu, FEAT_7_0_EBX); - if (cpu->full_cpuid_auto_level) { - x86_cpu_adjust_feat_level(cpu, FEAT_1_EDX); - x86_cpu_adjust_feat_level(cpu, FEAT_1_ECX); - x86_cpu_adjust_feat_level(cpu, FEAT_6_EAX); - x86_cpu_adjust_feat_level(cpu, FEAT_7_0_ECX); - x86_cpu_adjust_feat_level(cpu, FEAT_7_1_EAX); - x86_cpu_adjust_feat_level(cpu, FEAT_7_1_ECX); - x86_cpu_adjust_feat_level(cpu, FEAT_7_1_EDX); - x86_cpu_adjust_feat_level(cpu, FEAT_7_2_EDX); - x86_cpu_adjust_feat_level(cpu, FEAT_8000_0001_EDX); - x86_cpu_adjust_feat_level(cpu, FEAT_8000_0001_ECX); - x86_cpu_adjust_feat_level(cpu, FEAT_8000_0007_EDX); - x86_cpu_adjust_feat_level(cpu, FEAT_8000_0008_EBX); - x86_cpu_adjust_feat_level(cpu, FEAT_C000_0001_EDX); - x86_cpu_adjust_feat_level(cpu, FEAT_SVM); - x86_cpu_adjust_feat_level(cpu, FEAT_XSAVE); - - /* Intel Processor Trace requires CPUID[0x14] */ - if ((env->features[FEAT_7_0_EBX] & CPUID_7_0_EBX_INTEL_PT)) { - if (cpu->intel_pt_auto_level) { - x86_cpu_adjust_level(cpu, &cpu->env.cpuid_min_level, 0x14); - } else if (cpu->env.cpuid_min_level < 0x14) { - mark_unavailable_features(cpu, FEAT_7_0_EBX, - CPUID_7_0_EBX_INTEL_PT, - "Intel PT need CPUID leaf 0x14, please set by \"-cpu .= ..,intel-pt=3Don,min-level=3D0x14\""); - } + x86_cpu_adjust_feat_level(cpu, FEAT_1_EDX); + x86_cpu_adjust_feat_level(cpu, FEAT_1_ECX); + x86_cpu_adjust_feat_level(cpu, FEAT_6_EAX); + x86_cpu_adjust_feat_level(cpu, FEAT_7_0_ECX); + x86_cpu_adjust_feat_level(cpu, FEAT_7_1_EAX); + x86_cpu_adjust_feat_level(cpu, FEAT_7_1_ECX); + x86_cpu_adjust_feat_level(cpu, FEAT_7_1_EDX); + x86_cpu_adjust_feat_level(cpu, FEAT_7_2_EDX); + x86_cpu_adjust_feat_level(cpu, FEAT_8000_0001_EDX); + x86_cpu_adjust_feat_level(cpu, FEAT_8000_0001_ECX); + x86_cpu_adjust_feat_level(cpu, FEAT_8000_0007_EDX); + x86_cpu_adjust_feat_level(cpu, FEAT_8000_0008_EBX); + x86_cpu_adjust_feat_level(cpu, FEAT_C000_0001_EDX); + x86_cpu_adjust_feat_level(cpu, FEAT_SVM); + x86_cpu_adjust_feat_level(cpu, FEAT_XSAVE); + + /* Intel Processor Trace requires CPUID[0x14] */ + if ((env->features[FEAT_7_0_EBX] & CPUID_7_0_EBX_INTEL_PT)) { + if (cpu->intel_pt_auto_level) { + x86_cpu_adjust_level(cpu, &cpu->env.cpuid_min_level, 0x14); + } else if (cpu->env.cpuid_min_level < 0x14) { + mark_unavailable_features(cpu, FEAT_7_0_EBX, + CPUID_7_0_EBX_INTEL_PT, + "Intel PT need CPUID leaf 0x14, please set by \"-cpu ...,i= ntel-pt=3Don,min-level=3D0x14\""); } + } =20 - /* - * Intel CPU topology with multi-dies support requires CPUID[0x1F]. - * For AMD Rome/Milan, cpuid level is 0x10, and guest OS should de= tect - * extended toplogy by leaf 0xB. Only adjust it for Intel CPU, unl= ess - * cpu->vendor_cpuid_only has been unset for compatibility with ol= der - * machine types. - */ - if (x86_has_cpuid_0x1f(cpu) && - (IS_INTEL_CPU(env) || !cpu->vendor_cpuid_only)) { - x86_cpu_adjust_level(cpu, &env->cpuid_min_level, 0x1F); - } + /* + * Intel CPU topology with multi-dies support requires CPUID[0x1F]. + * For AMD Rome/Milan, cpuid level is 0x10, and guest OS should detect + * extended toplogy by leaf 0xB. Only adjust it for Intel CPU, unless + * cpu->vendor_cpuid_only has been unset for compatibility with older + * machine types. + */ + if (x86_has_cpuid_0x1f(cpu) && + (IS_INTEL_CPU(env) || !cpu->vendor_cpuid_only)) { + x86_cpu_adjust_level(cpu, &env->cpuid_min_level, 0x1F); + } =20 - /* Advanced Vector Extensions 10 (AVX10) requires CPUID[0x24] */ - if (env->features[FEAT_7_1_EDX] & CPUID_7_1_EDX_AVX10) { - x86_cpu_adjust_level(cpu, &env->cpuid_min_level, 0x24); - } + /* Advanced Vector Extensions 10 (AVX10) requires CPUID[0x24] */ + if (env->features[FEAT_7_1_EDX] & CPUID_7_1_EDX_AVX10) { + x86_cpu_adjust_level(cpu, &env->cpuid_min_level, 0x24); + } =20 - /* Advanced Performance Extensions (APX) requires CPUID[0x29] */ - if (env->features[FEAT_7_1_EDX] & CPUID_7_1_EDX_APXF) { - x86_cpu_adjust_level(cpu, &env->cpuid_min_level, 0x29); - } + /* Advanced Performance Extensions (APX) requires CPUID[0x29] */ + if (env->features[FEAT_7_1_EDX] & CPUID_7_1_EDX_APXF) { + x86_cpu_adjust_level(cpu, &env->cpuid_min_level, 0x29); + } =20 - /* SVM requires CPUID[0x8000000A] */ - if (env->features[FEAT_8000_0001_ECX] & CPUID_EXT3_SVM) { - x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x8000000A); - } + /* SVM requires CPUID[0x8000000A] */ + if (env->features[FEAT_8000_0001_ECX] & CPUID_EXT3_SVM) { + x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x8000000A); + } =20 - /* SEV requires CPUID[0x8000001F] */ - if (sev_enabled()) { - x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x8000001F); - } + /* SEV requires CPUID[0x8000001F] */ + if (sev_enabled()) { + x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x8000001F); + } =20 - if (env->features[FEAT_8000_0021_EAX]) { - x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x80000021); - } + if (env->features[FEAT_8000_0021_EAX]) { + x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x80000021); + } =20 - /* SGX requires CPUID[0x12] for EPC enumeration */ - if (env->features[FEAT_7_0_EBX] & CPUID_7_0_EBX_SGX) { - x86_cpu_adjust_level(cpu, &env->cpuid_min_level, 0x12); - } + /* SGX requires CPUID[0x12] for EPC enumeration */ + if (env->features[FEAT_7_0_EBX] & CPUID_7_0_EBX_SGX) { + x86_cpu_adjust_level(cpu, &env->cpuid_min_level, 0x12); } =20 /* Set cpuid_*level* based on cpuid_min_*level, if not explicitly set = */ @@ -10530,7 +10528,6 @@ static const Property x86_cpu_properties[] =3D { DEFINE_PROP_UINT32("min-xlevel", X86CPU, env.cpuid_min_xlevel, 0), DEFINE_PROP_UINT32("min-xlevel2", X86CPU, env.cpuid_min_xlevel2, 0), DEFINE_PROP_UINT64("ucode-rev", X86CPU, ucode_rev, 0), - DEFINE_PROP_BOOL("full-cpuid-auto-level", X86CPU, full_cpuid_auto_leve= l, true), DEFINE_PROP_STRING("hv-vendor-id", X86CPU, hyperv_vendor), DEFINE_PROP_BOOL("cpuid-0xb", X86CPU, enable_cpuid_0xb, true), DEFINE_PROP_BOOL("x-vendor-cpuid-only", X86CPU, vendor_cpuid_only, tru= e), diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 2bbc977d9088..6503a36d26b1 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -2425,9 +2425,6 @@ struct ArchCPU { /* Force to enable cpuid 0x1f */ bool force_cpuid_0x1f; =20 - /* Enable auto level-increase for all CPUID leaves */ - bool full_cpuid_auto_level; - /* * Compatibility bits for old machine types (PC machine v6.0 and older= ). * Only advertise CPUID leaves defined by the vendor. --=20 2.34.1 From nobody Mon Feb 2 07:27:05 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1767841869; cv=none; d=zohomail.com; s=zohoarc; b=hjhoPkI73ejp1aL0onyhXbw8zLJTiOmtoKuVFZsbyxVyv7VnDKR5JxfvjLp2P9azCigzjTYYkB4s58ZWQOr3PcbG1iN92HHrfW8Wgix3AXRvBrqTsrNUca4CZB+Peq8ESZoN60phDAP5D3+0ODJXJAkTJGuDEfxxlXckNddF/xg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1767841869; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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X-CSE-ConnectionGUID: BbsCl4e8TDWqjHxyF/uB3g== X-CSE-MsgGUID: kKFX1X2SQJe6mWW9hG5MOw== X-IronPort-AV: E=McAfee;i="6800,10657,11664"; a="91877570" X-IronPort-AV: E=Sophos;i="6.21,209,1763452800"; d="scan'208";a="91877570" X-CSE-ConnectionGUID: tPOD766tROaPRuJG7KUpiQ== X-CSE-MsgGUID: lx/Vopy/STe1TSWeU+qq0w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,209,1763452800"; d="scan'208";a="202211235" From: Zhao Liu To: Paolo Bonzini , "Michael S . Tsirkin" , Igor Mammedov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Thomas Huth Cc: qemu-devel@nongnu.org, devel@lists.libvirt.org, kvm@vger.kernel.org, qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Richard Henderson , Sergio Lopez , Gerd Hoffmann , Peter Maydell , Laurent Vivier , Jiaxun Yang , Yi Liu , Eduardo Habkost , Alistair Francis , Daniel Henrique Barboza , Marcelo Tosatti , Weiwei Li , Amit Shah , Xiaoyao Li , Yanan Wang , Helge Deller , Palmer Dabbelt , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Ani Sinha , Fabiano Rosas , Liu Zhiwei , =?UTF-8?q?Cl=C3=A9ment=20Mathieu--Drif?= , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Huacai Chen , Jason Wang , Mark Cave-Ayland , BALATON Zoltan , Peter Krempa , Jiri Denemark , Zhao Liu Subject: [PATCH v6 23/27] hw/audio/pcspk: Remove PCSpkState::migrate field Date: Thu, 8 Jan 2026 11:30:47 +0800 Message-Id: <20260108033051.777361-24-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260108033051.777361-1-zhao1.liu@intel.com> References: <20260108033051.777361-1-zhao1.liu@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.9; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1767841870629158500 From: Philippe Mathieu-Daud=C3=A9 The PCSpkState::migrate boolean was only set in the pc_compat_2_7[] array, via the 'migrate=3Doff' property. We removed all machines using that array, lets remove that property, simplifying vmstate_spk[]. Reviewed-by: Mark Cave-Ayland Reviewed-by: Thomas Huth Reviewed-by: Igor Mammedov Reviewed-by: Zhao Liu Signed-off-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Zhao Liu --- hw/audio/pcspk.c | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/hw/audio/pcspk.c b/hw/audio/pcspk.c index 916c56fa4c0a..0b01544941cb 100644 --- a/hw/audio/pcspk.c +++ b/hw/audio/pcspk.c @@ -57,7 +57,6 @@ struct PCSpkState { unsigned int play_pos; uint8_t data_on; uint8_t dummy_refresh_clock; - bool migrate; }; =20 static const char *s_spk =3D "pcspk"; @@ -202,18 +201,10 @@ static void pcspk_realizefn(DeviceState *dev, Error *= *errp) } } =20 -static bool migrate_needed(void *opaque) -{ - PCSpkState *s =3D opaque; - - return s->migrate; -} - static const VMStateDescription vmstate_spk =3D { .name =3D "pcspk", .version_id =3D 1, .minimum_version_id =3D 1, - .needed =3D migrate_needed, .fields =3D (const VMStateField[]) { VMSTATE_UINT8(data_on, PCSpkState), VMSTATE_UINT8(dummy_refresh_clock, PCSpkState), @@ -224,7 +215,6 @@ static const VMStateDescription vmstate_spk =3D { static const Property pcspk_properties[] =3D { DEFINE_AUDIO_PROPERTIES(PCSpkState, audio_be), DEFINE_PROP_UINT32("iobase", PCSpkState, iobase, 0x61), - DEFINE_PROP_BOOL("migrate", PCSpkState, migrate, true), DEFINE_PROP_LINK("pit", PCSpkState, pit, TYPE_PIT_COMMON, PITCommonSta= te *), }; =20 --=20 2.34.1 From nobody Mon Feb 2 07:27:05 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1767841900; cv=none; d=zohomail.com; s=zohoarc; b=fzYWupijv7lrBvg5rHkSDgUgGSdGpYvuuguLCMtVuanx0buq4nIfFm89TgqlciXPTw6mx+m8FjcF0X7iZ/6M9mSGrmKfQ0vs4+qlzZHhl3Q0Ci7Qua1LOZU8xgm1nyTOP2y6bnjMG6A5OeFtLJIPVNVL/v4Gk0hOlOolaOYG1Xo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1767841900; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=Xen/n1f31bH0+c6iOXjhXvdoVIK/fzgunUYXsbCxo1Y=; b=CA5pOmvEdnM2vPEyY7C4OK5cyuvAobzzQbWCvWhgFxEQnpQgn+WYoAmEptZqTNEx6uAmLiet1oCqiRdicztVyzB8OsMyS9b6ObRqAyiEPmWWvjiATYsfMR5yFyWet7aFLId6vgEfPqqLK/go5BgqkWVFWf7q9GC73RrGZjIEv4s= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1767841900447421.42901285718744; Wed, 7 Jan 2026 19:11:40 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vdgPr-0000cr-RK; Wed, 07 Jan 2026 22:10:27 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vdgOq-00065H-QO; Wed, 07 Jan 2026 22:09:25 -0500 Received: from mgamail.intel.com ([198.175.65.9]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vdgOp-0005ak-7d; Wed, 07 Jan 2026 22:09:24 -0500 Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jan 2026 19:09:20 -0800 Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.39]) by orviesa006.jf.intel.com with ESMTP; 07 Jan 2026 19:09:11 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1767841763; x=1799377763; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=WNseSskd4Z5+i2dQT6CO6EkMfVwz4wCB2PqBqxukFk8=; b=VueiB6eoPJEnE02cK4ShNZYCzDXi01uWdK5mKGbPAcfYT9oua0SUV+6q xtG0OG4qLWOrvldxdLpQrFLa5XNgITopzlolOCOgf1/1bxjzWtwkiSv9/ l8RdcaL3NiY4Yll7IU6hrv1s/RFtSxbxWOeYTX9Dj63WqbmWtlwt1g9Ba C+nZiH5G4tEO0cMvlyUrtu7GoQlyGCs4JEVW2efjxQcGGiD8La3P3xqs5 VK9/pfuoV4MEAbfiX4UMxGIb933DYz/VEAnmbywF82rEva1CIDZowk/NY oQwO4PhtHAAXfr404lcEejUt05IhaudVbTuvjMgaz3QaAGwoPLPk3a04z g==; X-CSE-ConnectionGUID: JkhW+bIRQPu6Na9vqlrOkw== X-CSE-MsgGUID: t9Gtp4xnSsaITNxXQKxhcw== X-IronPort-AV: E=McAfee;i="6800,10657,11664"; a="91877605" X-IronPort-AV: E=Sophos;i="6.21,209,1763452800"; d="scan'208";a="91877605" X-CSE-ConnectionGUID: 02g/YQOsTLO+xJw1o1M/6Q== X-CSE-MsgGUID: pKDs+Qm2TQS/xIXH7BbTQw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,209,1763452800"; d="scan'208";a="202211242" From: Zhao Liu To: Paolo Bonzini , "Michael S . Tsirkin" , Igor Mammedov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Thomas Huth Cc: qemu-devel@nongnu.org, devel@lists.libvirt.org, kvm@vger.kernel.org, qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Richard Henderson , Sergio Lopez , Gerd Hoffmann , Peter Maydell , Laurent Vivier , Jiaxun Yang , Yi Liu , Eduardo Habkost , Alistair Francis , Daniel Henrique Barboza , Marcelo Tosatti , Weiwei Li , Amit Shah , Xiaoyao Li , Yanan Wang , Helge Deller , Palmer Dabbelt , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Ani Sinha , Fabiano Rosas , Liu Zhiwei , =?UTF-8?q?Cl=C3=A9ment=20Mathieu--Drif?= , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Huacai Chen , Jason Wang , Mark Cave-Ayland , BALATON Zoltan , Peter Krempa , Jiri Denemark , Zhao Liu Subject: [PATCH v6 24/27] hw/core/machine: Remove hw_compat_2_7[] array Date: Thu, 8 Jan 2026 11:30:48 +0800 Message-Id: <20260108033051.777361-25-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260108033051.777361-1-zhao1.liu@intel.com> References: <20260108033051.777361-1-zhao1.liu@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.9; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1767841900723158500 From: Philippe Mathieu-Daud=C3=A9 The hw_compat_2_7[] array was only used by the pc-q35-2.7 and pc-i440fx-2.7 machines, which got removed. Remove it. Reviewed-by: Mark Cave-Ayland Reviewed-by: Zhao Liu Reviewed-by: Igor Mammedov Signed-off-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Zhao Liu --- hw/core/machine.c | 9 --------- include/hw/core/boards.h | 3 --- 2 files changed, 12 deletions(-) diff --git a/hw/core/machine.c b/hw/core/machine.c index b01838c88a60..d2075fe30d84 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -281,15 +281,6 @@ GlobalProperty hw_compat_2_8[] =3D { }; const size_t hw_compat_2_8_len =3D G_N_ELEMENTS(hw_compat_2_8); =20 -GlobalProperty hw_compat_2_7[] =3D { - { "virtio-pci", "page-per-vq", "on" }, - { "virtio-serial-device", "emergency-write", "off" }, - { "ioapic", "version", "0x11" }, - { "intel-iommu", "x-buggy-eim", "true" }, - { "virtio-pci", "x-ignore-backend-features", "on" }, -}; -const size_t hw_compat_2_7_len =3D G_N_ELEMENTS(hw_compat_2_7); - MachineState *current_machine; =20 static char *machine_get_kernel(Object *obj, Error **errp) diff --git a/include/hw/core/boards.h b/include/hw/core/boards.h index b0e3a523a107..c7406a284fc2 100644 --- a/include/hw/core/boards.h +++ b/include/hw/core/boards.h @@ -879,7 +879,4 @@ extern const size_t hw_compat_2_9_len; extern GlobalProperty hw_compat_2_8[]; extern const size_t hw_compat_2_8_len; =20 -extern GlobalProperty hw_compat_2_7[]; -extern const size_t hw_compat_2_7_len; - #endif --=20 2.34.1 From nobody Mon Feb 2 07:27:05 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1767841873; cv=none; d=zohomail.com; s=zohoarc; b=aHSLzItMxdTI7vztAwIKYLNjU1EuKosIlv3kmfmUFATi58e/5aATQURkQkQsy5ISwVEY/ZV4h5dgjAJWCMmruQ4FiaQcgNYHl9R5r3FD+Y777DZWmt5s+uoG2Pobjyd46kNiW1/FtZ+QZKqJc6EcYhRP5ByC/uo58xG9rhB3DCI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1767841873; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=Mliv3WAb+bsmXL0eV+0Dm8tah2BmFJ2507ZZpJaS2WA=; b=Bw68J9LSKDL98LfjFPFv0Lt76lNAbl1DjnjSBiEe1On68LV4NLLShx1zQ8s35I8I1rl5pEGdh4dcJhB7wGlZWHYMhToqfqaZOQVNtx3uCb1tWJle92LFB2eZwQwtSN420YFfvpIDTfCdYJSu7jX1Fe3gsT0+j+4+eYSAYKHGRUs= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 17678418735541019.3343553824312; Wed, 7 Jan 2026 19:11:13 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vdgPv-00013o-23; Wed, 07 Jan 2026 22:10:31 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vdgP0-0006JM-5q; Wed, 07 Jan 2026 22:09:35 -0500 Received: from mgamail.intel.com ([198.175.65.9]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vdgOy-0005cZ-DN; Wed, 07 Jan 2026 22:09:33 -0500 Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jan 2026 19:09:29 -0800 Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.39]) by orviesa006.jf.intel.com with ESMTP; 07 Jan 2026 19:09:21 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1767841772; x=1799377772; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=WW3wMknALm2VrUHqeXw0nKdOWnuxpJr1LWEuBqml9t8=; b=fRS5/2vkNx+hdp8gT8YJiT7N5ds7cZydY7YIspEb1RzNn/JQeySwnU2h d/uaEqwiXo2DFBLwXENTPwhtwaoOzgAAqpR8sAwyzEkLqY8rAwDi7JiWJ dXwQu78Nh2/6PW6HpuxRWg6S9s6MMrfjWiO44SAiTJfFqYHu6LWqGb9iv XSIh8w04cW/qsGur+l0kfUrmHE3SduZbZT7dyXjH2YH0FUodecwEpDiBJ xHLdXh2sYLAwhV0yHPuzJXYoW6fPM4z+dTrKp8XXWXgQt9ILj25inDH55 a+YMEiZvtWF19gW/5KRCzClgef0Fluu02P/ynifeNf9PibMlz4qva7m4c g==; X-CSE-ConnectionGUID: k7sMdwwUSO67ifpYpQWC+Q== X-CSE-MsgGUID: 9PBjpPODR26ybmSPbNJbZg== X-IronPort-AV: E=McAfee;i="6800,10657,11664"; a="91877657" X-IronPort-AV: E=Sophos;i="6.21,209,1763452800"; d="scan'208";a="91877657" X-CSE-ConnectionGUID: 6t31tzR6R2qxCswGscTRbw== X-CSE-MsgGUID: lL6gXO/EQgeFpv2jqTmjHg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,209,1763452800"; d="scan'208";a="202211253" From: Zhao Liu To: Paolo Bonzini , "Michael S . Tsirkin" , Igor Mammedov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Thomas Huth Cc: qemu-devel@nongnu.org, devel@lists.libvirt.org, kvm@vger.kernel.org, qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Richard Henderson , Sergio Lopez , Gerd Hoffmann , Peter Maydell , Laurent Vivier , Jiaxun Yang , Yi Liu , Eduardo Habkost , Alistair Francis , Daniel Henrique Barboza , Marcelo Tosatti , Weiwei Li , Amit Shah , Xiaoyao Li , Yanan Wang , Helge Deller , Palmer Dabbelt , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Ani Sinha , Fabiano Rosas , Liu Zhiwei , =?UTF-8?q?Cl=C3=A9ment=20Mathieu--Drif?= , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Huacai Chen , Jason Wang , Mark Cave-Ayland , BALATON Zoltan , Peter Krempa , Jiri Denemark , Zhao Liu Subject: [PATCH v6 25/27] hw/i386/intel_iommu: Remove IntelIOMMUState::buggy_eim field Date: Thu, 8 Jan 2026 11:30:49 +0800 Message-Id: <20260108033051.777361-26-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260108033051.777361-1-zhao1.liu@intel.com> References: <20260108033051.777361-1-zhao1.liu@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.9; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1767841874645158500 From: Philippe Mathieu-Daud=C3=A9 The IntelIOMMUState::buggy_eim boolean was only set in the hw_compat_2_7[] array, via the 'x-buggy-eim=3Dtrue' property. We removed all machines using that array, lets remove that property, simplifying vtd_decide_config(). Reviewed-by: Mark Cave-Ayland Reviewed-by: Igor Mammedov Reviewed-by: Zhao Liu Signed-off-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Zhao Liu --- hw/i386/intel_iommu.c | 5 ++--- include/hw/i386/intel_iommu.h | 1 - 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 224b7b947906..2ed64bc6d968 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -4092,7 +4092,6 @@ static const Property vtd_properties[] =3D { DEFINE_PROP_UINT32("version", IntelIOMMUState, version, 0), DEFINE_PROP_ON_OFF_AUTO("eim", IntelIOMMUState, intr_eim, ON_OFF_AUTO_AUTO), - DEFINE_PROP_BOOL("x-buggy-eim", IntelIOMMUState, buggy_eim, false), DEFINE_PROP_UINT8("aw-bits", IntelIOMMUState, aw_bits, VTD_HOST_ADDRESS_WIDTH), DEFINE_PROP_BOOL("caching-mode", IntelIOMMUState, caching_mode, FALSE), @@ -5359,11 +5358,11 @@ static bool vtd_decide_config(IntelIOMMUState *s, E= rror **errp) } =20 if (s->intr_eim =3D=3D ON_OFF_AUTO_AUTO) { - s->intr_eim =3D (kvm_irqchip_in_kernel() || s->buggy_eim) + s->intr_eim =3D kvm_irqchip_in_kernel() && x86_iommu_ir_supported(x86_iommu) ? ON_OFF_AUTO_ON : ON_OFF_AUTO= _OFF; } - if (s->intr_eim =3D=3D ON_OFF_AUTO_ON && !s->buggy_eim) { + if (s->intr_eim =3D=3D ON_OFF_AUTO_ON) { if (kvm_irqchip_is_split() && !kvm_enable_x2apic()) { error_setg(errp, "eim=3Don requires support on the KVM side" "(X2APIC_API, first shipped in v4.7)"); diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h index ca7f7bb6618a..34ba13ffa8de 100644 --- a/include/hw/i386/intel_iommu.h +++ b/include/hw/i386/intel_iommu.h @@ -310,7 +310,6 @@ struct IntelIOMMUState { uint32_t intr_size; /* Number of IR table entries */ bool intr_eime; /* Extended interrupt mode enabled */ OnOffAuto intr_eim; /* Toggle for EIM cabability */ - bool buggy_eim; /* Force buggy EIM unless eim=3Doff */ uint8_t aw_bits; /* Host/IOVA address width (in bits) */ bool dma_drain; /* Whether DMA r/w draining enabled */ bool pasid; /* Whether to support PASID */ --=20 2.34.1 From nobody Mon Feb 2 07:27:05 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1767841879; cv=none; d=zohomail.com; s=zohoarc; b=GEOaKTenfgr0w6Hnm+UsHzT3OHoGF238aWEfl9YnWMBYiye5Xwd/QZTAxlgNE7VZx0JSk45qXhNT/9gGBPacqjP46cFeaP70VGJv0t9U0JZkK1NpAdYs3PmSoHSHl3DPZS1SHX8PmOGdCgtIZeOJufrErxm96MpKz54mh1O4uTM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1767841879; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=3dfF4ZDftTMtaq3XKxLqDCk1yiVV+Ge6lhcTxhcFnvI=; b=d/POEXtgqUIKx+CgPAA+R+tyOVnR3w19FR0eUmQvligaGvC/s14pMSmtaMntm76iEqFEmpd2yTTSKxCCjiN3wxIdvT5gLGZ7HXiAHuIZu5Gy8JFuJQ5QpXEOsljBxI5VCZApLVAu8+/wpju9Y8aR9S0ZbyFtv+urNS2QeL5cUII= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1767841879443121.3222111768348; Wed, 7 Jan 2026 19:11:19 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1vdgPu-0000xn-5P; Wed, 07 Jan 2026 22:10:30 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vdgP9-0006ZH-Fy; Wed, 07 Jan 2026 22:09:44 -0500 Received: from mgamail.intel.com ([198.175.65.9]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1vdgP7-0005e1-OP; Wed, 07 Jan 2026 22:09:43 -0500 Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jan 2026 19:09:39 -0800 Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.39]) by orviesa006.jf.intel.com with ESMTP; 07 Jan 2026 19:09:30 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1767841781; x=1799377781; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=/2b3kXmiCRa/BYYzO/hHr0chSCEMHL45PiGF0m8kKTY=; b=H8A2LBHOe8/XWsbSUMqrjg+a5JnJSQBmSlgrFEzlNFkOTx6vRrzXK09I z8vOgcJfcYKdmZGSWER1nfakAve9ud+octXD9uKkAgJDqUNtCN+KeTdY9 ob9RnP2ZGHhx5jwxc5SUDtSJYauO2+NI4Gy2kL4tGqWe2jsCM/Pj03L8u cz4JiEg0IfMnE016dhnMn2LOnYoTRByms/tKq5BBah/pGLyCxcUdb+X/l LWr/Ro77yRdXD5BmImp9QeZWPdUnPvqITUe+rbwDuelMJEdxPTgIVf24X WoLOKOJdsH1Lb8f4ULTCNrJ18AJqIXhe9myRANGr/F8q+srTNlLCJOQ6g Q==; X-CSE-ConnectionGUID: NFKr0luTTie7hZtZ65lHmA== X-CSE-MsgGUID: 0WJTnsVKRTOYcNqNAeMYVw== X-IronPort-AV: E=McAfee;i="6800,10657,11664"; a="91877696" X-IronPort-AV: E=Sophos;i="6.21,209,1763452800"; d="scan'208";a="91877696" X-CSE-ConnectionGUID: s23i9cu5TrGrYQuG6Kc3Eg== X-CSE-MsgGUID: xPA6wA+1S4qpU2au1duTiA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,209,1763452800"; d="scan'208";a="202211269" From: Zhao Liu To: Paolo Bonzini , "Michael S . Tsirkin" , Igor Mammedov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Thomas Huth Cc: qemu-devel@nongnu.org, devel@lists.libvirt.org, kvm@vger.kernel.org, qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Richard Henderson , Sergio Lopez , Gerd Hoffmann , Peter Maydell , Laurent Vivier , Jiaxun Yang , Yi Liu , Eduardo Habkost , Alistair Francis , Daniel Henrique Barboza , Marcelo Tosatti , Weiwei Li , Amit Shah , Xiaoyao Li , Yanan Wang , Helge Deller , Palmer Dabbelt , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Ani Sinha , Fabiano Rosas , Liu Zhiwei , =?UTF-8?q?Cl=C3=A9ment=20Mathieu--Drif?= , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Huacai Chen , Jason Wang , Mark Cave-Ayland , BALATON Zoltan , Peter Krempa , Jiri Denemark , Zhao Liu Subject: [PATCH v6 26/27] hw/virtio/virtio-pci: Remove VirtIOPCIProxy::ignore_backend_features field Date: Thu, 8 Jan 2026 11:30:50 +0800 Message-Id: <20260108033051.777361-27-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260108033051.777361-1-zhao1.liu@intel.com> References: <20260108033051.777361-1-zhao1.liu@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.9; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1767841880796158500 From: Philippe Mathieu-Daud=C3=A9 The VirtIOPCIProxy::ignore_backend_features boolean was only set in the hw_compat_2_7[] array, via the 'x-ignore-backend-features=3Don' property. We removed all machines using that array, lets remove that property, simplify by only using the default version. Reviewed-by: Mark Cave-Ayland Reviewed-by: Igor Mammedov Reviewed-by: Zhao Liu Signed-off-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Zhao Liu --- hw/virtio/virtio-pci.c | 5 +---- include/hw/virtio/virtio-pci.h | 1 - 2 files changed, 1 insertion(+), 5 deletions(-) diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index b273eb269196..e2a3dcc5b631 100644 --- a/hw/virtio/virtio-pci.c +++ b/hw/virtio/virtio-pci.c @@ -2040,8 +2040,7 @@ static void virtio_pci_device_plugged(DeviceState *d,= Error **errp) * Virtio capabilities present without * VIRTIO_F_VERSION_1 confuses guests */ - if (!proxy->ignore_backend_features && - !virtio_has_feature(vdev->host_features, VIRTIO_F_VERSION_1)) { + if (!virtio_has_feature(vdev->host_features, VIRTIO_F_VERSION_1)) { virtio_pci_disable_modern(proxy); =20 if (!legacy) { @@ -2441,8 +2440,6 @@ static const Property virtio_pci_properties[] =3D { VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY_BIT, false), DEFINE_PROP_BIT("page-per-vq", VirtIOPCIProxy, flags, VIRTIO_PCI_FLAG_PAGE_PER_VQ_BIT, false), - DEFINE_PROP_BOOL("x-ignore-backend-features", VirtIOPCIProxy, - ignore_backend_features, false), DEFINE_PROP_BIT("ats", VirtIOPCIProxy, flags, VIRTIO_PCI_FLAG_ATS_BIT, false), DEFINE_PROP_BIT("x-ats-page-aligned", VirtIOPCIProxy, flags, diff --git a/include/hw/virtio/virtio-pci.h b/include/hw/virtio/virtio-pci.h index 639752977ee8..581bb830b792 100644 --- a/include/hw/virtio/virtio-pci.h +++ b/include/hw/virtio/virtio-pci.h @@ -150,7 +150,6 @@ struct VirtIOPCIProxy { uint16_t last_pcie_cap_offset; uint32_t flags; bool disable_modern; - bool ignore_backend_features; OnOffAuto disable_legacy; /* Transitional device id */ uint16_t trans_devid; --=20 2.34.1 From nobody Mon Feb 2 07:27:05 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1767841858; cv=none; d=zohomail.com; s=zohoarc; b=A7g0xa2CctOmZAvZDaDAzxw/lhLkfLCTKI6kEFqPv/+lZhnTB/bD42zb/gy0NaVLRaUid91ESVrBQ0dM2/QecHwDhvGXMZp6du7vJiSYMN6RfYVSXhEk0wA6olqAnPEhswGA3k1XE8MX7sltUIowGvV3xCBAMQLkiWiIIjE+UTg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1767841858; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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X-CSE-ConnectionGUID: V584+F/tSuOgOWXxD9fCOA== X-CSE-MsgGUID: /9KAUKlwTuOBUOIZLtLyxw== X-IronPort-AV: E=McAfee;i="6800,10657,11664"; a="91877724" X-IronPort-AV: E=Sophos;i="6.21,209,1763452800"; d="scan'208";a="91877724" X-CSE-ConnectionGUID: kIWWhqTxQGmT66gxvRoqEQ== X-CSE-MsgGUID: KlFeMH7URR2pjppFfeN6xA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,209,1763452800"; d="scan'208";a="202211287" From: Zhao Liu To: Paolo Bonzini , "Michael S . Tsirkin" , Igor Mammedov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Thomas Huth Cc: qemu-devel@nongnu.org, devel@lists.libvirt.org, kvm@vger.kernel.org, qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Richard Henderson , Sergio Lopez , Gerd Hoffmann , Peter Maydell , Laurent Vivier , Jiaxun Yang , Yi Liu , Eduardo Habkost , Alistair Francis , Daniel Henrique Barboza , Marcelo Tosatti , Weiwei Li , Amit Shah , Xiaoyao Li , Yanan Wang , Helge Deller , Palmer Dabbelt , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Ani Sinha , Fabiano Rosas , Liu Zhiwei , =?UTF-8?q?Cl=C3=A9ment=20Mathieu--Drif?= , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Huacai Chen , Jason Wang , Mark Cave-Ayland , BALATON Zoltan , Peter Krempa , Jiri Denemark , Zhao Liu Subject: [PATCH v6 27/27] hw/char/virtio-serial: Do not expose the 'emergency-write' property Date: Thu, 8 Jan 2026 11:30:51 +0800 Message-Id: <20260108033051.777361-28-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260108033051.777361-1-zhao1.liu@intel.com> References: <20260108033051.777361-1-zhao1.liu@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=198.175.65.9; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1767841858592158501 From: Philippe Mathieu-Daud=C3=A9 The VIRTIO_CONSOLE_F_EMERG_WRITE feature bit was only set in the hw_compat_2_7[] array, via the 'emergency-write=3Doff' property. We removed all machines using that array, lets remove that property. All instances have this feature bit set and it can not be disabled. VirtIOSerial::host_features mask is now unused, remove it. Reviewed-by: Mark Cave-Ayland Reviewed-by: Zhao Liu Reviewed-by: Igor Mammedov Signed-off-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Zhao Liu --- hw/char/virtio-serial-bus.c | 9 +++------ include/hw/virtio/virtio-serial.h | 2 -- 2 files changed, 3 insertions(+), 8 deletions(-) diff --git a/hw/char/virtio-serial-bus.c b/hw/char/virtio-serial-bus.c index 5ec5f5313b21..b7c57ea9678c 100644 --- a/hw/char/virtio-serial-bus.c +++ b/hw/char/virtio-serial-bus.c @@ -557,7 +557,7 @@ static uint64_t get_features(VirtIODevice *vdev, uint64= _t features, =20 vser =3D VIRTIO_SERIAL(vdev); =20 - features |=3D vser->host_features; + features |=3D BIT_ULL(VIRTIO_CONSOLE_F_EMERG_WRITE); if (vser->bus.max_nr_ports > 1) { virtio_add_feature(&features, VIRTIO_CONSOLE_F_MULTIPORT); } @@ -587,8 +587,7 @@ static void set_config(VirtIODevice *vdev, const uint8_= t *config_data) VirtIOSerialPortClass *vsc; uint8_t emerg_wr_lo; =20 - if (!virtio_has_feature(vser->host_features, - VIRTIO_CONSOLE_F_EMERG_WRITE) || !config->emerg_wr) { + if (!config->emerg_wr) { return; } =20 @@ -1040,7 +1039,7 @@ static void virtio_serial_device_realize(DeviceState = *dev, Error **errp) return; } =20 - if (!virtio_has_feature(vser->host_features, + if (!virtio_has_feature(vdev->host_features, VIRTIO_CONSOLE_F_EMERG_WRITE)) { config_size =3D offsetof(struct virtio_console_config, emerg_wr); } @@ -1156,8 +1155,6 @@ static const VMStateDescription vmstate_virtio_consol= e =3D { static const Property virtio_serial_properties[] =3D { DEFINE_PROP_UINT32("max_ports", VirtIOSerial, serial.max_virtserial_po= rts, 31), - DEFINE_PROP_BIT64("emergency-write", VirtIOSerial, host_features, - VIRTIO_CONSOLE_F_EMERG_WRITE, true), }; =20 static void virtio_serial_class_init(ObjectClass *klass, const void *data) diff --git a/include/hw/virtio/virtio-serial.h b/include/hw/virtio/virtio-s= erial.h index 60641860bf83..da0c91e1a403 100644 --- a/include/hw/virtio/virtio-serial.h +++ b/include/hw/virtio/virtio-serial.h @@ -186,8 +186,6 @@ struct VirtIOSerial { struct VirtIOSerialPostLoad *post_load; =20 virtio_serial_conf serial; - - uint64_t host_features; }; =20 /* Interface to the virtio-serial bus */ --=20 2.34.1