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Tsirkin" , Igor Mammedov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , Thomas Huth Cc: qemu-devel@nongnu.org, devel@lists.libvirt.org, kvm@vger.kernel.org, qemu-riscv@nongnu.org, qemu-arm@nongnu.org, Richard Henderson , Sergio Lopez , Gerd Hoffmann , Peter Maydell , Laurent Vivier , Jiaxun Yang , Yi Liu , Eduardo Habkost , Alistair Francis , Daniel Henrique Barboza , Marcelo Tosatti , Weiwei Li , Amit Shah , Xiaoyao Li , Yanan Wang , Helge Deller , Palmer Dabbelt , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Ani Sinha , Fabiano Rosas , Liu Zhiwei , =?UTF-8?q?Cl=C3=A9ment=20Mathieu--Drif?= , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Huacai Chen , Jason Wang , Mark Cave-Ayland , BALATON Zoltan , Peter Krempa , Jiri Denemark , Zhao Liu Subject: [PATCH v5 26/28] hw/i386/intel_iommu: Remove IntelIOMMUState::buggy_eim field Date: Wed, 3 Dec 2025 00:28:33 +0800 Message-Id: <20251202162835.3227894-27-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251202162835.3227894-1-zhao1.liu@intel.com> References: <20251202162835.3227894-1-zhao1.liu@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=192.198.163.7; envelope-from=zhao1.liu@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1764692915446019200 From: Philippe Mathieu-Daud=C3=A9 The IntelIOMMUState::buggy_eim boolean was only set in the hw_compat_2_7[] array, via the 'x-buggy-eim=3Dtrue' property. We removed all machines using that array, lets remove that property, simplifying vtd_decide_config(). Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Mark Cave-Ayland Reviewed-by: Igor Mammedov Reviewed-by: Zhao Liu Signed-off-by: Zhao Liu --- hw/i386/intel_iommu.c | 5 ++--- include/hw/i386/intel_iommu.h | 1 - 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 78b142cceab3..0113cba32890 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -4092,7 +4092,6 @@ static const Property vtd_properties[] =3D { DEFINE_PROP_UINT32("version", IntelIOMMUState, version, 0), DEFINE_PROP_ON_OFF_AUTO("eim", IntelIOMMUState, intr_eim, ON_OFF_AUTO_AUTO), - DEFINE_PROP_BOOL("x-buggy-eim", IntelIOMMUState, buggy_eim, false), DEFINE_PROP_UINT8("aw-bits", IntelIOMMUState, aw_bits, VTD_HOST_ADDRESS_WIDTH), DEFINE_PROP_BOOL("caching-mode", IntelIOMMUState, caching_mode, FALSE), @@ -5359,11 +5358,11 @@ static bool vtd_decide_config(IntelIOMMUState *s, E= rror **errp) } =20 if (s->intr_eim =3D=3D ON_OFF_AUTO_AUTO) { - s->intr_eim =3D (kvm_irqchip_in_kernel() || s->buggy_eim) + s->intr_eim =3D kvm_irqchip_in_kernel() && x86_iommu_ir_supported(x86_iommu) ? ON_OFF_AUTO_ON : ON_OFF_AUTO= _OFF; } - if (s->intr_eim =3D=3D ON_OFF_AUTO_ON && !s->buggy_eim) { + if (s->intr_eim =3D=3D ON_OFF_AUTO_ON) { if (kvm_irqchip_is_split() && !kvm_enable_x2apic()) { error_setg(errp, "eim=3Don requires support on the KVM side" "(X2APIC_API, first shipped in v4.7)"); diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h index ca7f7bb6618a..34ba13ffa8de 100644 --- a/include/hw/i386/intel_iommu.h +++ b/include/hw/i386/intel_iommu.h @@ -310,7 +310,6 @@ struct IntelIOMMUState { uint32_t intr_size; /* Number of IR table entries */ bool intr_eime; /* Extended interrupt mode enabled */ OnOffAuto intr_eim; /* Toggle for EIM cabability */ - bool buggy_eim; /* Force buggy EIM unless eim=3Doff */ uint8_t aw_bits; /* Host/IOVA address width (in bits) */ bool dma_drain; /* Whether DMA r/w draining enabled */ bool pasid; /* Whether to support PASID */ --=20 2.34.1