From nobody Tue Sep 9 19:11:27 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.libvirt.org designates 8.43.85.245 as permitted sender) client-ip=8.43.85.245; envelope-from=devel-bounces@lists.libvirt.org; helo=lists.libvirt.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of lists.libvirt.org designates 8.43.85.245 as permitted sender) smtp.mailfrom=devel-bounces@lists.libvirt.org; dmarc=fail(p=none dis=none) header.from=canonical.com Return-Path: Received: from lists.libvirt.org (lists.libvirt.org [8.43.85.245]) by mx.zohomail.com with SMTPS id 1748644873552985.2773515563356; Fri, 30 May 2025 15:41:13 -0700 (PDT) Received: by lists.libvirt.org (Postfix, from userid 996) id 8BEE91298; Fri, 30 May 2025 18:41:12 -0400 (EDT) Received: from lists.libvirt.org (localhost [IPv6:::1]) by lists.libvirt.org (Postfix) with ESMTP id 2557D13C3; Fri, 30 May 2025 18:40:08 -0400 (EDT) Received: by lists.libvirt.org (Postfix, from userid 996) id 6BCD41266; Fri, 30 May 2025 18:40:04 -0400 (EDT) Received: from smtp-relay-canonical-1.canonical.com (smtp-relay-canonical-1.canonical.com [185.125.188.121]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.libvirt.org (Postfix) with ESMTPS id D9A59D56 for ; Fri, 30 May 2025 18:40:02 -0400 (EDT) Received: from localhost.localdomain (unknown [10.101.192.134]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-canonical-1.canonical.com (Postfix) with ESMTPSA id 306D14101E; Fri, 30 May 2025 22:31:15 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on lists.libvirt.org X-Spam-Level: X-Spam-Status: No, score=-3.1 required=5.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED, RCVD_IN_VALIDITY_RPBL_BLOCKED,RCVD_IN_VALIDITY_SAFE_BLOCKED, SPF_HELO_NONE autolearn=unavailable autolearn_force=no version=3.4.4 X-Greylist: delayed 524 seconds by postgrey-1.37 at lists.libvirt.org; Fri, 30 May 2025 18:40:02 EDT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1748644278; bh=CXARVsDKjpCndFQegNaLOLXFTxLjahYkUh9wZic8r+o=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=ELkLaITNupjBELFCYr+FO/Qd1g6DF/QCiIbYspWt9OEP/EP/qDDmZ7OVhOxonta74 Mia1Ee9AdUPH8yEyBrGKzmbEmEg2nUU/sDro56hdLzzeSlvIPxhYBstHU24CQ8N8QQ /uq2l9a3TDoNDGLxdMvJ/hx94FmJ0XPDLyuWu8xp1ewynO/NRpMHMbukuf5sfYIf+z h4FTjjYIRTv5k8jJ2Mm6USxbjh57qqVNKKKjvEOz81xyWkSGCQsG4VS2D/IRTMEDIv gShHrh3dX09d/A2Ny9cnnlykYJ55easAqdK+XbyOgXKEeerqyjZvQUAQAzvpBMHBlx l+HxJz3RY8Uiw== From: Hector Cao To: devel@lists.libvirt.org Subject: [PATCH 1/1] cpu_map: fix vmx-* features wrong bitmaps Date: Sat, 31 May 2025 00:30:23 +0200 Message-ID: <20250530223023.22868-2-hector.cao@canonical.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250530223023.22868-1-hector.cao@canonical.com> References: <20250530223023.22868-1-hector.cao@canonical.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Message-ID-Hash: HKRI3JJB47O2ZX3S5Z7IP67TQ3ZF3HEI X-Message-ID-Hash: HKRI3JJB47O2ZX3S5Z7IP67TQ3ZF3HEI X-MailFrom: hector.cao@canonical.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-config-1; header-match-config-2; header-match-config-3; header-match-devel.lists.libvirt.org-0; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; suspicious-header CC: hector.cao@canonical.com X-Mailman-Version: 3.2.2 Precedence: list List-Id: Development discussions about the libvirt library & tools Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-ZohoMail-DKIM: fail (Computed bodyhash is different from the expected one) X-ZM-MESSAGEID: 1748644875217116600 Content-Type: text/plain; charset="utf-8" A model specific register (msr) is an 64-bit register. It can be read with the RDMSR instruction and the register value is returned via two registers EDX:EAX. EDX holds the 32 higher bits and EAX holds the 32 lower bits. In the x86_features.xml file, some vmx-* features are wrongly defined as bits in the EAX register. For example, for the MSR 0x48B, the feature vmx-apicv-xapic is currently specified as the first bit of the EAX register but in the Intel specification [1], this feature is represented by the first bit of the EDX register (higher 32 bits). This is the list of affected msrs that need to be fixed: 0x48B : IA32_VMX_PROCBASED_CTLS2 0x48D : IA32_VMX_TRUE_PINBASED_CTLS 0x48E : IA32_VMX_TRUE_PROCBASED_CTLS 0x48F : IA32_VMX_TRUE_EXIT_CTLS 0x490 : IA32_VMX_TRUE_ENTRY_CTLS [1] Appendix A.3 Intel=C2=AE 64 and IA-32 Architectures Software Developers Manual Volume 3 (3A, 3B, 3C & 3D): System Programming Guide Signed-off-by: Hector Cao --- src/cpu_map/x86_features.xml | 136 +++++++++++++++++------------------ 1 file changed, 68 insertions(+), 68 deletions(-) diff --git a/src/cpu_map/x86_features.xml b/src/cpu_map/x86_features.xml index d06d60e230..0f60adb388 100644 --- a/src/cpu_map/x86_features.xml +++ b/src/cpu_map/x86_features.xml @@ -922,67 +922,67 @@ =20 - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + =20 @@ -1041,151 +1041,151 @@ =20 - + - + - + - + - + =20 - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + - + =20 - + - + - + - + - + - + - + - + - + - + - + - + =20 - + - + - + - + - + - + - + - + - + =20 --=20 2.45.2