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AJvYcCUWTBT9gD7qasJI1cGmUv8XRGgrvJnlXN0215qURLCRukMUyhajk7MymBeNvnA7zAagJbkyWA==@lists.libvirt.org X-Gm-Message-State: AOJu0Ywni0LxIIhKdIOoyCFEfN3E2jHEVkK8veOKe05hqactSrzzcqev auaLzUT+kQulMKDwDAzWH1t8GTUGtRfXOZfyeMlQKe8aP9qs3qedzvkw1kh6P7M= X-Google-Smtp-Source: AGHT+IFysdd0sB0oM1y+OBmZx0gw8cECxiOrtqq9YEeOGFH6EohwgFb6RAjFTMlultPEbK+MRxo+zg== X-Received: by 2002:a05:6512:acf:b0:539:adb0:b86 with SMTP id 2adb3069b0e04-53d862308eemr1899220e87.14.1731080639025; Fri, 08 Nov 2024 07:43:59 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Anton Johansson Subject: [PATCH v3 08/17] hw/ssi/xilinx_spi: Make device endianness configurable Date: Fri, 8 Nov 2024 15:43:08 +0000 Message-ID: <20241108154317.12129-9-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241108154317.12129-1-philmd@linaro.org> References: <20241108154317.12129-1-philmd@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Message-ID-Hash: DUX4PAYISUFHBSIGRWHBCIQEPLRZGKKV X-Message-ID-Hash: DUX4PAYISUFHBSIGRWHBCIQEPLRZGKKV X-MailFrom: philmd@linaro.org X-Mailman-Rule-Hits: nonmember-moderation X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-config-1; header-match-config-2; header-match-config-3; header-match-devel.lists.libvirt.org-0 CC: Jason Wang , Paolo Bonzini , Richard Henderson , devel@lists.libvirt.org, =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , "Edgar E. Iglesias" , Thomas Huth , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Peter Maydell , Alistair Francis , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= X-Mailman-Version: 3.2.2 Precedence: list List-Id: Development discussions about the libvirt library & tools Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1731080869431116600 Content-Type: text/plain; charset="utf-8" Replace the DEVICE_NATIVE_ENDIAN MemoryRegionOps by a pair of DEVICE_LITTLE_ENDIAN / DEVICE_BIG_ENDIAN. Add the "little-endian" property to select the device endianness, defaulting to little endian. Set the proper endianness on the single machine using the device. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/arm/xlnx-zynqmp.c | 4 ++++ hw/ssi/xilinx_spi.c | 24 +++++++++++++++--------- 2 files changed, 19 insertions(+), 9 deletions(-) diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c index ab2d50e31b..e735dbdf82 100644 --- a/hw/arm/xlnx-zynqmp.c +++ b/hw/arm/xlnx-zynqmp.c @@ -714,6 +714,10 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Erro= r **errp) for (i =3D 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) { gchar *bus_name; =20 + if (!object_property_set_bool(OBJECT(&s->spi[i])), "little-endian", + true, errp)) { + return; + } if (!sysbus_realize(SYS_BUS_DEVICE(&s->spi[i]), errp)) { return; } diff --git a/hw/ssi/xilinx_spi.c b/hw/ssi/xilinx_spi.c index 7f1e1808c5..8926ffb927 100644 --- a/hw/ssi/xilinx_spi.c +++ b/hw/ssi/xilinx_spi.c @@ -83,6 +83,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(XilinxSPI, XILINX_SPI) struct XilinxSPI { SysBusDevice parent_obj; =20 + bool little_endian_model; MemoryRegion mmio; =20 qemu_irq irq; @@ -313,14 +314,17 @@ done: xlx_spi_update_irq(s); } =20 -static const MemoryRegionOps spi_ops =3D { - .read =3D spi_read, - .write =3D spi_write, - .endianness =3D DEVICE_NATIVE_ENDIAN, - .valid =3D { - .min_access_size =3D 4, - .max_access_size =3D 4 - } +static const MemoryRegionOps spi_ops[2] =3D { + [0 ... 1] =3D { + .read =3D spi_read, + .write =3D spi_write, + .valid =3D { + .min_access_size =3D 4, + .max_access_size =3D 4, + }, + }, + [0].endianness =3D DEVICE_BIG_ENDIAN, + [1].endianness =3D DEVICE_LITTLE_ENDIAN, }; =20 static void xilinx_spi_realize(DeviceState *dev, Error **errp) @@ -339,7 +343,8 @@ static void xilinx_spi_realize(DeviceState *dev, Error = **errp) sysbus_init_irq(sbd, &s->cs_lines[i]); } =20 - memory_region_init_io(&s->mmio, OBJECT(s), &spi_ops, s, + memory_region_init_io(&s->mmio, OBJECT(s), + &spi_ops[s->little_endian_model], s, "xilinx-spi", R_MAX * 4); sysbus_init_mmio(sbd, &s->mmio); =20 @@ -362,6 +367,7 @@ static const VMStateDescription vmstate_xilinx_spi =3D { }; =20 static Property xilinx_spi_properties[] =3D { + DEFINE_PROP_BOOL("little-endian", XilinxSPI, little_endian_model, true= ), DEFINE_PROP_UINT8("num-ss-bits", XilinxSPI, num_cs, 1), DEFINE_PROP_END_OF_LIST(), }; --=20 2.45.2