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AJvYcCXsdI26ZkOugB5dJrc2hyWC0bSipzJQelonj9Gd8DJI3WgfHNXn7BrNmysRBLzqC4Z7G3gNqg==@lists.libvirt.org X-Gm-Message-State: AOJu0Yyu17chxisf3BBPrv3cIYnZnA2A5FTlqr+52r4CoOD2Gnzg/LGT mx1KkZj1k/pEtDv3ir1Rl778i0u0Ovlai1L4PRmQhrDYGlHu2rQ2E6y8Z3YfIZgMcr9A8mFahKg m X-Google-Smtp-Source: AGHT+IGAElG22aKzSYKrj+eNfrCLffdIe/pfQfqbUp0syVG5L6v9ESVGO9YfefTQCqI0i+XERYA+/A== X-Received: by 2002:a05:6000:2588:b0:381:c8fe:20b1 with SMTP id ffacd0b85a97d-381f18855b8mr2960779f8f.42.1731080605051; Fri, 08 Nov 2024 07:43:25 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Anton Johansson Subject: [PATCH v3 01/17] hw/microblaze: Restrict MemoryRegionOps are implemented as 32-bit Date: Fri, 8 Nov 2024 15:43:01 +0000 Message-ID: <20241108154317.12129-2-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241108154317.12129-1-philmd@linaro.org> References: <20241108154317.12129-1-philmd@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Message-ID-Hash: C26MSGM6HMXJCJNASXFP2VSTCJHJWLR6 X-Message-ID-Hash: C26MSGM6HMXJCJNASXFP2VSTCJHJWLR6 X-MailFrom: philmd@linaro.org X-Mailman-Rule-Hits: nonmember-moderation X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-config-1; header-match-config-2; header-match-config-3; header-match-devel.lists.libvirt.org-0 CC: Jason Wang , Paolo Bonzini , Richard Henderson , devel@lists.libvirt.org, =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , "Edgar E. Iglesias" , Thomas Huth , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Peter Maydell , Alistair Francis , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= X-Mailman-Version: 3.2.2 Precedence: list List-Id: Development discussions about the libvirt library & tools Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1731080653910116600 Content-Type: text/plain; charset="utf-8" All these MemoryRegionOps read() and write() handlers are implemented expecting 32-bit accesses. Clarify that setting .impl.min/max_access_size fields. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Anton Johansson Message-Id: <20241105130431.22564-8-philmd@linaro.org> --- hw/char/xilinx_uartlite.c | 4 ++++ hw/intc/xilinx_intc.c | 4 ++++ hw/net/xilinx_ethlite.c | 4 ++++ hw/timer/xilinx_timer.c | 4 ++++ 4 files changed, 16 insertions(+) diff --git a/hw/char/xilinx_uartlite.c b/hw/char/xilinx_uartlite.c index f325084f8b..3022b3d8ef 100644 --- a/hw/char/xilinx_uartlite.c +++ b/hw/char/xilinx_uartlite.c @@ -170,6 +170,10 @@ static const MemoryRegionOps uart_ops =3D { .read =3D uart_read, .write =3D uart_write, .endianness =3D DEVICE_NATIVE_ENDIAN, + .impl =3D { + .min_access_size =3D 4, + .max_access_size =3D 4, + }, .valid =3D { .min_access_size =3D 1, .max_access_size =3D 4 diff --git a/hw/intc/xilinx_intc.c b/hw/intc/xilinx_intc.c index 6e5012e66e..8fb6b4f1a5 100644 --- a/hw/intc/xilinx_intc.c +++ b/hw/intc/xilinx_intc.c @@ -144,6 +144,10 @@ static const MemoryRegionOps pic_ops =3D { .read =3D pic_read, .write =3D pic_write, .endianness =3D DEVICE_NATIVE_ENDIAN, + .impl =3D { + .min_access_size =3D 4, + .max_access_size =3D 4, + }, .valid =3D { .min_access_size =3D 4, .max_access_size =3D 4 diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c index bd81290808..e84b4cdd35 100644 --- a/hw/net/xilinx_ethlite.c +++ b/hw/net/xilinx_ethlite.c @@ -170,6 +170,10 @@ static const MemoryRegionOps eth_ops =3D { .read =3D eth_read, .write =3D eth_write, .endianness =3D DEVICE_NATIVE_ENDIAN, + .impl =3D { + .min_access_size =3D 4, + .max_access_size =3D 4, + }, .valid =3D { .min_access_size =3D 4, .max_access_size =3D 4 diff --git a/hw/timer/xilinx_timer.c b/hw/timer/xilinx_timer.c index 32a9df69e0..383fc8b3c8 100644 --- a/hw/timer/xilinx_timer.c +++ b/hw/timer/xilinx_timer.c @@ -193,6 +193,10 @@ static const MemoryRegionOps timer_ops =3D { .read =3D timer_read, .write =3D timer_write, .endianness =3D DEVICE_NATIVE_ENDIAN, + .impl =3D { + .min_access_size =3D 4, + .max_access_size =3D 4, + }, .valid =3D { .min_access_size =3D 4, .max_access_size =3D 4 --=20 2.45.2