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[88.29.160.86]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-381c10b7bb7sm16338383f8f.3.2024.11.05.05.06.03 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 05 Nov 2024 05:06:05 -0800 (PST) X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on lists.libvirt.org X-Spam-Level: X-Spam-Status: No, score=-0.5 required=5.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,RCVD_IN_VALIDITY_RPBL_BLOCKED, RCVD_IN_VALIDITY_SAFE_BLOCKED,SPF_HELO_NONE autolearn=unavailable autolearn_force=no version=3.4.4 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1730811966; x=1731416766; darn=lists.libvirt.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=kz42cmMFB8jc7GreGUWRF6XY9EJ0BnYu9J8zOkqLmVs=; b=edOgNyIe/x/6HZlHwU7zR114+bWDe+Ta+8bhqgIIKFJMuFah9jsdIVnFk1GNIOH2oy nHCfRYLfDa7+Jz8dftWNVYFHherBJksHL5FoajADFm+l7DqsU4UlE+hVzFbOm+tLFbX7 N4MLf/N3D2fMuJdLiEGbPl/zTGH8L6d5r4D6ftr0QxSR2K2HMurDC4GQv/PKgXXhOlIm lJs/MCeThzrIbxmd5yM0XC310rIBy9ximMcN0gYNJb7tVeXAsgCiXCVOCdV8y4tjJssT 2cou/XfNARgjPSb4p2J4P/6ix9OtMvaJ2XJsS3rM2gRx6oEkKii4MoCr2gAev/5ogHwU KG0A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730811966; x=1731416766; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=kz42cmMFB8jc7GreGUWRF6XY9EJ0BnYu9J8zOkqLmVs=; b=Azc3v3PWzQVt3wEOud3jMoWNBgF8uVlJTvuD47nKygrFNHoibOe5oar+/XrlDNbMZG fYt+YZuTFBDipxwo8wQ/F+VFqZl6cIbo0rlngI9CjK145kAVEh6Pb3TmwV7jApnvbPjs ALxUpVuHFUHOtNUOL6j5cZzx3xGmqW5xRIygDWgsmAESkWVrQ1NmpIIdnePkID4Apz2f RLAuBM90vR6OM5FDG721CbjGX7JP+dLIBLb3mcHgssGwh1fPIwHwbxnQOhwtoTOLrhwz ZZd2h49CQSqFnhyiERZSlYrXKW4JBEn49MQefLw8YwM9f5MtgmFZG6y3ud4K7qEM/TJI cqog== X-Forwarded-Encrypted: i=1; AJvYcCXcj7PtUyGrPomSUUTvcDqa3xB7BI/XQPDV1Q6RhTvtRMtJYcHCBIf308k3Rt26XqvldpsZlQ==@lists.libvirt.org X-Gm-Message-State: AOJu0YxK8x5LLGPy04seW/QcSUn1QPXSPcOy6d+Oey+u3UVjkczqhMMl W4xZYRLQw5K7EGK/0KIr+Mo9AitPOJ5c2yOhAYnzFZru3aXGO+iU2nqj7TpliY4= X-Google-Smtp-Source: AGHT+IFjPpt59jc3PMzqGL8qlZqC8i1HTvCBB/T0746z2N49HMz0D8zAb0mnuCzU/XPxcbxuerh6kA== X-Received: by 2002:a05:6000:718:b0:37c:f561:1130 with SMTP id ffacd0b85a97d-381c149f129mr15229256f8f.18.1730811965862; Tue, 05 Nov 2024 05:06:05 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Anton Johansson Subject: [PATCH 09/19] hw/intc/xilinx_intc: Only expect big-endian accesses Date: Tue, 5 Nov 2024 14:04:21 +0100 Message-ID: <20241105130431.22564-10-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241105130431.22564-1-philmd@linaro.org> References: <20241105130431.22564-1-philmd@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Message-ID-Hash: PIEWB2RCXZDFO27PIJBCEEE3OXSGSZIE X-Message-ID-Hash: PIEWB2RCXZDFO27PIJBCEEE3OXSGSZIE X-MailFrom: philmd@linaro.org X-Mailman-Rule-Hits: nonmember-moderation X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-config-1; header-match-config-2; header-match-config-3; header-match-devel.lists.libvirt.org-0 CC: "Edgar E. Iglesias" , Peter Maydell , Alistair Francis , Thomas Huth , qemu-arm@nongnu.org, devel@lists.libvirt.org, =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Paolo Bonzini , Jason Wang , Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= X-Mailman-Version: 3.2.2 Precedence: list List-Id: Development discussions about the libvirt library & tools Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1730812111107116600 Content-Type: text/plain; charset="utf-8" Per the datasheet (reference added in file header, p.9) 'Programming Model' -> 'Register Data Types and Organization': "The XPS INTC registers are read as big-endian data" Signed-off-by: Philippe Mathieu-Daud=C3=A9 Acked-by: Alistair Francis Reviewed-by: Anton Johansson --- hw/intc/xilinx_intc.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/hw/intc/xilinx_intc.c b/hw/intc/xilinx_intc.c index 1762b34564e..71f743a1f14 100644 --- a/hw/intc/xilinx_intc.c +++ b/hw/intc/xilinx_intc.c @@ -3,6 +3,9 @@ * * Copyright (c) 2009 Edgar E. Iglesias. * + * https://docs.amd.com/v/u/en-US/xps_intc + * DS572: LogiCORE IP XPS Interrupt Controller (v2.01a) + * * Permission is hereby granted, free of charge, to any person obtaining a= copy * of this software and associated documentation files (the "Software"), t= o deal * in the Software without restriction, including without limitation the r= ights @@ -143,12 +146,20 @@ static void pic_write(void *opaque, hwaddr addr, static const MemoryRegionOps pic_ops =3D { .read =3D pic_read, .write =3D pic_write, - .endianness =3D DEVICE_NATIVE_ENDIAN, + /* The XPS INTC registers are read as big-endian data. */ + .endianness =3D DEVICE_BIG_ENDIAN, .impl =3D { .min_access_size =3D 4, .max_access_size =3D 4, }, .valid =3D { + /* + * All XPS INTC registers are accessed through the PLB interface. + * The base address for these registers is provided by the + * configuration parameter, C_BASEADDR. Each register is 32 bits + * although some bits may be unused and is accessed on a 4-byte + * boundary offset from the base address. + */ .min_access_size =3D 4, .max_access_size =3D 4, }, --=20 2.45.2