From nobody Sun Sep 7 20:57:37 2025 Delivered-To: importer@patchew.org Received-SPF: none (zohomail.com: 8.43.85.245 is neither permitted nor denied by domain of lists.libvirt.org) client-ip=8.43.85.245; envelope-from=devel-bounces@lists.libvirt.org; helo=lists.libvirt.org; Authentication-Results: mx.zohomail.com; spf=none (zohomail.com: 8.43.85.245 is neither permitted nor denied by domain of lists.libvirt.org) smtp.mailfrom=devel-bounces@lists.libvirt.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.libvirt.org (lists.libvirt.org [8.43.85.245]) by mx.zohomail.com with SMTPS id 1702679148892374.84718081554865; Fri, 15 Dec 2023 14:25:48 -0800 (PST) Received: by lists.libvirt.org (Postfix, from userid 996) id 9A0ED1B39; Fri, 15 Dec 2023 17:25:47 -0500 (EST) Received: from lists.libvirt.org (localhost [IPv6:::1]) by lists.libvirt.org (Postfix) with ESMTP id 5E1E71B8E; Fri, 15 Dec 2023 17:12:58 -0500 (EST) Received: by lists.libvirt.org (Postfix, from userid 996) id 938B51A9F; Fri, 15 Dec 2023 17:12:21 -0500 (EST) Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.libvirt.org (Postfix) with ESMTPS id 15C951A9C for ; Fri, 15 Dec 2023 17:12:12 -0500 (EST) Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-529-W_Ci4gvRN6e9WrmGoJbtDg-1; Fri, 15 Dec 2023 17:12:09 -0500 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.rdu2.redhat.com [10.11.54.8]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id B1D8B85A589 for ; Fri, 15 Dec 2023 22:12:09 +0000 (UTC) Received: from himantopus.redhat.com (unknown [10.22.34.110]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 72AEEC15968; Fri, 15 Dec 2023 22:12:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on lists.libvirt.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.4 X-MC-Unique: W_Ci4gvRN6e9WrmGoJbtDg-1 From: Jonathon Jongsma To: devel@lists.libvirt.org Subject: [PATCH v3 02/12] cpu_map: add canonical names to existing CPU models Date: Fri, 15 Dec 2023 16:11:58 -0600 Message-ID: <20231215221208.4138294-3-jjongsma@redhat.com> In-Reply-To: <20231215221208.4138294-1-jjongsma@redhat.com> References: <20231215221208.4138294-1-jjongsma@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.8 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Message-ID-Hash: T6UGBEANQ2ESW7C6CXDN4WLTANAVF4LS X-Message-ID-Hash: T6UGBEANQ2ESW7C6CXDN4WLTANAVF4LS X-MailFrom: jjongsma@redhat.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-config-1; header-match-config-2; header-match-config-3; header-match-devel.lists.libvirt.org-0; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; suspicious-header CC: jdenemar@redhat.com X-Mailman-Version: 3.2.2 Precedence: list List-Id: Development discussions about the libvirt library & tools Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: Content-Type: text/plain; charset="utf-8"; x-default="true" Content-Transfer-Encoding: quoted-printable X-ZM-MESSAGEID: 1702679150481100001 Signed-off-by: Jonathon Jongsma --- src/cpu_map/x86_Broadwell-IBRS.xml | 1 + src/cpu_map/x86_Broadwell-noTSX-IBRS.xml | 1 + src/cpu_map/x86_Broadwell-noTSX.xml | 1 + src/cpu_map/x86_Broadwell.xml | 1 + src/cpu_map/x86_Cascadelake-Server-noTSX.xml | 1 + src/cpu_map/x86_Cascadelake-Server.xml | 1 + src/cpu_map/x86_Cooperlake.xml | 1 + src/cpu_map/x86_Dhyana.xml | 1 + src/cpu_map/x86_EPYC-IBPB.xml | 1 + src/cpu_map/x86_EPYC-Milan.xml | 1 + src/cpu_map/x86_EPYC-Rome.xml | 1 + src/cpu_map/x86_EPYC.xml | 1 + src/cpu_map/x86_Haswell-IBRS.xml | 1 + src/cpu_map/x86_Haswell-noTSX-IBRS.xml | 1 + src/cpu_map/x86_Haswell-noTSX.xml | 1 + src/cpu_map/x86_Haswell.xml | 1 + src/cpu_map/x86_Icelake-Server-noTSX.xml | 1 + src/cpu_map/x86_Icelake-Server.xml | 1 + src/cpu_map/x86_IvyBridge-IBRS.xml | 1 + src/cpu_map/x86_IvyBridge.xml | 1 + src/cpu_map/x86_Nehalem-IBRS.xml | 1 + src/cpu_map/x86_Nehalem.xml | 1 + src/cpu_map/x86_SandyBridge-IBRS.xml | 1 + src/cpu_map/x86_SandyBridge.xml | 1 + src/cpu_map/x86_SapphireRapids.xml | 1 + src/cpu_map/x86_Skylake-Client-IBRS.xml | 1 + src/cpu_map/x86_Skylake-Client-noTSX-IBRS.xml | 1 + src/cpu_map/x86_Skylake-Client.xml | 1 + src/cpu_map/x86_Skylake-Server-IBRS.xml | 1 + src/cpu_map/x86_Skylake-Server-noTSX-IBRS.xml | 1 + src/cpu_map/x86_Skylake-Server.xml | 1 + src/cpu_map/x86_Snowridge.xml | 1 + src/cpu_map/x86_Westmere-IBRS.xml | 1 + src/cpu_map/x86_Westmere.xml | 1 + 34 files changed, 34 insertions(+) diff --git a/src/cpu_map/x86_Broadwell-IBRS.xml b/src/cpu_map/x86_Broadwell= -IBRS.xml index 9033d5fcd5..13568eac81 100644 --- a/src/cpu_map/x86_Broadwell-IBRS.xml +++ b/src/cpu_map/x86_Broadwell-IBRS.xml @@ -1,5 +1,6 @@ + Broadwell-v3 diff --git a/src/cpu_map/x86_Broadwell-noTSX-IBRS.xml b/src/cpu_map/x86_Bro= adwell-noTSX-IBRS.xml index c044b60e36..4ec35ce3a2 100644 --- a/src/cpu_map/x86_Broadwell-noTSX-IBRS.xml +++ b/src/cpu_map/x86_Broadwell-noTSX-IBRS.xml @@ -1,5 +1,6 @@ + Broadwell-v4 diff --git a/src/cpu_map/x86_Broadwell-noTSX.xml b/src/cpu_map/x86_Broadwel= l-noTSX.xml index 637f29ba1c..3fed34e3a4 100644 --- a/src/cpu_map/x86_Broadwell-noTSX.xml +++ b/src/cpu_map/x86_Broadwell-noTSX.xml @@ -1,5 +1,6 @@ + Broadwell-v2 diff --git a/src/cpu_map/x86_Broadwell.xml b/src/cpu_map/x86_Broadwell.xml index 82939a4509..79c96c3857 100644 --- a/src/cpu_map/x86_Broadwell.xml +++ b/src/cpu_map/x86_Broadwell.xml @@ -1,5 +1,6 @@ + Broadwell-v1 diff --git a/src/cpu_map/x86_Cascadelake-Server-noTSX.xml b/src/cpu_map/x86= _Cascadelake-Server-noTSX.xml index bfd4629836..e1b2a820dc 100644 --- a/src/cpu_map/x86_Cascadelake-Server-noTSX.xml +++ b/src/cpu_map/x86_Cascadelake-Server-noTSX.xml @@ -1,5 +1,6 @@ + Cascadelake-Server-v3 diff --git a/src/cpu_map/x86_Cascadelake-Server.xml b/src/cpu_map/x86_Casca= delake-Server.xml index 335e9cb584..4e72518e0d 100644 --- a/src/cpu_map/x86_Cascadelake-Server.xml +++ b/src/cpu_map/x86_Cascadelake-Server.xml @@ -1,5 +1,6 @@ + Cascadelake-Server-v1 diff --git a/src/cpu_map/x86_Cooperlake.xml b/src/cpu_map/x86_Cooperlake.xml index ceca687334..d2967daf3b 100644 --- a/src/cpu_map/x86_Cooperlake.xml +++ b/src/cpu_map/x86_Cooperlake.xml @@ -1,5 +1,6 @@ + Cooperlake-v1 diff --git a/src/cpu_map/x86_Dhyana.xml b/src/cpu_map/x86_Dhyana.xml index cfde07f99f..a7fb540973 100644 --- a/src/cpu_map/x86_Dhyana.xml +++ b/src/cpu_map/x86_Dhyana.xml @@ -1,5 +1,6 @@ + Dhyana-v1 diff --git a/src/cpu_map/x86_EPYC-IBPB.xml b/src/cpu_map/x86_EPYC-IBPB.xml index fc5aadf52e..28f0113392 100644 --- a/src/cpu_map/x86_EPYC-IBPB.xml +++ b/src/cpu_map/x86_EPYC-IBPB.xml @@ -1,5 +1,6 @@ + EPYC-v2 diff --git a/src/cpu_map/x86_EPYC-Milan.xml b/src/cpu_map/x86_EPYC-Milan.xml index 3055e175fa..0dfdbb5b4b 100644 --- a/src/cpu_map/x86_EPYC-Milan.xml +++ b/src/cpu_map/x86_EPYC-Milan.xml @@ -1,5 +1,6 @@ + EPYC-Milan-v1 diff --git a/src/cpu_map/x86_EPYC-Rome.xml b/src/cpu_map/x86_EPYC-Rome.xml index e54d0a48d8..794f3a8ff6 100644 --- a/src/cpu_map/x86_EPYC-Rome.xml +++ b/src/cpu_map/x86_EPYC-Rome.xml @@ -1,5 +1,6 @@ + EPYC-Rome-v1 diff --git a/src/cpu_map/x86_EPYC.xml b/src/cpu_map/x86_EPYC.xml index 3b406de37a..852ca047e4 100644 --- a/src/cpu_map/x86_EPYC.xml +++ b/src/cpu_map/x86_EPYC.xml @@ -1,5 +1,6 @@ + EPYC-v1 diff --git a/src/cpu_map/x86_Haswell-IBRS.xml b/src/cpu_map/x86_Haswell-IBR= S.xml index 0ffe2bae0d..49da1fff06 100644 --- a/src/cpu_map/x86_Haswell-IBRS.xml +++ b/src/cpu_map/x86_Haswell-IBRS.xml @@ -1,5 +1,6 @@ + Haswell-v3 diff --git a/src/cpu_map/x86_Haswell-noTSX-IBRS.xml b/src/cpu_map/x86_Haswe= ll-noTSX-IBRS.xml index 75d709c009..49cac64ff6 100644 --- a/src/cpu_map/x86_Haswell-noTSX-IBRS.xml +++ b/src/cpu_map/x86_Haswell-noTSX-IBRS.xml @@ -1,5 +1,6 @@ + Haswell-v4 diff --git a/src/cpu_map/x86_Haswell-noTSX.xml b/src/cpu_map/x86_Haswell-no= TSX.xml index b0a0faa856..7d2834be9b 100644 --- a/src/cpu_map/x86_Haswell-noTSX.xml +++ b/src/cpu_map/x86_Haswell-noTSX.xml @@ -1,5 +1,6 @@ + Haswell-v2 diff --git a/src/cpu_map/x86_Haswell.xml b/src/cpu_map/x86_Haswell.xml index ee16b30f19..8bbd929db2 100644 --- a/src/cpu_map/x86_Haswell.xml +++ b/src/cpu_map/x86_Haswell.xml @@ -1,5 +1,6 @@ + Haswell-v1 diff --git a/src/cpu_map/x86_Icelake-Server-noTSX.xml b/src/cpu_map/x86_Ice= lake-Server-noTSX.xml index 7c9c32c977..e13135cb81 100644 --- a/src/cpu_map/x86_Icelake-Server-noTSX.xml +++ b/src/cpu_map/x86_Icelake-Server-noTSX.xml @@ -1,5 +1,6 @@ + Icelake-Server-v2 diff --git a/src/cpu_map/x86_Icelake-Server.xml b/src/cpu_map/x86_Icelake-S= erver.xml index b4685bead0..575f2c1014 100644 --- a/src/cpu_map/x86_Icelake-Server.xml +++ b/src/cpu_map/x86_Icelake-Server.xml @@ -1,5 +1,6 @@ + Icelake-Server-v1 diff --git a/src/cpu_map/x86_IvyBridge-IBRS.xml b/src/cpu_map/x86_IvyBridge= -IBRS.xml index 430bc3232d..48720671fa 100644 --- a/src/cpu_map/x86_IvyBridge-IBRS.xml +++ b/src/cpu_map/x86_IvyBridge-IBRS.xml @@ -1,5 +1,6 @@ + IvyBridge-v2 diff --git a/src/cpu_map/x86_IvyBridge.xml b/src/cpu_map/x86_IvyBridge.xml index eaf5d02e82..34057a6bd6 100644 --- a/src/cpu_map/x86_IvyBridge.xml +++ b/src/cpu_map/x86_IvyBridge.xml @@ -1,5 +1,6 @@ + IvyBridge-v1 diff --git a/src/cpu_map/x86_Nehalem-IBRS.xml b/src/cpu_map/x86_Nehalem-IBR= S.xml index 00d0d2fe51..8745efe977 100644 --- a/src/cpu_map/x86_Nehalem-IBRS.xml +++ b/src/cpu_map/x86_Nehalem-IBRS.xml @@ -1,5 +1,6 @@ + Nehalem-v2 diff --git a/src/cpu_map/x86_Nehalem.xml b/src/cpu_map/x86_Nehalem.xml index 9968001fe7..d5717b4264 100644 --- a/src/cpu_map/x86_Nehalem.xml +++ b/src/cpu_map/x86_Nehalem.xml @@ -1,5 +1,6 @@ + Nehalem-v1 diff --git a/src/cpu_map/x86_SandyBridge-IBRS.xml b/src/cpu_map/x86_SandyBr= idge-IBRS.xml index fbdb4f2bf6..2a596bf5f0 100644 --- a/src/cpu_map/x86_SandyBridge-IBRS.xml +++ b/src/cpu_map/x86_SandyBridge-IBRS.xml @@ -1,5 +1,6 @@ + SandyBridge-v2 diff --git a/src/cpu_map/x86_SandyBridge.xml b/src/cpu_map/x86_SandyBridge.= xml index 7c85ed42df..3ee0273264 100644 --- a/src/cpu_map/x86_SandyBridge.xml +++ b/src/cpu_map/x86_SandyBridge.xml @@ -1,5 +1,6 @@ + SandyBridge-v1 diff --git a/src/cpu_map/x86_SapphireRapids.xml b/src/cpu_map/x86_SapphireR= apids.xml index 2297feeeca..a658561fa1 100644 --- a/src/cpu_map/x86_SapphireRapids.xml +++ b/src/cpu_map/x86_SapphireRapids.xml @@ -1,5 +1,6 @@ + SapphireRapids-v1 diff --git a/src/cpu_map/x86_Skylake-Client-IBRS.xml b/src/cpu_map/x86_Skyl= ake-Client-IBRS.xml index 5709e7c2f9..3d81bc0f2b 100644 --- a/src/cpu_map/x86_Skylake-Client-IBRS.xml +++ b/src/cpu_map/x86_Skylake-Client-IBRS.xml @@ -1,5 +1,6 @@ + Skylake-Client-v2 diff --git a/src/cpu_map/x86_Skylake-Client-noTSX-IBRS.xml b/src/cpu_map/x8= 6_Skylake-Client-noTSX-IBRS.xml index ffba34502a..0cb420f5e6 100644 --- a/src/cpu_map/x86_Skylake-Client-noTSX-IBRS.xml +++ b/src/cpu_map/x86_Skylake-Client-noTSX-IBRS.xml @@ -1,5 +1,6 @@ + Skylake-Client-v3 diff --git a/src/cpu_map/x86_Skylake-Client.xml b/src/cpu_map/x86_Skylake-C= lient.xml index 14cd57e176..608fa23de7 100644 --- a/src/cpu_map/x86_Skylake-Client.xml +++ b/src/cpu_map/x86_Skylake-Client.xml @@ -1,5 +1,6 @@ + Skylake-Client-v1 diff --git a/src/cpu_map/x86_Skylake-Server-IBRS.xml b/src/cpu_map/x86_Skyl= ake-Server-IBRS.xml index 9fb3488809..ad54ca85c9 100644 --- a/src/cpu_map/x86_Skylake-Server-IBRS.xml +++ b/src/cpu_map/x86_Skylake-Server-IBRS.xml @@ -1,5 +1,6 @@ + Skylake-Server-v2 diff --git a/src/cpu_map/x86_Skylake-Server-noTSX-IBRS.xml b/src/cpu_map/x8= 6_Skylake-Server-noTSX-IBRS.xml index c162c0acc3..896aa5a7bf 100644 --- a/src/cpu_map/x86_Skylake-Server-noTSX-IBRS.xml +++ b/src/cpu_map/x86_Skylake-Server-noTSX-IBRS.xml @@ -1,5 +1,6 @@ + Skylake-Server-v3 diff --git a/src/cpu_map/x86_Skylake-Server.xml b/src/cpu_map/x86_Skylake-S= erver.xml index e022d94c84..5d76828c0c 100644 --- a/src/cpu_map/x86_Skylake-Server.xml +++ b/src/cpu_map/x86_Skylake-Server.xml @@ -1,5 +1,6 @@ + Skylake-Server-v1 diff --git a/src/cpu_map/x86_Snowridge.xml b/src/cpu_map/x86_Snowridge.xml index 383a24d367..87686502c1 100644 --- a/src/cpu_map/x86_Snowridge.xml +++ b/src/cpu_map/x86_Snowridge.xml @@ -1,5 +1,6 @@ + Snowridge-v1 diff --git a/src/cpu_map/x86_Westmere-IBRS.xml b/src/cpu_map/x86_Westmere-I= BRS.xml index c7898f0c22..f8ad746a22 100644 --- a/src/cpu_map/x86_Westmere-IBRS.xml +++ b/src/cpu_map/x86_Westmere-IBRS.xml @@ -1,5 +1,6 @@ + Westmere-v2 diff --git a/src/cpu_map/x86_Westmere.xml b/src/cpu_map/x86_Westmere.xml index 16e4ad6c30..120140a3ce 100644 --- a/src/cpu_map/x86_Westmere.xml +++ b/src/cpu_map/x86_Westmere.xml @@ -1,5 +1,6 @@ + Westmere-v1 --=20 2.41.0 _______________________________________________ Devel mailing list -- devel@lists.libvirt.org To unsubscribe send an email to devel-leave@lists.libvirt.org