From nobody Thu Apr 25 22:44:49 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) client-ip=216.205.24.124; envelope-from=libvir-list-bounces@redhat.com; helo=us-smtp-delivery-124.mimecast.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=libvir-list-bounces@redhat.com; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1602771508; cv=none; d=zohomail.com; s=zohoarc; b=B6kooWvrCy5cw8uCIe4p3YOgsycm74QRjvLjetczLqY/LP+lAvFSLxvOZ9wnhbtxmQtEZwRWROBjqLYhHxcKD6zE2hEOWhzBZBDw4MzfMBHkA7+G/11g5fBUD9OhJFCe69UIbZOGPr+Dgvrh7sMUIPf8QnOGEvVXJr0F1K3B76Y= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1602771508; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=Xw3gN8+zyRUPCeTjRU+QN1sdwbfY2pjq5PsGyLDd5Bo=; b=R9usm7t2osoWK9Q8j8ye+Jtvl1E8vq2p/JPeuXa7vHQ/hHD/GKbG9Ubkb4tLldLO63c2wr3ByPM1zxMKn9zvV/Ih5KJH8e+S7y8hqYwC6mGRfYv43F1jT5ERlx1qDcjvQT1MJ4bp2ZGMxf/TQSqQb4fLYfe+VrS3gsH+sBguI8k= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=libvir-list-bounces@redhat.com; dmarc=pass header.from= (p=none dis=none) header.from= Return-Path: Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [216.205.24.124]) by mx.zohomail.com with SMTPS id 1602771508773270.6941612495938; Thu, 15 Oct 2020 07:18:28 -0700 (PDT) Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-293-CA8gjobpO-SUosVJ5T4sVA-1; Thu, 15 Oct 2020 10:18:21 -0400 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 67FCA803640; Thu, 15 Oct 2020 14:18:14 +0000 (UTC) Received: from colo-mx.corp.redhat.com (colo-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.21]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 3300876674; Thu, 15 Oct 2020 14:18:14 +0000 (UTC) Received: from lists01.pubmisc.prod.ext.phx2.redhat.com (lists01.pubmisc.prod.ext.phx2.redhat.com [10.5.19.33]) by colo-mx.corp.redhat.com (Postfix) with ESMTP id EBFB25810D; Thu, 15 Oct 2020 14:18:13 +0000 (UTC) Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) by lists01.pubmisc.prod.ext.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id 09FEICoh006947 for ; Thu, 15 Oct 2020 10:18:12 -0400 Received: by smtp.corp.redhat.com (Postfix) id 373676EF67; Thu, 15 Oct 2020 14:18:12 +0000 (UTC) Received: from work.redhat.com (ovpn-112-170.ams2.redhat.com [10.36.112.170]) by smtp.corp.redhat.com (Postfix) with ESMTP id 215D76EF65; Thu, 15 Oct 2020 14:18:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1602771505; h=from:from:sender:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:list-id:list-help: list-unsubscribe:list-subscribe:list-post; bh=Xw3gN8+zyRUPCeTjRU+QN1sdwbfY2pjq5PsGyLDd5Bo=; b=iGB6qHdWJvRzLx1zMqD7p3rdYwi833yUtyekA8dv4/i1cwJ4GtrS9KKrnqUyje4cbC8rGU ad/Cjwu/hRuZjFUoeTRtLLaSqFYVfs54MDfBYK4fTs7m49V7+p8jV87bIcLi1sCz00SwKa GhJ5KObmusGFMTwB7ypbQ54DD+C5cLc= X-MC-Unique: CA8gjobpO-SUosVJ5T4sVA-1 From: Tim Wiederhake To: libvir-list@redhat.com Subject: [libvirt PATCH 1/3] cpu_map: Unify apostrophe and quotation mark usage Date: Thu, 15 Oct 2020 16:18:03 +0200 Message-Id: <20201015141805.143762-2-twiederh@redhat.com> In-Reply-To: <20201015141805.143762-1-twiederh@redhat.com> References: <20201015141805.143762-1-twiederh@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-loop: libvir-list@redhat.com Cc: Tim Wiederhake X-BeenThere: libvir-list@redhat.com X-Mailman-Version: 2.1.12 Precedence: junk List-Id: Development discussions about the libvirt library & tools List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: libvir-list-bounces@redhat.com Errors-To: libvir-list-bounces@redhat.com X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=libvir-list-bounces@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) Content-Type: text/plain; charset="utf-8" Usage was mixed. For doc/schema/*.rng we switched to quotation marks in commit 0e907b8216b42a7c6cfa826e1df539ae513cc3a9. Follow suit. Signed-off-by: Tim Wiederhake --- src/cpu_map/arm_Falkor.xml | 6 +- src/cpu_map/arm_Kunpeng-920.xml | 6 +- src/cpu_map/arm_ThunderX299xx.xml | 6 +- src/cpu_map/arm_cortex-a53.xml | 6 +- src/cpu_map/arm_cortex-a57.xml | 6 +- src/cpu_map/arm_cortex-a72.xml | 6 +- src/cpu_map/arm_features.xml | 34 +- src/cpu_map/index.xml | 12 +- src/cpu_map/ppc64_POWER6.xml | 6 +- src/cpu_map/ppc64_POWER7.xml | 8 +- src/cpu_map/ppc64_POWER8.xml | 10 +- src/cpu_map/ppc64_POWER9.xml | 6 +- src/cpu_map/ppc64_POWERPC_e5500.xml | 6 +- src/cpu_map/ppc64_POWERPC_e6500.xml | 6 +- src/cpu_map/ppc64_vendors.xml | 4 +- src/cpu_map/x86_486.xml | 10 +- src/cpu_map/x86_Broadwell-IBRS.xml | 124 +-- src/cpu_map/x86_Broadwell-noTSX-IBRS.xml | 120 +-- src/cpu_map/x86_Broadwell-noTSX.xml | 118 +-- src/cpu_map/x86_Broadwell.xml | 122 +-- src/cpu_map/x86_Cascadelake-Server-noTSX.xml | 152 ++-- src/cpu_map/x86_Cascadelake-Server.xml | 156 ++-- src/cpu_map/x86_Conroe.xml | 64 +- src/cpu_map/x86_Cooperlake.xml | 8 +- src/cpu_map/x86_Dhyana.xml | 136 ++-- src/cpu_map/x86_EPYC-IBPB.xml | 142 ++-- src/cpu_map/x86_EPYC-Rome.xml | 160 ++-- src/cpu_map/x86_EPYC.xml | 140 ++-- src/cpu_map/x86_Haswell-IBRS.xml | 116 +-- src/cpu_map/x86_Haswell-noTSX-IBRS.xml | 112 +-- src/cpu_map/x86_Haswell-noTSX.xml | 110 +-- src/cpu_map/x86_Haswell.xml | 114 +-- src/cpu_map/x86_Icelake-Client-noTSX.xml | 158 ++-- src/cpu_map/x86_Icelake-Client.xml | 162 ++-- src/cpu_map/x86_Icelake-Server-noTSX.xml | 176 ++--- src/cpu_map/x86_Icelake-Server.xml | 180 ++--- src/cpu_map/x86_IvyBridge-IBRS.xml | 100 +-- src/cpu_map/x86_IvyBridge.xml | 98 +-- src/cpu_map/x86_Nehalem-IBRS.xml | 78 +- src/cpu_map/x86_Nehalem.xml | 76 +- src/cpu_map/x86_Opteron_G1.xml | 58 +- src/cpu_map/x86_Opteron_G2.xml | 66 +- src/cpu_map/x86_Opteron_G3.xml | 76 +- src/cpu_map/x86_Opteron_G4.xml | 96 +-- src/cpu_map/x86_Opteron_G5.xml | 102 +-- src/cpu_map/x86_Penryn.xml | 68 +- src/cpu_map/x86_SandyBridge-IBRS.xml | 88 +-- src/cpu_map/x86_SandyBridge.xml | 86 +-- src/cpu_map/x86_Skylake-Client-IBRS.xml | 142 ++-- src/cpu_map/x86_Skylake-Client-noTSX-IBRS.xml | 138 ++-- src/cpu_map/x86_Skylake-Client.xml | 140 ++-- src/cpu_map/x86_Skylake-Server-IBRS.xml | 150 ++-- src/cpu_map/x86_Skylake-Server-noTSX-IBRS.xml | 146 ++-- src/cpu_map/x86_Skylake-Server.xml | 148 ++-- src/cpu_map/x86_Westmere-IBRS.xml | 74 +- src/cpu_map/x86_Westmere.xml | 76 +- src/cpu_map/x86_athlon.xml | 52 +- src/cpu_map/x86_core2duo.xml | 62 +- src/cpu_map/x86_coreduo.xml | 54 +- src/cpu_map/x86_cpu64-rhel5.xml | 54 +- src/cpu_map/x86_cpu64-rhel6.xml | 58 +- src/cpu_map/x86_features.xml | 724 +++++++++--------- src/cpu_map/x86_kvm32.xml | 48 +- src/cpu_map/x86_kvm64.xml | 56 +- src/cpu_map/x86_n270.xml | 56 +- src/cpu_map/x86_pentium.xml | 22 +- src/cpu_map/x86_pentium2.xml | 40 +- src/cpu_map/x86_pentium3.xml | 42 +- src/cpu_map/x86_pentiumpro.xml | 38 +- src/cpu_map/x86_phenom.xml | 68 +- src/cpu_map/x86_qemu32.xml | 40 +- src/cpu_map/x86_qemu64.xml | 66 +- src/cpu_map/x86_vendors.xml | 6 +- 73 files changed, 3100 insertions(+), 3100 deletions(-) diff --git a/src/cpu_map/arm_Falkor.xml b/src/cpu_map/arm_Falkor.xml index b8f34bbc02..1a924d686c 100644 --- a/src/cpu_map/arm_Falkor.xml +++ b/src/cpu_map/arm_Falkor.xml @@ -1,6 +1,6 @@ - - - + + + diff --git a/src/cpu_map/arm_Kunpeng-920.xml b/src/cpu_map/arm_Kunpeng-920.= xml index e06d4744fc..e925888f09 100644 --- a/src/cpu_map/arm_Kunpeng-920.xml +++ b/src/cpu_map/arm_Kunpeng-920.xml @@ -1,6 +1,6 @@ - - - + + + diff --git a/src/cpu_map/arm_ThunderX299xx.xml b/src/cpu_map/arm_ThunderX29= 9xx.xml index 6c0864f601..38ba4eb45c 100644 --- a/src/cpu_map/arm_ThunderX299xx.xml +++ b/src/cpu_map/arm_ThunderX299xx.xml @@ -1,6 +1,6 @@ - - - + + + diff --git a/src/cpu_map/arm_cortex-a53.xml b/src/cpu_map/arm_cortex-a53.xml index 3580236253..7aab9e1936 100644 --- a/src/cpu_map/arm_cortex-a53.xml +++ b/src/cpu_map/arm_cortex-a53.xml @@ -1,6 +1,6 @@ - - - + + + diff --git a/src/cpu_map/arm_cortex-a57.xml b/src/cpu_map/arm_cortex-a57.xml index 3bc4324173..3002613336 100644 --- a/src/cpu_map/arm_cortex-a57.xml +++ b/src/cpu_map/arm_cortex-a57.xml @@ -1,6 +1,6 @@ - - - + + + diff --git a/src/cpu_map/arm_cortex-a72.xml b/src/cpu_map/arm_cortex-a72.xml index c509a40567..16d5b89b8a 100644 --- a/src/cpu_map/arm_cortex-a72.xml +++ b/src/cpu_map/arm_cortex-a72.xml @@ -1,6 +1,6 @@ - - - + + + diff --git a/src/cpu_map/arm_features.xml b/src/cpu_map/arm_features.xml index 8a53384463..8eb71e2894 100644 --- a/src/cpu_map/arm_features.xml +++ b/src/cpu_map/arm_features.xml @@ -1,22 +1,22 @@ =20 - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + =20 diff --git a/src/cpu_map/index.xml b/src/cpu_map/index.xml index fec01f324c..93c553ecc2 100644 --- a/src/cpu_map/index.xml +++ b/src/cpu_map/index.xml @@ -1,5 +1,5 @@ - + =20 @@ -72,7 +72,7 @@ =20 - + =20 @@ -86,9 +86,9 @@ =20 - + - + =20 @@ -96,10 +96,10 @@ =20 - + =20 - + =20 diff --git a/src/cpu_map/ppc64_POWER6.xml b/src/cpu_map/ppc64_POWER6.xml index 00e27495f4..9c16a99b0d 100644 --- a/src/cpu_map/ppc64_POWER6.xml +++ b/src/cpu_map/ppc64_POWER6.xml @@ -1,6 +1,6 @@ - - - + + + diff --git a/src/cpu_map/ppc64_POWER7.xml b/src/cpu_map/ppc64_POWER7.xml index a071481805..5a858edd5d 100644 --- a/src/cpu_map/ppc64_POWER7.xml +++ b/src/cpu_map/ppc64_POWER7.xml @@ -1,7 +1,7 @@ - - - - + + + + diff --git a/src/cpu_map/ppc64_POWER8.xml b/src/cpu_map/ppc64_POWER8.xml index 64d96fc4c4..73c494479d 100644 --- a/src/cpu_map/ppc64_POWER8.xml +++ b/src/cpu_map/ppc64_POWER8.xml @@ -1,8 +1,8 @@ - - - - - + + + + + diff --git a/src/cpu_map/ppc64_POWER9.xml b/src/cpu_map/ppc64_POWER9.xml index 149fcde924..9a4f724965 100644 --- a/src/cpu_map/ppc64_POWER9.xml +++ b/src/cpu_map/ppc64_POWER9.xml @@ -1,6 +1,6 @@ - - - + + + diff --git a/src/cpu_map/ppc64_POWERPC_e5500.xml b/src/cpu_map/ppc64_POWERP= C_e5500.xml index 3d64c8926c..ae2313bb9f 100644 --- a/src/cpu_map/ppc64_POWERPC_e5500.xml +++ b/src/cpu_map/ppc64_POWERPC_e5500.xml @@ -1,6 +1,6 @@ - - - + + + diff --git a/src/cpu_map/ppc64_POWERPC_e6500.xml b/src/cpu_map/ppc64_POWERP= C_e6500.xml index b0d1006076..86d7c5846d 100644 --- a/src/cpu_map/ppc64_POWERPC_e6500.xml +++ b/src/cpu_map/ppc64_POWERPC_e6500.xml @@ -1,6 +1,6 @@ - - - + + + diff --git a/src/cpu_map/ppc64_vendors.xml b/src/cpu_map/ppc64_vendors.xml index 52ad45c0bd..fc248a642e 100644 --- a/src/cpu_map/ppc64_vendors.xml +++ b/src/cpu_map/ppc64_vendors.xml @@ -1,4 +1,4 @@ - - + + diff --git a/src/cpu_map/x86_486.xml b/src/cpu_map/x86_486.xml index d05b277392..afc56dacae 100644 --- a/src/cpu_map/x86_486.xml +++ b/src/cpu_map/x86_486.xml @@ -1,8 +1,8 @@ - - - - - + + + + + diff --git a/src/cpu_map/x86_Broadwell-IBRS.xml b/src/cpu_map/x86_Broadwell= -IBRS.xml index 9033d5fcd5..66ff838233 100644 --- a/src/cpu_map/x86_Broadwell-IBRS.xml +++ b/src/cpu_map/x86_Broadwell-IBRS.xml @@ -1,65 +1,65 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/x86_Broadwell-noTSX-IBRS.xml b/src/cpu_map/x86_Bro= adwell-noTSX-IBRS.xml index c044b60e36..2c8f5a9f1b 100644 --- a/src/cpu_map/x86_Broadwell-noTSX-IBRS.xml +++ b/src/cpu_map/x86_Broadwell-noTSX-IBRS.xml @@ -1,63 +1,63 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/x86_Broadwell-noTSX.xml b/src/cpu_map/x86_Broadwel= l-noTSX.xml index 637f29ba1c..4039f2b8d5 100644 --- a/src/cpu_map/x86_Broadwell-noTSX.xml +++ b/src/cpu_map/x86_Broadwell-noTSX.xml @@ -1,62 +1,62 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/x86_Broadwell.xml b/src/cpu_map/x86_Broadwell.xml index 82939a4509..cc5cbc5183 100644 --- a/src/cpu_map/x86_Broadwell.xml +++ b/src/cpu_map/x86_Broadwell.xml @@ -1,64 +1,64 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/x86_Cascadelake-Server-noTSX.xml b/src/cpu_map/x86= _Cascadelake-Server-noTSX.xml index bfd4629836..f45a7720e9 100644 --- a/src/cpu_map/x86_Cascadelake-Server-noTSX.xml +++ b/src/cpu_map/x86_Cascadelake-Server-noTSX.xml @@ -1,79 +1,79 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/x86_Cascadelake-Server.xml b/src/cpu_map/x86_Casca= delake-Server.xml index 335e9cb584..b6c39153a5 100644 --- a/src/cpu_map/x86_Cascadelake-Server.xml +++ b/src/cpu_map/x86_Cascadelake-Server.xml @@ -1,81 +1,81 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/x86_Conroe.xml b/src/cpu_map/x86_Conroe.xml index 4cacee6142..6ab92274dd 100644 --- a/src/cpu_map/x86_Conroe.xml +++ b/src/cpu_map/x86_Conroe.xml @@ -1,35 +1,35 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/x86_Cooperlake.xml b/src/cpu_map/x86_Cooperlake.xml index 41bd210638..a2bac92526 100644 --- a/src/cpu_map/x86_Cooperlake.xml +++ b/src/cpu_map/x86_Cooperlake.xml @@ -1,8 +1,8 @@ - - - - + + + + diff --git a/src/cpu_map/x86_Dhyana.xml b/src/cpu_map/x86_Dhyana.xml index 689daf8649..1a00833d02 100644 --- a/src/cpu_map/x86_Dhyana.xml +++ b/src/cpu_map/x86_Dhyana.xml @@ -1,71 +1,71 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/x86_EPYC-IBPB.xml b/src/cpu_map/x86_EPYC-IBPB.xml index 983c5f4445..0ea2a2edfb 100644 --- a/src/cpu_map/x86_EPYC-IBPB.xml +++ b/src/cpu_map/x86_EPYC-IBPB.xml @@ -1,74 +1,74 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/x86_EPYC-Rome.xml b/src/cpu_map/x86_EPYC-Rome.xml index e54d0a48d8..c38fb760a8 100644 --- a/src/cpu_map/x86_EPYC-Rome.xml +++ b/src/cpu_map/x86_EPYC-Rome.xml @@ -1,83 +1,83 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/x86_EPYC.xml b/src/cpu_map/x86_EPYC.xml index 3ebba9f4ed..36462a0dda 100644 --- a/src/cpu_map/x86_EPYC.xml +++ b/src/cpu_map/x86_EPYC.xml @@ -1,73 +1,73 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 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lake-Client-noTSX.xml index 65e648ae21..57bd2c2587 100644 --- a/src/cpu_map/x86_Icelake-Client-noTSX.xml +++ b/src/cpu_map/x86_Icelake-Client-noTSX.xml @@ -1,82 +1,82 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/x86_Icelake-Client.xml b/src/cpu_map/x86_Icelake-C= lient.xml index 5cf32e91fa..c927ac1993 100644 --- a/src/cpu_map/x86_Icelake-Client.xml +++ b/src/cpu_map/x86_Icelake-Client.xml @@ -1,84 +1,84 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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fbdb4f2bf6..995b00db11 100644 --- a/src/cpu_map/x86_SandyBridge-IBRS.xml +++ b/src/cpu_map/x86_SandyBridge-IBRS.xml @@ -1,47 +1,47 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/x86_SandyBridge.xml b/src/cpu_map/x86_SandyBridge.= xml index 7c85ed42df..c4e2f28ec0 100644 --- a/src/cpu_map/x86_SandyBridge.xml +++ b/src/cpu_map/x86_SandyBridge.xml @@ -1,46 +1,46 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/x86_Skylake-Client-IBRS.xml b/src/cpu_map/x86_Skyl= ake-Client-IBRS.xml index 5709e7c2f9..768221d5c6 100644 --- a/src/cpu_map/x86_Skylake-Client-IBRS.xml +++ b/src/cpu_map/x86_Skylake-Client-IBRS.xml @@ -1,76 +1,76 @@ - - - - + + + + - - - - - - - - - - - - - - - - - - - - - - - - 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a/src/cpu_map/x86_Skylake-Server-noTSX-IBRS.xml +++ b/src/cpu_map/x86_Skylake-Server-noTSX-IBRS.xml @@ -1,76 +1,76 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/x86_Skylake-Server.xml b/src/cpu_map/x86_Skylake-S= erver.xml index e022d94c84..a608573740 100644 --- a/src/cpu_map/x86_Skylake-Server.xml +++ b/src/cpu_map/x86_Skylake-Server.xml @@ -1,77 +1,77 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/x86_Westmere-IBRS.xml b/src/cpu_map/x86_Westmere-I= BRS.xml index c7898f0c22..2e4bfd171d 100644 --- a/src/cpu_map/x86_Westmere-IBRS.xml +++ b/src/cpu_map/x86_Westmere-IBRS.xml @@ -1,40 +1,40 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/x86_Westmere.xml b/src/cpu_map/x86_Westmere.xml index 16e4ad6c30..259b6c75ee 100644 --- a/src/cpu_map/x86_Westmere.xml +++ b/src/cpu_map/x86_Westmere.xml @@ -1,41 +1,41 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/x86_athlon.xml b/src/cpu_map/x86_athlon.xml index 81c43c81e8..7ae992c491 100644 --- a/src/cpu_map/x86_athlon.xml +++ b/src/cpu_map/x86_athlon.xml @@ -1,29 +1,29 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/x86_core2duo.xml b/src/cpu_map/x86_core2duo.xml index 412039fe55..e22b183b42 100644 --- a/src/cpu_map/x86_core2duo.xml +++ b/src/cpu_map/x86_core2duo.xml @@ -1,34 +1,34 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/x86_coreduo.xml b/src/cpu_map/x86_coreduo.xml index e2fda9a1d4..d9888beb51 100644 --- a/src/cpu_map/x86_coreduo.xml +++ b/src/cpu_map/x86_coreduo.xml @@ -1,30 +1,30 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/x86_cpu64-rhel5.xml b/src/cpu_map/x86_cpu64-rhel5.= xml index be6bcdb7a6..76bb42ca2a 100644 --- a/src/cpu_map/x86_cpu64-rhel5.xml +++ b/src/cpu_map/x86_cpu64-rhel5.xml @@ -1,30 +1,30 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/x86_cpu64-rhel6.xml b/src/cpu_map/x86_cpu64-rhel6.= xml index c62b1b5575..ab65469a68 100644 --- a/src/cpu_map/x86_cpu64-rhel6.xml +++ b/src/cpu_map/x86_cpu64-rhel6.xml @@ -1,32 +1,32 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/x86_features.xml b/src/cpu_map/x86_features.xml index a55f52b16c..54ad1cf9b1 100644 --- a/src/cpu_map/x86_features.xml +++ b/src/cpu_map/x86_features.xml @@ -7,572 +7,572 @@ --> - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + =20 - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + =20 - - + + =20 - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + =20 - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + =20 - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + =20 - - + + =20 - - + + - - + + - - + + - - + + =20 - - + + - - + + =20 - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + =20 - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + =20 - - + + =20 - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + =20 - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + =20 - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + diff --git a/src/cpu_map/x86_kvm32.xml b/src/cpu_map/x86_kvm32.xml index 9dd96d5b56..c35985f274 100644 --- a/src/cpu_map/x86_kvm32.xml +++ b/src/cpu_map/x86_kvm32.xml @@ -1,27 +1,27 @@ - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/x86_kvm64.xml b/src/cpu_map/x86_kvm64.xml index 185af06f78..dafdd7c979 100644 --- a/src/cpu_map/x86_kvm64.xml +++ b/src/cpu_map/x86_kvm64.xml @@ -1,31 +1,31 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/x86_n270.xml b/src/cpu_map/x86_n270.xml index 5507d2ea3b..0fc392cbe9 100644 --- a/src/cpu_map/x86_n270.xml +++ b/src/cpu_map/x86_n270.xml @@ -1,31 +1,31 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/x86_pentium.xml b/src/cpu_map/x86_pentium.xml index f0a8982115..9863e495eb 100644 --- a/src/cpu_map/x86_pentium.xml +++ b/src/cpu_map/x86_pentium.xml @@ -1,14 +1,14 @@ - - - - - - - - - - - + + + + + + + + + + + diff --git a/src/cpu_map/x86_pentium2.xml b/src/cpu_map/x86_pentium2.xml index aeba082297..a8fc0fea78 100644 --- a/src/cpu_map/x86_pentium2.xml +++ b/src/cpu_map/x86_pentium2.xml @@ -1,23 +1,23 @@ - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/x86_pentium3.xml b/src/cpu_map/x86_pentium3.xml index ab85d2967f..7a75b1c517 100644 --- a/src/cpu_map/x86_pentium3.xml +++ b/src/cpu_map/x86_pentium3.xml @@ -1,24 +1,24 @@ - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/x86_pentiumpro.xml b/src/cpu_map/x86_pentiumpro.xml index b6e061187c..725c0f33b4 100644 --- a/src/cpu_map/x86_pentiumpro.xml +++ b/src/cpu_map/x86_pentiumpro.xml @@ -1,22 +1,22 @@ - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/x86_phenom.xml b/src/cpu_map/x86_phenom.xml index f0f8ece57a..76bd20b594 100644 --- a/src/cpu_map/x86_phenom.xml +++ b/src/cpu_map/x86_phenom.xml @@ -1,37 +1,37 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/x86_qemu32.xml b/src/cpu_map/x86_qemu32.xml index f3fb1959be..2a126384a6 100644 --- a/src/cpu_map/x86_qemu32.xml +++ b/src/cpu_map/x86_qemu32.xml @@ -1,23 +1,23 @@ - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/x86_qemu64.xml b/src/cpu_map/x86_qemu64.xml index 0fe207a2b4..61b1ea5a71 100644 --- a/src/cpu_map/x86_qemu64.xml +++ b/src/cpu_map/x86_qemu64.xml @@ -1,40 +1,40 @@ - - + + - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/x86_vendors.xml b/src/cpu_map/x86_vendors.xml index 840179d1f8..6c746f35c9 100644 --- a/src/cpu_map/x86_vendors.xml +++ b/src/cpu_map/x86_vendors.xml @@ -1,5 +1,5 @@ - - - + + + --=20 2.26.2 From nobody Thu Apr 25 22:44:49 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) client-ip=216.205.24.124; envelope-from=libvir-list-bounces@redhat.com; helo=us-smtp-delivery-124.mimecast.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=libvir-list-bounces@redhat.com; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1602771513; cv=none; d=zohomail.com; s=zohoarc; b=fk+heeFMnC2fPPKYdksFOs4YQ19EAkISbuDoxzP6oKojIIZ9fJOMIFdbT6bGN65Qi9g8jLtjgFpEtX8lwX4PXTwKsFcpWXPgUrqAEWuwb9iUdQNnextkTSjrr6bOzHg3Ln8cZ3e5dI2/nH8qxTChu220oUJfkrZ87B/I6kqJckM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1602771513; 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libvir-list@redhat.com Subject: [libvirt PATCH 2/3] cpu_map: Add script to sync from QEMU i386 cpu models Date: Thu, 15 Oct 2020 16:18:04 +0200 Message-Id: <20201015141805.143762-3-twiederh@redhat.com> In-Reply-To: <20201015141805.143762-1-twiederh@redhat.com> References: <20201015141805.143762-1-twiederh@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-loop: libvir-list@redhat.com Cc: Tim Wiederhake X-BeenThere: libvir-list@redhat.com X-Mailman-Version: 2.1.12 Precedence: junk List-Id: Development discussions about the libvirt library & tools List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: libvir-list-bounces@redhat.com Errors-To: libvir-list-bounces@redhat.com X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=libvir-list-bounces@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) Content-Type: text/plain; charset="utf-8" This script is intended to help in synchronizing i386 QEMU cpu model definitions with libvirt. As the QEMU cpu model definitions are post processed by QEMU and not meant to be consumed by third parties directly, parsing this information is imperfect. Additionally, the libvirt models contain information that cannot be generated from the QEMU data, preventing fully automated usage. The output should nevertheless be helpful for a human in determining potentially interesting changes. Signed-off-by: Tim Wiederhake --- src/cpu_map/sync_qemu_i386.py | 361 ++++++++++++++++++++++++++++++++++ 1 file changed, 361 insertions(+) create mode 100755 src/cpu_map/sync_qemu_i386.py diff --git a/src/cpu_map/sync_qemu_i386.py b/src/cpu_map/sync_qemu_i386.py new file mode 100755 index 0000000000..cdc5426f3d --- /dev/null +++ b/src/cpu_map/sync_qemu_i386.py @@ -0,0 +1,361 @@ +#!/usr/bin/env python3 + +import argparse +import copy +import json +import lark +import os +import re + + +T =3D { + # translating qemu -> libvirt cpu vendor names + "CPUID_VENDOR_AMD": "AMD", + "CPUID_VENDOR_INTEL": "Intel", + "CPUID_VENDOR_HYGON": "Hygon", + + # translating qemu -> libvirt cpu feature names + "CPUID_6_EAX_ARAT": "arat", + "CPUID_7_0_EBX_ADX": "adx", + "CPUID_7_0_EBX_AVX2": "avx2", + "CPUID_7_0_EBX_AVX512BW": "avx512bw", + "CPUID_7_0_EBX_AVX512CD": "avx512cd", + "CPUID_7_0_EBX_AVX512DQ": "avx512dq", + "CPUID_7_0_EBX_AVX512ER": "avx512er", + "CPUID_7_0_EBX_AVX512F": "avx512f", + "CPUID_7_0_EBX_AVX512PF": "avx512pf", + "CPUID_7_0_EBX_AVX512VL": "avx512vl", + "CPUID_7_0_EBX_BMI1": "bmi1", + "CPUID_7_0_EBX_BMI2": "bmi2", + "CPUID_7_0_EBX_CLFLUSHOPT": "clflushopt", + "CPUID_7_0_EBX_CLWB": "clwb", + "CPUID_7_0_EBX_ERMS": "erms", + "CPUID_7_0_EBX_FSGSBASE": "fsgsbase", + "CPUID_7_0_EBX_HLE": "hle", + "CPUID_7_0_EBX_INVPCID": "invpcid", + "CPUID_7_0_EBX_MPX": "mpx", + "CPUID_7_0_EBX_RDSEED": "rdseed", + "CPUID_7_0_EBX_RTM": "rtm", + "CPUID_7_0_EBX_SHA_NI": "sha-ni", + "CPUID_7_0_EBX_SMAP": "smap", + "CPUID_7_0_EBX_SMEP": "smep", + "CPUID_7_0_ECX_AVX512BITALG": "avx512bitalg", + "CPUID_7_0_ECX_AVX512_VBMI2": "avx512vbmi2", + "CPUID_7_0_ECX_AVX512_VBMI": "avx512vbmi", + "CPUID_7_0_ECX_AVX512VNNI": "avx512vnni", + "CPUID_7_0_ECX_AVX512_VPOPCNTDQ": "avx512-vpopcntdq", + "CPUID_7_0_ECX_CLDEMOTE": "cldemote", + "CPUID_7_0_ECX_GFNI": "gfni", + "CPUID_7_0_ECX_LA57": "la57", + "CPUID_7_0_ECX_MOVDIR64B": "movdir64b", + "CPUID_7_0_ECX_MOVDIRI": "movdiri", + "CPUID_7_0_ECX_PKU": "pku", + "CPUID_7_0_ECX_RDPID": "rdpid", + "CPUID_7_0_ECX_UMIP": "umip", + "CPUID_7_0_ECX_VAES": "vaes", + "CPUID_7_0_ECX_VPCLMULQDQ": "vpclmulqdq", + "CPUID_7_0_EDX_ARCH_CAPABILITIES": "arch-capabilities", + "CPUID_7_0_EDX_AVX512_4FMAPS": "avx512-4fmaps", + "CPUID_7_0_EDX_AVX512_4VNNIW": "avx512-4vnniw", + "CPUID_7_0_EDX_CORE_CAPABILITY": "core-capability", + "CPUID_7_0_EDX_SPEC_CTRL": "spec-ctrl", + "CPUID_7_0_EDX_SPEC_CTRL_SSBD": "ssbd", + "CPUID_7_0_EDX_STIBP": "stibp", + "CPUID_7_1_EAX_AVX512_BF16": "avx512-bf16", + "CPUID_8000_0008_EBX_CLZERO": "clzero", + "CPUID_8000_0008_EBX_IBPB": "ibpb", + "CPUID_8000_0008_EBX_STIBP": "amd-stibp", + "CPUID_8000_0008_EBX_WBNOINVD": "wbnoinvd", + "CPUID_8000_0008_EBX_XSAVEERPTR": "xsaveerptr", + "CPUID_ACPI": "acpi", + "CPUID_APIC": "apic", + "CPUID_CLFLUSH": "clflush", + "CPUID_CMOV": "cmov", + "CPUID_CX8": "cx8", + "CPUID_DE": "de", + "CPUID_EXT2_3DNOW": "3dnow", + "CPUID_EXT2_3DNOWEXT": "3dnowext", + "CPUID_EXT2_FFXSR": "fxsr_opt", + "CPUID_EXT2_LM": "lm", + "CPUID_EXT2_MMXEXT": "mmxext", + "CPUID_EXT2_NX": "nx", + "CPUID_EXT2_PDPE1GB": "pdpe1gb", + "CPUID_EXT2_RDTSCP": "rdtscp", + "CPUID_EXT2_SYSCALL": "syscall", + "CPUID_EXT3_3DNOWPREFETCH": "3dnowprefetch", + "CPUID_EXT3_ABM": "abm", + "CPUID_EXT3_CR8LEG": "cr8legacy", + "CPUID_EXT3_FMA4": "fma4", + "CPUID_EXT3_LAHF_LM": "lahf_lm", + "CPUID_EXT3_MISALIGNSSE": "misalignsse", + "CPUID_EXT3_OSVW": "osvw", + "CPUID_EXT3_PERFCORE": "perfctr_core", + "CPUID_EXT3_SSE4A": "sse4a", + "CPUID_EXT3_SVM": "svm", + "CPUID_EXT3_TBM": "tbm", + "CPUID_EXT3_XOP": "xop", + "CPUID_EXT_AES": "aes", + "CPUID_EXT_AVX": "avx", + "CPUID_EXT_CX16": "cx16", + "CPUID_EXT_F16C": "f16c", + "CPUID_EXT_FMA": "fma", + "CPUID_EXT_MOVBE": "movbe", + "CPUID_EXT_PCID": "pcid", + "CPUID_EXT_PCLMULQDQ": "pclmuldq", + "CPUID_EXT_POPCNT": "popcnt", + "CPUID_EXT_RDRAND": "rdrand", + "CPUID_EXT_SSE3": "pni", + "CPUID_EXT_SSE41": "sse4.1", + "CPUID_EXT_SSE42": "sse4.2", + "CPUID_EXT_SSSE3": "ssse3", + "CPUID_EXT_TSC_DEADLINE_TIMER": "tsc-deadline", + "CPUID_EXT_X2APIC": "x2apic", + "CPUID_EXT_XSAVE": "xsave", + "CPUID_FP87": "fpu", + "CPUID_FXSR": "fxsr", + "CPUID_MCA": "mca", + "CPUID_MCE": "mce", + "CPUID_MMX": "mmx", + "CPUID_MSR": "msr", + "CPUID_MTRR": "mtrr", + "CPUID_PAE": "pae", + "CPUID_PAT": "pat", + "CPUID_PGE": "pge", + "CPUID_PSE36": "pse36", + "CPUID_PSE": "pse", + "CPUID_SEP": "sep", + "CPUID_SSE2": "sse2", + "CPUID_SSE": "sse", + "CPUID_SS": "ss", + "CPUID_SVM_NPT": "npt", + "CPUID_SVM_NRIPSAVE": "nrip-save", + "CPUID_TSC": "tsc", + "CPUID_VME": "vme", + "CPUID_XSAVE_XGETBV1": "xgetbv1", + "CPUID_XSAVE_XSAVEC": "xsavec", + "CPUID_XSAVE_XSAVEOPT": "xsaveopt", + "CPUID_XSAVE_XSAVES": "xsaves", + "MSR_ARCH_CAP_IBRS_ALL": "ibrs-all", + "MSR_ARCH_CAP_MDS_NO": "mds-no", + "MSR_ARCH_CAP_PSCHANGE_MC_NO": "pschange-mc-no", + "MSR_ARCH_CAP_RDCL_NO": "rdctl-no", + "MSR_ARCH_CAP_SKIP_L1DFL_VMENTRY": "skip-l1dfl-vmentry", + "MSR_ARCH_CAP_TAA_NO": "taa-no", + "MSR_CORE_CAP_SPLIT_LOCK_DETECT": "split-lock-detect", + + # always disabled features + "CPUID_EXT_MONITOR": None, + "0": None, + + # set to "no auto enable" by qemu + "CPUID_EXT3_TOPOEXT": None, + "MSR_VMX_BASIC_DUAL_MONITOR": None, +} + + +def readline_cont(f): + """Read one logical line from a file `f` i.e. continues lines that end= in + a backslash.""" + + line =3D f.readline() + while line.endswith("\\\n"): + line =3D line[:-2] + " " + f.readline() + return line + + +def read_builtin_x86_defs(filename): + """Extract content between begin_mark and end_mark from file `filename= ` as + string, while expanding shorthand macros like "I486_FEATURES".""" + + begin_mark =3D "static X86CPUDefinition builtin_x86_defs[] =3D {\n" + end_mark =3D "};\n" + shorthand =3D re.compile("^#define ([A-Z0-9_]+_FEATURES) (.*)$") + lines =3D list() + shorthands =3D dict() + + with open(filename, "rt") as f: + while (line :=3D readline_cont(f)) !=3D begin_mark: + if not line: + raise RuntimeError("begin mark not found") + if match :=3D shorthand.match(line): + # TCG definitions are irrelevant for cpu models + newk =3D match.group(1) + if newk.startswith("TCG_"): + continue + + # remove comments, whitespace and bit operators, effective= ly + # turning the bitfield into a list + newv =3D re.sub("([()|\t\n])|(/\*.*?\*/)", " ", match.grou= p(2)) + + # resolve recursive shorthands + for k, v in shorthands.items(): + newv =3D newv.replace(k, v) + + shorthands[newk] =3D newv + + while (line :=3D readline_cont(f)) !=3D end_mark: + if not line: + raise RuntimeError("end marker not found") + + # apply shorthands + for k, v in shorthands.items(): + line =3D line.replace(k, v) + lines.append(line) + + return "".join(lines) + + +def transform(item): + """Recursively transform a Lark syntax tree into python native objects= .""" + + if isinstance(item, lark.lexer.Token): + return str(item) + + if item.data =3D=3D "list": + l =3D list() + for child in item.children: + value =3D transform(child) + if value is None: + continue + l.append(value) + return l + + if item.data =3D=3D "map": + d =3D dict() + for child in item.children: + if len(child.children) !=3D 2: + raise RuntimeError("map entry with more than 2 elements") + key =3D transform(child.children[0]) + value =3D transform(child.children[1]) + if key is None: + raise RuntimeError("map entry with 'None' key") + if value is None: + continue + d[key] =3D value + return d + + if item.data =3D=3D "text": + l =3D list() + for child in item.children: + value =3D transform(child) + if value is None: + continue + l.append(value) + return " ".join(l) + + if item.data =3D=3D "value": + if item.children: + raise RuntimeError("empty list is not empty") + return None + + raise RuntimeError("unexpected item type") + + +def expand_model(model): + """Expand a qemu cpu model description that has its feature split up i= nto + different fields and may have differing versions into several libvirt- + friendly cpu models.""" + + result =3D { + "name": model.pop(".name"), + "vendor": T[model.pop(".vendor")], + "features": set(), + "extra": dict()} + + if ".family" in model and ".model" in model: + result["family"] =3D model.pop(".family") + result["model"] =3D model.pop(".model") + + for k in [k for k in model if k.startswith(".features")]: + v =3D model.pop(k) + for feature in v.split(): + if feature.startswith("VMX_") or feature.startswith("MSR_VMX_"= ): + continue + translated =3D T.get(feature, feature) + if translated: + result["features"].add(translated) + + versions =3D model.pop(".versions", []) + for k, v in model.items(): + result["extra"]["model" + k] =3D v + yield result + + for version in versions: + result =3D copy.deepcopy(result) + result["name"] =3D version.pop(".alias", result["name"]) + + props =3D version.pop(".props", dict()) + for k, v in props: + if v =3D=3D "on": + result["features"].add(k) + elif v =3D=3D "off" and k in result["features"]: + result["features"].remove(k) + else: + result["extra"]["property." + k] =3D v + + for k, v in version.items(): + result["extra"]["version" + k] =3D v + + yield result + + +def output_model(f, model): + if model["extra"]: + f.write("\n") + + f.write("\n") + f.write(" \n".format(model["name"])) + f.write(" \n") + f.write(" \n".format( + model["family"], model["model"])) + f.write(" \n".format(model["vendor"])) + for feature in sorted(model["features"]): + f.write(" \n".format(feature)) + f.write(" \n") + f.write("\n") + + +def main(): + parser =3D argparse.ArgumentParser( + description =3D "Synchronize x86 cpu models from QEMU i386 target.= ") + parser.add_argument("cpufile", + help=3D"Path to 'target/i386/cpu.c' file in the QEMU repository", + type=3Dos.path.realpath) + parser.add_argument("outdir", + help=3D"Path to 'src/cpu_map' directory in the libvirt repository", + type=3Dos.path.realpath) + + args =3D parser.parse_args() + + builtin_x86_defs =3D read_builtin_x86_defs(args.cpufile) + + ast =3D lark.Lark(r""" + list: value ( "," value )* ","? + map: keyvalue ( "," keyvalue )* ","? + keyvalue: IDENTIFIER "=3D" value + ?value: text | "{" "}" | "{" list "}" | "{" map "}" + text: (IDENTIFIER | "\"" (/[^"]+/)? "\"")+ + IDENTIFIER: /[\[\]\._&a-zA-Z0-9]/+ + %ignore (" " | "\r" | "\n" | "\t" | "|" )+ + %ignore "(" ( "X86CPUVersionDefinition" | "PropValue" ) "[])" + %ignore "//" /.*?/ "\n" + %ignore "/*" /(.|\n)*?/ "*/" + """, start=3D"list").parse(builtin_x86_defs) + + models_json =3D transform(ast) + + models =3D list() + for model in models_json: + models.extend(expand_model(model)) + + for model in models: + name =3D os.path.join(args.outdir, "x86_{}.xml".format(model["name= "])) + with open(name, "wt") as f: + output_model(f, model) + + +if __name__ =3D=3D "__main__": + main() --=20 2.26.2 From nobody Thu Apr 25 22:44:49 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) client-ip=216.205.24.124; envelope-from=libvir-list-bounces@redhat.com; helo=us-smtp-delivery-124.mimecast.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 216.205.24.124 as permitted sender) smtp.mailfrom=libvir-list-bounces@redhat.com; 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auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=libvir-list-bounces@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) Content-Type: text/plain; charset="utf-8" Do not merge this commit. This commit contains the changes that would be suggested by the cpu_map sync script (see last commit): ./sync_qemu_i386.py ~/git/qemu/target/i386/cpu.c . Note: * Some models have "signature" / "vendor" added. * Models with multiple "signature"s lose all but one. * Comments are not preserved. * "stepping" in "signature" is not preseved. * "decode" is just flat on + on. * New models: denverton, knightsmill, snowridge --- src/cpu_map/x86_486.xml | 8 ++ src/cpu_map/x86_Broadwell-IBRS.xml | 19 ++++- src/cpu_map/x86_Broadwell-noTSX-IBRS.xml | 19 ++++- src/cpu_map/x86_Broadwell-noTSX.xml | 19 ++++- src/cpu_map/x86_Broadwell.xml | 18 ++++- src/cpu_map/x86_Cascadelake-Server-noTSX.xml | 20 ++++- src/cpu_map/x86_Cascadelake-Server.xml | 17 +++- src/cpu_map/x86_Conroe.xml | 10 ++- src/cpu_map/x86_Cooperlake.xml | 8 +- src/cpu_map/x86_Denverton.xml | 74 +++++++++++++++++ src/cpu_map/x86_Dhyana.xml | 12 ++- src/cpu_map/x86_EPYC-IBPB.xml | 19 ++++- src/cpu_map/x86_EPYC-Rome.xml | 9 +++ src/cpu_map/x86_EPYC.xml | 14 +++- src/cpu_map/x86_Haswell-IBRS.xml | 20 ++++- src/cpu_map/x86_Haswell-noTSX-IBRS.xml | 20 ++++- src/cpu_map/x86_Haswell-noTSX.xml | 20 ++++- src/cpu_map/x86_Haswell.xml | 18 ++++- src/cpu_map/x86_Icelake-Client-noTSX.xml | 14 +++- src/cpu_map/x86_Icelake-Client.xml | 11 ++- src/cpu_map/x86_Icelake-Server-noTSX.xml | 29 ++++++- src/cpu_map/x86_Icelake-Server.xml | 11 ++- src/cpu_map/x86_IvyBridge-IBRS.xml | 13 ++- src/cpu_map/x86_IvyBridge.xml | 12 ++- src/cpu_map/x86_KnightsMill.xml | 77 ++++++++++++++++++ src/cpu_map/x86_Nehalem-IBRS.xml | 14 +++- src/cpu_map/x86_Nehalem.xml | 13 ++- src/cpu_map/x86_Opteron_G1.xml | 9 ++- src/cpu_map/x86_Opteron_G2.xml | 10 ++- src/cpu_map/x86_Opteron_G3.xml | 10 ++- src/cpu_map/x86_Opteron_G4.xml | 11 ++- src/cpu_map/x86_Opteron_G5.xml | 11 ++- src/cpu_map/x86_Penryn.xml | 10 ++- src/cpu_map/x86_SandyBridge-IBRS.xml | 14 +++- src/cpu_map/x86_SandyBridge.xml | 13 ++- src/cpu_map/x86_Skylake-Client-IBRS.xml | 16 ++-- src/cpu_map/x86_Skylake-Client-noTSX-IBRS.xml | 18 +++-- src/cpu_map/x86_Skylake-Client.xml | 15 ++-- src/cpu_map/x86_Skylake-Server-IBRS.xml | 12 ++- src/cpu_map/x86_Skylake-Server-noTSX-IBRS.xml | 15 +++- src/cpu_map/x86_Skylake-Server.xml | 12 ++- src/cpu_map/x86_Snowridge.xml | 79 +++++++++++++++++++ src/cpu_map/x86_Westmere-IBRS.xml | 13 ++- src/cpu_map/x86_Westmere.xml | 14 +++- src/cpu_map/x86_athlon.xml | 8 ++ src/cpu_map/x86_core2duo.xml | 12 ++- src/cpu_map/x86_coreduo.xml | 10 ++- src/cpu_map/x86_kvm32.xml | 9 +++ src/cpu_map/x86_kvm64.xml | 9 +++ src/cpu_map/x86_n270.xml | 12 ++- src/cpu_map/x86_pentium.xml | 9 +++ src/cpu_map/x86_pentium2.xml | 9 +++ src/cpu_map/x86_pentium3.xml | 9 +++ src/cpu_map/x86_phenom.xml | 17 +++- src/cpu_map/x86_qemu32.xml | 8 ++ src/cpu_map/x86_qemu64.xml | 17 ++-- 56 files changed, 819 insertions(+), 130 deletions(-) create mode 100644 src/cpu_map/x86_Denverton.xml create mode 100644 src/cpu_map/x86_KnightsMill.xml create mode 100644 src/cpu_map/x86_Snowridge.xml diff --git a/src/cpu_map/x86_486.xml b/src/cpu_map/x86_486.xml index afc56dacae..acc3ecb7ee 100644 --- a/src/cpu_map/x86_486.xml +++ b/src/cpu_map/x86_486.xml @@ -1,6 +1,14 @@ + + + diff --git a/src/cpu_map/x86_Broadwell-IBRS.xml b/src/cpu_map/x86_Broadwell= -IBRS.xml index 66ff838233..1f3d6bdd91 100644 --- a/src/cpu_map/x86_Broadwell-IBRS.xml +++ b/src/cpu_map/x86_Broadwell-IBRS.xml @@ -1,15 +1,22 @@ + - - - - + + + @@ -20,6 +27,7 @@ + @@ -44,6 +52,7 @@ + @@ -59,7 +68,9 @@ + + diff --git a/src/cpu_map/x86_Broadwell-noTSX-IBRS.xml b/src/cpu_map/x86_Bro= adwell-noTSX-IBRS.xml index 2c8f5a9f1b..32acac2693 100644 --- a/src/cpu_map/x86_Broadwell-noTSX-IBRS.xml +++ b/src/cpu_map/x86_Broadwell-noTSX-IBRS.xml @@ -1,15 +1,22 @@ + - - - - + + + @@ -20,6 +27,7 @@ + @@ -43,6 +51,7 @@ + @@ -57,7 +66,9 @@ + + diff --git a/src/cpu_map/x86_Broadwell-noTSX.xml b/src/cpu_map/x86_Broadwel= l-noTSX.xml index 4039f2b8d5..7568dd796e 100644 --- a/src/cpu_map/x86_Broadwell-noTSX.xml +++ b/src/cpu_map/x86_Broadwell-noTSX.xml @@ -1,15 +1,22 @@ + - - - - + + + @@ -20,6 +27,7 @@ + @@ -43,6 +51,7 @@ + @@ -56,7 +65,9 @@ + + diff --git a/src/cpu_map/x86_Broadwell.xml b/src/cpu_map/x86_Broadwell.xml index cc5cbc5183..1b88ec4887 100644 --- a/src/cpu_map/x86_Broadwell.xml +++ b/src/cpu_map/x86_Broadwell.xml @@ -1,15 +1,21 @@ + - - - - + + + @@ -20,6 +26,7 @@ + @@ -44,6 +51,7 @@ + @@ -58,7 +66,9 @@ + + diff --git a/src/cpu_map/x86_Cascadelake-Server-noTSX.xml b/src/cpu_map/x86= _Cascadelake-Server-noTSX.xml index f45a7720e9..9b2bcce6f7 100644 --- a/src/cpu_map/x86_Cascadelake-Server-noTSX.xml +++ b/src/cpu_map/x86_Cascadelake-Server-noTSX.xml @@ -1,7 +1,15 @@ + - - + + @@ -9,6 +17,7 @@ + @@ -32,14 +41,15 @@ + + - @@ -49,14 +59,17 @@ + + + @@ -70,6 +83,7 @@ + diff --git a/src/cpu_map/x86_Cascadelake-Server.xml b/src/cpu_map/x86_Casca= delake-Server.xml index b6c39153a5..7c397ba004 100644 --- a/src/cpu_map/x86_Cascadelake-Server.xml +++ b/src/cpu_map/x86_Cascadelake-Server.xml @@ -1,7 +1,15 @@ + - + @@ -9,6 +17,7 @@ + @@ -33,14 +42,15 @@ + + - @@ -50,15 +60,18 @@ + + + diff --git a/src/cpu_map/x86_Conroe.xml b/src/cpu_map/x86_Conroe.xml index 6ab92274dd..f4d11f3ddb 100644 --- a/src/cpu_map/x86_Conroe.xml +++ b/src/cpu_map/x86_Conroe.xml @@ -1,8 +1,13 @@ + - - + @@ -31,5 +36,6 @@ + diff --git a/src/cpu_map/x86_Cooperlake.xml b/src/cpu_map/x86_Cooperlake.xml index a2bac92526..6e7c3780d9 100644 --- a/src/cpu_map/x86_Cooperlake.xml +++ b/src/cpu_map/x86_Cooperlake.xml @@ -1,7 +1,13 @@ + - + diff --git a/src/cpu_map/x86_Denverton.xml b/src/cpu_map/x86_Denverton.xml new file mode 100644 index 0000000000..3f356eb876 --- /dev/null +++ b/src/cpu_map/x86_Denverton.xml @@ -0,0 +1,74 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/x86_Dhyana.xml b/src/cpu_map/x86_Dhyana.xml index 1a00833d02..bbf5c31f14 100644 --- a/src/cpu_map/x86_Dhyana.xml +++ b/src/cpu_map/x86_Dhyana.xml @@ -1,7 +1,14 @@ + - + @@ -33,10 +40,11 @@ - + + diff --git a/src/cpu_map/x86_EPYC-IBPB.xml b/src/cpu_map/x86_EPYC-IBPB.xml index 0ea2a2edfb..db0b29eb8d 100644 --- a/src/cpu_map/x86_EPYC-IBPB.xml +++ b/src/cpu_map/x86_EPYC-IBPB.xml @@ -1,7 +1,17 @@ + - + @@ -15,6 +25,7 @@ + @@ -34,16 +45,18 @@ - + + + @@ -69,6 +82,8 @@ + + diff --git a/src/cpu_map/x86_EPYC-Rome.xml b/src/cpu_map/x86_EPYC-Rome.xml index c38fb760a8..26ef2aa504 100644 --- a/src/cpu_map/x86_EPYC-Rome.xml +++ b/src/cpu_map/x86_EPYC-Rome.xml @@ -1,3 +1,11 @@ + @@ -79,5 +87,6 @@ + diff --git a/src/cpu_map/x86_EPYC.xml b/src/cpu_map/x86_EPYC.xml index 36462a0dda..5ea9c8845f 100644 --- a/src/cpu_map/x86_EPYC.xml +++ b/src/cpu_map/x86_EPYC.xml @@ -1,7 +1,16 @@ + - + @@ -33,10 +42,11 @@ - + + diff --git a/src/cpu_map/x86_Haswell-IBRS.xml b/src/cpu_map/x86_Haswell-IBR= S.xml index 51052a16de..8a831f84dc 100644 --- a/src/cpu_map/x86_Haswell-IBRS.xml +++ b/src/cpu_map/x86_Haswell-IBRS.xml @@ -1,13 +1,21 @@ + - - - - + + + @@ -18,6 +26,7 @@ + @@ -42,6 +51,7 @@ + @@ -55,7 +65,9 @@ + + diff --git a/src/cpu_map/x86_Haswell-noTSX-IBRS.xml b/src/cpu_map/x86_Haswe= ll-noTSX-IBRS.xml index 8db662a267..47d653fa9b 100644 --- a/src/cpu_map/x86_Haswell-noTSX-IBRS.xml +++ b/src/cpu_map/x86_Haswell-noTSX-IBRS.xml @@ -1,13 +1,21 @@ + - - - - + + + @@ -18,6 +26,7 @@ + @@ -41,6 +50,7 @@ + @@ -53,7 +63,9 @@ + + diff --git a/src/cpu_map/x86_Haswell-noTSX.xml b/src/cpu_map/x86_Haswell-no= TSX.xml index 2379564011..92c1ad5928 100644 --- a/src/cpu_map/x86_Haswell-noTSX.xml +++ b/src/cpu_map/x86_Haswell-noTSX.xml @@ -1,13 +1,21 @@ + - - - - + + + @@ -18,6 +26,7 @@ + @@ -41,6 +50,7 @@ + @@ -52,7 +62,9 @@ + + diff --git a/src/cpu_map/x86_Haswell.xml b/src/cpu_map/x86_Haswell.xml index 6670303b8b..cc2e2d9343 100644 --- a/src/cpu_map/x86_Haswell.xml +++ b/src/cpu_map/x86_Haswell.xml @@ -1,13 +1,19 @@ + - - - - + + + @@ -18,6 +24,7 @@ + @@ -42,6 +49,7 @@ + @@ -54,7 +62,9 @@ + + diff --git a/src/cpu_map/x86_Icelake-Client-noTSX.xml b/src/cpu_map/x86_Ice= lake-Client-noTSX.xml index 57bd2c2587..3f3243f15f 100644 --- a/src/cpu_map/x86_Icelake-Client-noTSX.xml +++ b/src/cpu_map/x86_Icelake-Client-noTSX.xml @@ -1,7 +1,15 @@ + - - + + @@ -30,7 +38,6 @@ - @@ -38,7 +45,6 @@ - diff --git a/src/cpu_map/x86_Icelake-Client.xml b/src/cpu_map/x86_Icelake-C= lient.xml index c927ac1993..f6b80b9165 100644 --- a/src/cpu_map/x86_Icelake-Client.xml +++ b/src/cpu_map/x86_Icelake-Client.xml @@ -1,7 +1,14 @@ + - + @@ -31,7 +38,6 @@ - @@ -39,7 +45,6 @@ - diff --git a/src/cpu_map/x86_Icelake-Server-noTSX.xml b/src/cpu_map/x86_Ice= lake-Server-noTSX.xml index 3ed475bb32..74d47dc6c2 100644 --- a/src/cpu_map/x86_Icelake-Server-noTSX.xml +++ b/src/cpu_map/x86_Icelake-Server-noTSX.xml @@ -1,7 +1,16 @@ + - - + + @@ -9,6 +18,7 @@ + @@ -17,6 +27,7 @@ + @@ -35,18 +46,19 @@ + - + + - @@ -59,12 +71,17 @@ + + + + + @@ -75,11 +92,15 @@ + + + + diff --git a/src/cpu_map/x86_Icelake-Server.xml b/src/cpu_map/x86_Icelake-S= erver.xml index 19c7da10b0..e50b92ccf4 100644 --- a/src/cpu_map/x86_Icelake-Server.xml +++ b/src/cpu_map/x86_Icelake-Server.xml @@ -1,7 +1,14 @@ + - + @@ -38,7 +45,6 @@ - @@ -47,7 +53,6 @@ - diff --git a/src/cpu_map/x86_IvyBridge-IBRS.xml b/src/cpu_map/x86_IvyBridge= -IBRS.xml index cd37b62cff..aa84d43eb0 100644 --- a/src/cpu_map/x86_IvyBridge-IBRS.xml +++ b/src/cpu_map/x86_IvyBridge-IBRS.xml @@ -1,11 +1,19 @@ + - - + + @@ -49,5 +57,6 @@ + diff --git a/src/cpu_map/x86_IvyBridge.xml b/src/cpu_map/x86_IvyBridge.xml index 1718e14e13..8ce1464eb4 100644 --- a/src/cpu_map/x86_IvyBridge.xml +++ b/src/cpu_map/x86_IvyBridge.xml @@ -1,11 +1,18 @@ + - - + + @@ -48,5 +55,6 @@ + diff --git a/src/cpu_map/x86_KnightsMill.xml b/src/cpu_map/x86_KnightsMill.= xml new file mode 100644 index 0000000000..13e68efa84 --- /dev/null +++ b/src/cpu_map/x86_KnightsMill.xml @@ -0,0 +1,77 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/x86_Nehalem-IBRS.xml b/src/cpu_map/x86_Nehalem-IBR= S.xml index 9f10bf1b01..d72d8d97ce 100644 --- a/src/cpu_map/x86_Nehalem-IBRS.xml +++ b/src/cpu_map/x86_Nehalem-IBRS.xml @@ -1,10 +1,15 @@ + - - - - + @@ -38,5 +43,6 @@ + diff --git a/src/cpu_map/x86_Nehalem.xml b/src/cpu_map/x86_Nehalem.xml index bfa2224794..4a0a1c3cad 100644 --- a/src/cpu_map/x86_Nehalem.xml +++ b/src/cpu_map/x86_Nehalem.xml @@ -1,10 +1,14 @@ + - - - - + @@ -37,5 +41,6 @@ + diff --git a/src/cpu_map/x86_Opteron_G1.xml b/src/cpu_map/x86_Opteron_G1.xml index cbb28aad84..56c5a7ba6a 100644 --- a/src/cpu_map/x86_Opteron_G1.xml +++ b/src/cpu_map/x86_Opteron_G1.xml @@ -1,7 +1,13 @@ + - + @@ -28,5 +34,6 @@ + diff --git a/src/cpu_map/x86_Opteron_G2.xml b/src/cpu_map/x86_Opteron_G2.xml index 4888d8ec4b..4d894ed72c 100644 --- a/src/cpu_map/x86_Opteron_G2.xml +++ b/src/cpu_map/x86_Opteron_G2.xml @@ -1,7 +1,13 @@ + - + @@ -25,12 +31,12 @@ - + diff --git a/src/cpu_map/x86_Opteron_G3.xml b/src/cpu_map/x86_Opteron_G3.xml index 7dd0eb99ed..7f2929a503 100644 --- a/src/cpu_map/x86_Opteron_G3.xml +++ b/src/cpu_map/x86_Opteron_G3.xml @@ -1,7 +1,13 @@ + - + @@ -18,7 +24,6 @@ - @@ -37,5 +42,6 @@ + diff --git a/src/cpu_map/x86_Opteron_G4.xml b/src/cpu_map/x86_Opteron_G4.xml index 2b6e986839..b61df726a5 100644 --- a/src/cpu_map/x86_Opteron_G4.xml +++ b/src/cpu_map/x86_Opteron_G4.xml @@ -1,7 +1,13 @@ + - + @@ -24,6 +30,8 @@ + + @@ -45,6 +53,7 @@ + diff --git a/src/cpu_map/x86_Opteron_G5.xml b/src/cpu_map/x86_Opteron_G5.xml index 9827161a54..970eb90fcc 100644 --- a/src/cpu_map/x86_Opteron_G5.xml +++ b/src/cpu_map/x86_Opteron_G5.xml @@ -1,7 +1,13 @@ + - + @@ -26,6 +32,8 @@ + + @@ -48,6 +56,7 @@ + diff --git a/src/cpu_map/x86_Penryn.xml b/src/cpu_map/x86_Penryn.xml index 9b756f758b..d306be84d6 100644 --- a/src/cpu_map/x86_Penryn.xml +++ b/src/cpu_map/x86_Penryn.xml @@ -1,8 +1,13 @@ + - - + @@ -33,5 +38,6 @@ + diff --git a/src/cpu_map/x86_SandyBridge-IBRS.xml b/src/cpu_map/x86_SandyBr= idge-IBRS.xml index 995b00db11..0f73113566 100644 --- a/src/cpu_map/x86_SandyBridge-IBRS.xml +++ b/src/cpu_map/x86_SandyBridge-IBRS.xml @@ -1,11 +1,19 @@ + - - + + @@ -41,7 +49,9 @@ + + diff --git a/src/cpu_map/x86_SandyBridge.xml b/src/cpu_map/x86_SandyBridge.= xml index c4e2f28ec0..a47ffe1bc6 100644 --- a/src/cpu_map/x86_SandyBridge.xml +++ b/src/cpu_map/x86_SandyBridge.xml @@ -1,11 +1,18 @@ + - - + + @@ -40,7 +47,9 @@ + + diff --git a/src/cpu_map/x86_Skylake-Client-IBRS.xml b/src/cpu_map/x86_Skyl= ake-Client-IBRS.xml index 768221d5c6..bf5de2ce64 100644 --- a/src/cpu_map/x86_Skylake-Client-IBRS.xml +++ b/src/cpu_map/x86_Skylake-Client-IBRS.xml @@ -1,12 +1,15 @@ + - - - - - + @@ -37,7 +40,6 @@ - diff --git a/src/cpu_map/x86_Skylake-Client-noTSX-IBRS.xml b/src/cpu_map/x8= 6_Skylake-Client-noTSX-IBRS.xml index 2df69661a4..c5d53bb33a 100644 --- a/src/cpu_map/x86_Skylake-Client-noTSX-IBRS.xml +++ b/src/cpu_map/x86_Skylake-Client-noTSX-IBRS.xml @@ -1,12 +1,15 @@ + - - - - - - + + @@ -36,7 +39,6 @@ - diff --git a/src/cpu_map/x86_Skylake-Client.xml b/src/cpu_map/x86_Skylake-C= lient.xml index d0e034ee90..36f16e9698 100644 --- a/src/cpu_map/x86_Skylake-Client.xml +++ b/src/cpu_map/x86_Skylake-Client.xml @@ -1,12 +1,14 @@ + - - - - - + @@ -37,7 +39,6 @@ - diff --git a/src/cpu_map/x86_Skylake-Server-IBRS.xml b/src/cpu_map/x86_Skyl= ake-Server-IBRS.xml index 47cdc5541f..6a7915806c 100644 --- a/src/cpu_map/x86_Skylake-Server-IBRS.xml +++ b/src/cpu_map/x86_Skylake-Server-IBRS.xml @@ -1,7 +1,15 @@ + - + @@ -38,7 +46,6 @@ - @@ -48,6 +55,7 @@ + diff --git a/src/cpu_map/x86_Skylake-Server-noTSX-IBRS.xml b/src/cpu_map/x8= 6_Skylake-Server-noTSX-IBRS.xml index 5338f6bcf8..5ef7df5e40 100644 --- a/src/cpu_map/x86_Skylake-Server-noTSX-IBRS.xml +++ b/src/cpu_map/x86_Skylake-Server-noTSX-IBRS.xml @@ -1,7 +1,15 @@ + - - + + @@ -37,7 +45,6 @@ - @@ -47,6 +54,7 @@ + @@ -67,6 +75,7 @@ + diff --git a/src/cpu_map/x86_Skylake-Server.xml b/src/cpu_map/x86_Skylake-S= erver.xml index a608573740..ed414f9f3b 100644 --- a/src/cpu_map/x86_Skylake-Server.xml +++ b/src/cpu_map/x86_Skylake-Server.xml @@ -1,7 +1,14 @@ + - + @@ -19,6 +26,7 @@ + @@ -38,7 +46,6 @@ - @@ -48,6 +55,7 @@ + diff --git a/src/cpu_map/x86_Snowridge.xml b/src/cpu_map/x86_Snowridge.xml new file mode 100644 index 0000000000..5e43d59ac1 --- /dev/null +++ b/src/cpu_map/x86_Snowridge.xml @@ -0,0 +1,79 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/x86_Westmere-IBRS.xml b/src/cpu_map/x86_Westmere-I= BRS.xml index 2e4bfd171d..a3ab58afb2 100644 --- a/src/cpu_map/x86_Westmere-IBRS.xml +++ b/src/cpu_map/x86_Westmere-IBRS.xml @@ -1,10 +1,19 @@ + - + + @@ -22,6 +31,7 @@ + @@ -36,5 +46,6 @@ + diff --git a/src/cpu_map/x86_Westmere.xml b/src/cpu_map/x86_Westmere.xml index 259b6c75ee..72bf717092 100644 --- a/src/cpu_map/x86_Westmere.xml +++ b/src/cpu_map/x86_Westmere.xml @@ -1,12 +1,18 @@ + - - - + + @@ -24,6 +30,7 @@ + @@ -37,5 +44,6 @@ + diff --git a/src/cpu_map/x86_athlon.xml b/src/cpu_map/x86_athlon.xml index 7ae992c491..ae25605445 100644 --- a/src/cpu_map/x86_athlon.xml +++ b/src/cpu_map/x86_athlon.xml @@ -1,6 +1,13 @@ + + @@ -10,6 +17,7 @@ + diff --git a/src/cpu_map/x86_core2duo.xml b/src/cpu_map/x86_core2duo.xml index e22b183b42..796eca2cdb 100644 --- a/src/cpu_map/x86_core2duo.xml +++ b/src/cpu_map/x86_core2duo.xml @@ -1,19 +1,28 @@ + + + + + - @@ -24,6 +33,7 @@ + diff --git a/src/cpu_map/x86_coreduo.xml b/src/cpu_map/x86_coreduo.xml index d9888beb51..e139a88404 100644 --- a/src/cpu_map/x86_coreduo.xml +++ b/src/cpu_map/x86_coreduo.xml @@ -1,7 +1,15 @@ + + + @@ -12,7 +20,6 @@ - @@ -22,6 +29,7 @@ + diff --git a/src/cpu_map/x86_kvm32.xml b/src/cpu_map/x86_kvm32.xml index c35985f274..c5c958626a 100644 --- a/src/cpu_map/x86_kvm32.xml +++ b/src/cpu_map/x86_kvm32.xml @@ -1,6 +1,14 @@ + + + @@ -23,5 +31,6 @@ + diff --git a/src/cpu_map/x86_kvm64.xml b/src/cpu_map/x86_kvm64.xml index dafdd7c979..6f59433ec6 100644 --- a/src/cpu_map/x86_kvm64.xml +++ b/src/cpu_map/x86_kvm64.xml @@ -1,6 +1,14 @@ + + + @@ -27,5 +35,6 @@ + diff --git a/src/cpu_map/x86_n270.xml b/src/cpu_map/x86_n270.xml index 0fc392cbe9..870ce88725 100644 --- a/src/cpu_map/x86_n270.xml +++ b/src/cpu_map/x86_n270.xml @@ -1,7 +1,15 @@ + + + @@ -9,10 +17,11 @@ + - + @@ -22,6 +31,7 @@ + diff --git a/src/cpu_map/x86_pentium.xml b/src/cpu_map/x86_pentium.xml index 9863e495eb..4c65b1c00a 100644 --- a/src/cpu_map/x86_pentium.xml +++ b/src/cpu_map/x86_pentium.xml @@ -1,6 +1,15 @@ + + + + diff --git a/src/cpu_map/x86_pentium2.xml b/src/cpu_map/x86_pentium2.xml index a8fc0fea78..3f59d20b0a 100644 --- a/src/cpu_map/x86_pentium2.xml +++ b/src/cpu_map/x86_pentium2.xml @@ -1,6 +1,15 @@ + + + + diff --git a/src/cpu_map/x86_pentium3.xml b/src/cpu_map/x86_pentium3.xml index 7a75b1c517..c25c8c24ad 100644 --- a/src/cpu_map/x86_pentium3.xml +++ b/src/cpu_map/x86_pentium3.xml @@ -1,6 +1,15 @@ + + + + diff --git a/src/cpu_map/x86_phenom.xml b/src/cpu_map/x86_phenom.xml index 76bd20b594..f1deb66b38 100644 --- a/src/cpu_map/x86_phenom.xml +++ b/src/cpu_map/x86_phenom.xml @@ -1,37 +1,52 @@ + + + + + - + + + + + + diff --git a/src/cpu_map/x86_qemu32.xml b/src/cpu_map/x86_qemu32.xml index 2a126384a6..6c71e5ac17 100644 --- a/src/cpu_map/x86_qemu32.xml +++ b/src/cpu_map/x86_qemu32.xml @@ -1,6 +1,14 @@ + + + diff --git a/src/cpu_map/x86_qemu64.xml b/src/cpu_map/x86_qemu64.xml index 61b1ea5a71..d9b7d785e0 100644 --- a/src/cpu_map/x86_qemu64.xml +++ b/src/cpu_map/x86_qemu64.xml @@ -1,14 +1,14 @@ + - + + @@ -17,6 +17,7 @@ + --=20 2.26.2