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Wed, 22 Apr 2020 07:12:04 +0000 (UTC) Received: from qq.com (out203-205-251-85.mail.qq.com [203.205.251.85]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-179-_8FGJhn_O9iP-fgfi1dB6Q-1; Wed, 22 Apr 2020 03:12:01 -0400 Received: from localhost.localdomain ([111.21.171.11]) by newxmesmtplogicsvrsza5.qq.com (NewEsmtp) with SMTP id 2DD1AA27; Wed, 22 Apr 2020 15:11:29 +0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1587539543; h=from:from:sender:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:list-id:list-help: list-unsubscribe:list-subscribe:list-post; bh=FFWVloieml2AyBJxUy9uOp17CWeAAvmmR3c3N2fho70=; b=KAMxbAHrAjl79wByc1ztG0np/exA/jIkUqInD0Kt8czMTr2OoB03MNoWhmAB6Yrv06BBgu Nu+pmwCWvwCdTwUDKWhJe71GD0z3McOvwzf8iLns+ZtB0RG1lG9hTndYA/k4MLrXJLreT4 RIB+i772uLADOXq1DfH4Kd9OvEV1Pbk= X-MC-Unique: bbWhk18dOsG1o1XSx3Zssw-1 X-MC-Unique: _8FGJhn_O9iP-fgfi1dB6Q-1 X-QQ-mid: xmsmtpt1587539491tlh4l643w X-QQ-XMAILINFO: OUdClsN8K/gVR6RGPf9Pd82Gq/yrIWmeEVYvm1lU4kY63z5xGFT3osXZqvvlsl Hbf0pFfwaNNper6XuKFg1+VXgnVMMtbM17ysaolRuSVH8+1TT8f+95apzdNsCcb1fP91JbcErlKx mFnb6P4YuvTeQJYa3P2J+aqHwb7Uf4KZ22wNiGjvKOP6tYBkeJ0ozlZmGbC7hUJWamv2ewWdDNJV sHMG2u5nm4EOqvYjB8LipvpK7P2Hi29+PB63oEDbIIClgqScs/U97NXVzmJoprtVsm/nOkEfsT5G G2FlatPh3Dy3VwrXH5ZmKRqIZ+Lxg9ER1CSxXJIlMhdMKCWMi+VAM3ophGAfZfH8sKG3zy3b6wQf mUgeIdEgNdv2uFHlcCILOqg5CrnQgBCb1J2R2bfFez4xHOtp9sTfM8EWoB5G72Ey2SydyVuzVsZI glAiw43GwRdLD7/N0jRZ/AXpBLP6LV3jAyiTdN+ItqR+B5rRTG5pD4nhvlbaCZwm1m+rpg5F2omR L3Nna9a8oBOIMZAFDXH24VBOHn+WPIvTk1+/asdAbz2ZkynSS8zCBcQ/ECP78Zftk1thGqzZADSd Y6tpdNbegNE6JKxG4P0uKp+OJINp73VDVw8CmzZ/RqbVJ9GDoFL3z9t2UWaoyJLCGNsbA= From: ZhengZhenyu To: libvir-list@redhat.com Subject: [PATCH V3 1/5] cpu_map: Introduce ARM cpu models Date: Wed, 22 Apr 2020 15:11:16 +0800 Message-Id: <20200422071119.2026-2-zheng.zhenyu@foxmail.com> In-Reply-To: <20200422071119.2026-1-zheng.zhenyu@foxmail.com> References: <20200422071119.2026-1-zheng.zhenyu@foxmail.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.11.54.5 X-MIME-Autoconverted: from quoted-printable to 8bit by lists01.pubmisc.prod.ext.phx2.redhat.com id 03M7CChD010414 X-loop: libvir-list@redhat.com Cc: Zhenyu Zheng , ZhengZhenyu X-BeenThere: libvir-list@redhat.com X-Mailman-Version: 2.1.12 Precedence: junk List-Id: Development discussions about the libvirt library & tools List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: libvir-list-bounces@redhat.com Errors-To: libvir-list-bounces@redhat.com X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) Content-Type: text/plain; charset="utf-8" Introduce vendors and some commonly used models for ARM arch, these will be used for virConnectionGetCapabilities for ARM CPUs. Signed-off-by: Zhenyu Zheng --- src/cpu_map/Makefile.inc.am | 7 +++++++ src/cpu_map/arm_Falkor.xml | 16 ++++++++++++++++ src/cpu_map/arm_Kunpeng-920.xml | 24 ++++++++++++++++++++++++ src/cpu_map/arm_ThunderX299xx.xml | 16 ++++++++++++++++ src/cpu_map/arm_cortex-a53.xml | 16 ++++++++++++++++ src/cpu_map/arm_cortex-a57.xml | 15 +++++++++++++++ src/cpu_map/arm_cortex-a72.xml | 15 +++++++++++++++ src/cpu_map/arm_vendors.xml | 14 ++++++++++++++ src/cpu_map/index.xml | 15 +++++++++++++++ 9 files changed, 138 insertions(+) create mode 100644 src/cpu_map/arm_Falkor.xml create mode 100644 src/cpu_map/arm_Kunpeng-920.xml create mode 100644 src/cpu_map/arm_ThunderX299xx.xml create mode 100644 src/cpu_map/arm_cortex-a53.xml create mode 100644 src/cpu_map/arm_cortex-a57.xml create mode 100644 src/cpu_map/arm_cortex-a72.xml create mode 100644 src/cpu_map/arm_vendors.xml diff --git a/src/cpu_map/Makefile.inc.am b/src/cpu_map/Makefile.inc.am index be64c9a0d4..93c2b19ddf 100644 --- a/src/cpu_map/Makefile.inc.am +++ b/src/cpu_map/Makefile.inc.am @@ -2,7 +2,14 @@ =20 cpumapdir =3D $(pkgdatadir)/cpu_map cpumap_DATA =3D \ + cpu_map/arm_cortex-a53.xml \ + cpu_map/arm_cortex-a57.xml \ + cpu_map/arm_cortex-a72.xml \ cpu_map/arm_features.xml \ + cpu_map/arm_Kunpeng-920.xml \ + cpu_map/arm_ThunderX299xx.xml \ + cpu_map/arm_Falkor.xml \ + cpu_map/arm_vendors.xml \ cpu_map/index.xml \ cpu_map/ppc64_vendors.xml \ cpu_map/ppc64_POWER7.xml \ diff --git a/src/cpu_map/arm_Falkor.xml b/src/cpu_map/arm_Falkor.xml new file mode 100644 index 0000000000..902ed2b6ba --- /dev/null +++ b/src/cpu_map/arm_Falkor.xml @@ -0,0 +1,16 @@ + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/arm_Kunpeng-920.xml b/src/cpu_map/arm_Kunpeng-920.= xml new file mode 100644 index 0000000000..668b8b50dc --- /dev/null +++ b/src/cpu_map/arm_Kunpeng-920.xml @@ -0,0 +1,24 @@ + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/arm_ThunderX299xx.xml b/src/cpu_map/arm_ThunderX29= 9xx.xml new file mode 100644 index 0000000000..9ab3d939e9 --- /dev/null +++ b/src/cpu_map/arm_ThunderX299xx.xml @@ -0,0 +1,16 @@ + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/arm_cortex-a53.xml b/src/cpu_map/arm_cortex-a53.xml new file mode 100644 index 0000000000..963d6d36e3 --- /dev/null +++ b/src/cpu_map/arm_cortex-a53.xml @@ -0,0 +1,16 @@ + + + + + + + + + + + + + + + + diff --git a/src/cpu_map/arm_cortex-a57.xml b/src/cpu_map/arm_cortex-a57.xml new file mode 100644 index 0000000000..92a044ea92 --- /dev/null +++ b/src/cpu_map/arm_cortex-a57.xml @@ -0,0 +1,15 @@ + + + + + + + + + + + + + + + diff --git a/src/cpu_map/arm_cortex-a72.xml b/src/cpu_map/arm_cortex-a72.xml new file mode 100644 index 0000000000..9664eacd7b --- /dev/null +++ b/src/cpu_map/arm_cortex-a72.xml @@ -0,0 +1,15 @@ + + + + + + + + + + + + + + + diff --git a/src/cpu_map/arm_vendors.xml b/src/cpu_map/arm_vendors.xml new file mode 100644 index 0000000000..703c2112b1 --- /dev/null +++ b/src/cpu_map/arm_vendors.xml @@ -0,0 +1,14 @@ + + + + + + + + + + + + + + diff --git a/src/cpu_map/index.xml b/src/cpu_map/index.xml index 50b030de29..20646a031c 100644 --- a/src/cpu_map/index.xml +++ b/src/cpu_map/index.xml @@ -85,6 +85,21 @@ =20 + + + + + + + + + + + + + + + --=20 2.26.0.windows.1 From nobody Thu May 2 09:06:18 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 205.139.110.61 as permitted sender) client-ip=205.139.110.61; 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Wed, 22 Apr 2020 07:12:18 +0000 (UTC) Received: from qq.com (out203-205-221-235.mail.qq.com [203.205.221.235]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-107-9S-luEBJMMKXgj1xggKTGA-1; Wed, 22 Apr 2020 03:12:16 -0400 Received: from localhost.localdomain ([111.21.171.11]) by newxmesmtplogicsvrsza5.qq.com (NewEsmtp) with SMTP id 2DD1AA27; Wed, 22 Apr 2020 15:11:29 +0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1587539551; h=from:from:sender:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:list-id:list-help: list-unsubscribe:list-subscribe:list-post; bh=l7fWcbRa5LNrPXH6vGhaTQ9HVEF+2APNH8iT+cY3764=; b=jQnZxKGbNd44XK9dPf8UrhI78gdSu5sypWPqWV4JjZEZ6Q9hx5m8xsM+PMCou989JVzcSd o57zCFTdw5XeMtA4qos3lhtjkJilgnnPLToKJ3UmEUuGbtEds29EySCBGi0ZbiiOSbU2YI O/zXj6k9gpETEvnA6uO1Hgirf/uBj/M= X-MC-Unique: FwvxXY6kP56cNUUGKrkjFA-1 X-MC-Unique: 9S-luEBJMMKXgj1xggKTGA-1 X-QQ-mid: xmsmtpt1587539517ty2baw5de X-QQ-XMAILINFO: M5QFJXLKESD5tvjTlGIZvL/XBwA/EgJp0V4/2KZS0QCJPECNgPxkPmdn+KZ3cp TMtmci4r+FJ5m86G/g++zlq4UH6ThBZYIzdxOm63tDKt31ADggXXVS4PqgVxCNbqTOY4vHpWeHbI Fi+piuxIAGh/PAuCgWpd5ZNCpXP414ZEHAGi8EIo+bpoEiZxl7uaaRMj65/E60RmGhUJB7iwPXF9 2WGI0mOY0EZoLR71Sbe1csE6vzITKWLYNYNP0aRYz30Ka5U2FBB5yrMgb8OhuIUzUgb0Pi+M0XVI pbaVw/dr0R8dRRNxC+b7Xh6cTuGJY7wyHYfyJ/uAkAu6RR7v1buGwaEFxG5tDOyoIKR3ZMPX5Gsx flonATLGXOVrC/fhesXDsAmSJ2EpDmTdvwNJX9jpMq4VyJr80+qu8snMm6G6AcoJHqoiBtowKdHC gqcIe/WVQZIjjPNQutAo1CV8IQBooOlOxWvqQzJIvKxYfADde8/4Bk9tjMgWg1XELK5079O/scbM iwRjAUkCX8D8VZfvMUlxeqVfM0PpjQhXbXIACRO7t7Fytjw9MZnzEa46TTkybhyPwGgx+UbvJM0Q rw1GrAqDvyhhumSIgmD49AGqUzUgRBbeeeWCXw2WvuoqbbIXsHpnTK7EbojbhBWrCjcEZkiIQq6A Tmhw== From: ZhengZhenyu To: libvir-list@redhat.com Subject: [PATCH V3 2/5] cpu: Introduce virCPUarmData to virCPUData Date: Wed, 22 Apr 2020 15:11:18 +0800 Message-Id: <20200422071119.2026-3-zheng.zhenyu@foxmail.com> In-Reply-To: <20200422071119.2026-1-zheng.zhenyu@foxmail.com> References: <20200422071119.2026-1-zheng.zhenyu@foxmail.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.78 on 10.11.54.6 X-MIME-Autoconverted: from quoted-printable to 8bit by lists01.pubmisc.prod.ext.phx2.redhat.com id 03M7CLw2010451 X-loop: libvir-list@redhat.com Cc: Zhenyu Zheng , ZhengZhenyu X-BeenThere: libvir-list@redhat.com X-Mailman-Version: 2.1.12 Precedence: junk List-Id: Development discussions about the libvirt library & tools List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: libvir-list-bounces@redhat.com Errors-To: libvir-list-bounces@redhat.com X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) Content-Type: text/plain; charset="utf-8" Introduce virCPUarmData to virCPUData Signed-off-by: Zhenyu Zheng --- src/cpu/Makefile.inc.am | 1 + src/cpu/cpu.h | 2 ++ src/cpu/cpu_arm_data.h | 31 +++++++++++++++++++++++++++++++ 3 files changed, 34 insertions(+) create mode 100644 src/cpu/cpu_arm_data.h diff --git a/src/cpu/Makefile.inc.am b/src/cpu/Makefile.inc.am index 0abeee87b6..bea203fb5c 100644 --- a/src/cpu/Makefile.inc.am +++ b/src/cpu/Makefile.inc.am @@ -10,6 +10,7 @@ CPU_SOURCES =3D \ cpu/cpu_s390.c \ cpu/cpu_arm.h \ cpu/cpu_arm.c \ + cpu/cpu_arm_data.h \ cpu/cpu_ppc64.h \ cpu/cpu_ppc64.c \ cpu/cpu_ppc64_data.h \ diff --git a/src/cpu/cpu.h b/src/cpu/cpu.h index f779d2be17..ec22a183a1 100644 --- a/src/cpu/cpu.h +++ b/src/cpu/cpu.h @@ -27,6 +27,7 @@ #include "cpu_conf.h" #include "cpu_x86_data.h" #include "cpu_ppc64_data.h" +#include "cpu_arm_data.h" =20 =20 typedef struct _virCPUData virCPUData; @@ -36,6 +37,7 @@ struct _virCPUData { union { virCPUx86Data x86; virCPUppc64Data ppc64; + virCPUarmData arm; /* generic driver needs no data */ } data; }; diff --git a/src/cpu/cpu_arm_data.h b/src/cpu/cpu_arm_data.h new file mode 100644 index 0000000000..cf12ca8c2e --- /dev/null +++ b/src/cpu/cpu_arm_data.h @@ -0,0 +1,31 @@ +/* + * cpu_arm_data.h: 64-bit arm CPU specific data + * + * Copyright (C) 2020 Huawei Technologies Co., Ltd. + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; If not, see + * . + * + */ + +#pragma once + +#define VIR_CPU_ARM_DATA_INIT { 0 } + +typedef struct _virCPUarmData virCPUarmData; +struct _virCPUarmData { + unsigned long vendor_id; + unsigned long pvr; + char *features; +}; --=20 2.26.0.windows.1 From nobody Thu May 2 09:06:18 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 207.211.31.81 as permitted sender) client-ip=207.211.31.81; envelope-from=libvir-list-bounces@redhat.com; helo=us-smtp-delivery-1.mimecast.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 207.211.31.81 as permitted sender) smtp.mailfrom=libvir-list-bounces@redhat.com; dmarc=fail(p=none dis=none) header.from=foxmail.com ARC-Seal: i=1; a=rsa-sha256; t=1587539694; cv=none; d=zohomail.com; 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charset="utf-8" Introduce vendor and model struct and related cleanup functions for ARM cpu. Signed-off-by: Zhenyu Zheng --- src/cpu/cpu_arm.c | 73 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 73 insertions(+) diff --git a/src/cpu/cpu_arm.c b/src/cpu/cpu_arm.c index ee5802198f..2009904cc9 100644 --- a/src/cpu/cpu_arm.c +++ b/src/cpu/cpu_arm.c @@ -1,6 +1,7 @@ /* * cpu_arm.c: CPU driver for arm CPUs * + * Copyright (C) 2020 Huawei Technologies Co., Ltd. * Copyright (C) 2013 Red Hat, Inc. * Copyright (C) Canonical Ltd. 2012 * @@ -23,7 +24,9 @@ =20 #include "viralloc.h" #include "cpu.h" +#include "cpu_arm.h" #include "cpu_map.h" +#include "virlog.h" #include "virstring.h" #include "virxml.h" =20 @@ -36,6 +39,21 @@ static const virArch archs[] =3D { VIR_ARCH_AARCH64, }; =20 +typedef struct _virCPUarmVendor virCPUarmVendor; +typedef virCPUarmVendor *virCPUarmVendorPtr; +struct _virCPUarmVendor { + char *name; + unsigned long value; +}; + +typedef struct _virCPUarmModel virCPUarmModel; +typedef virCPUarmModel *virCPUarmModelPtr; +struct _virCPUarmModel { + char *name; + virCPUarmVendorPtr vendor; + virCPUarmData data; +}; + typedef struct _virCPUarmFeature virCPUarmFeature; typedef virCPUarmFeature *virCPUarmFeaturePtr; struct _virCPUarmFeature { @@ -64,6 +82,10 @@ G_DEFINE_AUTOPTR_CLEANUP_FUNC(virCPUarmFeature, virCPUar= mFeatureFree); typedef struct _virCPUarmMap virCPUarmMap; typedef virCPUarmMap *virCPUarmMapPtr; struct _virCPUarmMap { + size_t nvendors; + virCPUarmVendorPtr *vendors; + size_t nmodels; + virCPUarmModelPtr *models; GPtrArray *features; }; =20 @@ -81,12 +103,62 @@ virCPUarmMapNew(void) return map; } =20 +static void +virCPUarmDataClear(virCPUarmData *data) +{ + if (!data) + return; + + VIR_FREE(data->features); +} + +static void +virCPUarmDataFree(virCPUDataPtr cpuData) +{ + if (!cpuData) + return; + + virCPUarmDataClear(&cpuData->data.arm); + VIR_FREE(cpuData); +} + +static void +virCPUarmModelFree(virCPUarmModelPtr model) +{ + if (!model) + return; + + virCPUarmDataClear(&model->data); + g_free(model->name); + g_free(model); +} + +static void +virCPUarmVendorFree(virCPUarmVendorPtr vendor) +{ + if (!vendor) + return; + + g_free(vendor->name); + g_free(vendor); +} + static void virCPUarmMapFree(virCPUarmMapPtr map) { if (!map) return; =20 + size_t i; + + for (i =3D 0; i < map->nmodels; i++) + virCPUarmModelFree(map->models[i]); + g_free(map->models); + + for (i =3D 0; i < map->nvendors; i++) + virCPUarmVendorFree(map->vendors[i]); + g_free(map->vendors); + g_ptr_array_free(map->features, TRUE); =20 g_free(map); @@ -259,6 +331,7 @@ struct cpuArchDriver cpuDriverArm =3D { .compare =3D virCPUarmCompare, .decode =3D NULL, .encode =3D NULL, + .dataFree =3D virCPUarmDataFree, .baseline =3D virCPUarmBaseline, .update =3D virCPUarmUpdate, .validateFeatures =3D virCPUarmValidateFeatures, --=20 2.26.0.windows.1 From nobody Thu May 2 09:06:18 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 207.211.31.120 as permitted sender) client-ip=207.211.31.120; envelope-from=libvir-list-bounces@redhat.com; helo=us-smtp-1.mimecast.com; Authentication-Results: mx.zohomail.com; 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Wed, 22 Apr 2020 07:12:46 +0000 (UTC) Received: from qq.com (out203-205-221-190.mail.qq.com [203.205.221.190]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-160-NSmxK42ePjagZ4S8PVgcUQ-1; Wed, 22 Apr 2020 03:12:43 -0400 Received: from localhost.localdomain ([111.21.171.11]) by newxmesmtplogicsvrsza5.qq.com (NewEsmtp) with SMTP id 2DD1AA27; Wed, 22 Apr 2020 15:11:29 +0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1587539578; h=from:from:sender:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:list-id:list-help: list-unsubscribe:list-subscribe:list-post; bh=pjmrkiB3tEZqJxOR97oVLXtkSzkjSvy9kSJyJuCgmxQ=; b=YWY8QTZRfH578G/u4oNFAMYHPZAN6r+ncN7N3kA3qn9g3rSeqQUxlwdhaSShOmMQXWRKcS pHIU1/4gQKIZVXcBJvTfn28QWIvKDiozcRk8D5q7n6X3elI1G6PUL7Vh0IbreyMTCz4gIi vbcM7rQr3aZ/bbQ3LlyI3uc6aiZo5a8= X-MC-Unique: 8fjo1YmbNmm17l82HSNJBQ-1 X-MC-Unique: NSmxK42ePjagZ4S8PVgcUQ-1 X-QQ-mid: xmsmtpt1587539544t5hrngpc1 X-QQ-XMAILINFO: NYYDu0KrGl4J1/xanj2W3X9SjfB7HZe6SDnwaxoZmrIo3tfhISji/OxFQGZD3q QGlSfOCyNmA9ri7vHmHHtsv6re2a7kfA1+tZeGy6AVKFfTwnx7UAXDZwN8F+xK/ikCGkX2B6bg82 REjnvsg4w69rHGM9ptcUwIPs5A2RXIxRicNjVlJk2BeegRrssvZ0L9TTHk66k0PBiGbS3x8L4dfu 9Q84e+H842M42PSBKWiWdYXzB1pszuNAB2vRdcTG3IAAJVVF0OcHklOIh9my4b00QrkX4++NxwNk jqw9z8ohat5bB3x/NfJOIk75AvxFVdw6MEpk/dDFdT0t1cq0wXZDWy4U+ngol1q/tQ4dVE4I/gEi hU2F4D8SKHIYFcTqZBPSAB7QLYYhWej5RZWy67sO59JIUCXeXY/MokjiAJaZrpLWjPKTKPUpWjti Cj8mRdBNZ/DleIaCT2TyCgEOQhghVtLh2UsykbQ3PY80jlZK86yAtg24RESOdNbgJlR+lGsHoW9/ YtywG925ja98XNxpZQppFVHGffxO8stUcBHMNybDoaS1xJTG6mC8o+g8rz/iha3NVr6Zbz6ubGmC eRrDGTKPnULZq7CgZmuUxY7NtaSO2FPVNELbVxXldEAWB+0ILAPQgMB1rKjXRNH1FzUSzhSADnez XaHQ== From: ZhengZhenyu To: libvir-list@redhat.com Subject: [PATCH V3 4/5] cpu: Add helper funtions to parse vendor and model Date: Wed, 22 Apr 2020 15:11:22 +0800 Message-Id: <20200422071119.2026-5-zheng.zhenyu@foxmail.com> In-Reply-To: <20200422071119.2026-1-zheng.zhenyu@foxmail.com> References: <20200422071119.2026-1-zheng.zhenyu@foxmail.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.11.54.5 X-MIME-Autoconverted: from quoted-printable to 8bit by lists01.pubmisc.prod.ext.phx2.redhat.com id 03M7CnuY010562 X-loop: libvir-list@redhat.com Cc: Zhenyu Zheng , ZhengZhenyu X-BeenThere: libvir-list@redhat.com X-Mailman-Version: 2.1.12 Precedence: junk List-Id: Development discussions about the libvirt library & tools List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: libvir-list-bounces@redhat.com Errors-To: libvir-list-bounces@redhat.com X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) Content-Type: text/plain; charset="utf-8" Add helper functions to parse vendor and model from xml for ARM arch, and use them as callbacks when load cpu maps. Signed-off-by: Zhenyu Zheng --- src/cpu/cpu_arm.c | 173 +++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 170 insertions(+), 3 deletions(-) diff --git a/src/cpu/cpu_arm.c b/src/cpu/cpu_arm.c index 2009904cc9..6e9ff9bf11 100644 --- a/src/cpu/cpu_arm.c +++ b/src/cpu/cpu_arm.c @@ -204,6 +204,174 @@ virCPUarmMapFeatureParse(xmlXPathContextPtr ctxt G_GN= UC_UNUSED, return 0; } =20 +static virCPUarmVendorPtr +virCPUarmVendorFindByID(virCPUarmMapPtr map, + unsigned long vendor_id) +{ + size_t i; + + for (i =3D 0; i < map->nvendors; i++) { + if (map->vendors[i]->value =3D=3D vendor_id) + return map->vendors[i]; + } + + return NULL; +} + + +static virCPUarmVendorPtr +virCPUarmVendorFindByName(virCPUarmMapPtr map, + const char *name) +{ + size_t i; + + for (i =3D 0; i < map->nvendors; i++) { + if (STREQ(map->vendors[i]->name, name)) + return map->vendors[i]; + } + + return NULL; +} + + +static int +virCPUarmVendorParse(xmlXPathContextPtr ctxt, + const char *name, + void *data) +{ + virCPUarmMapPtr map =3D data; + virCPUarmVendorPtr vendor =3D NULL; + int ret =3D -1; + + if (VIR_ALLOC(vendor) < 0) + return ret; + + vendor->name =3D g_strdup(name); + + if (virCPUarmVendorFindByName(map, vendor->name)) { + virReportError(VIR_ERR_INTERNAL_ERROR, + _("CPU vendor %s already defined"), + vendor->name); + goto cleanup; + } + + if (virXPathULongHex("string(@value)", ctxt, &vendor->value) < 0) { + virReportError(VIR_ERR_INTERNAL_ERROR, + "%s", _("Missing CPU vendor value")); + goto cleanup; + } + + if (virCPUarmVendorFindByID(map, vendor->value)) { + virReportError(VIR_ERR_INTERNAL_ERROR, + _("CPU vendor value 0x%2lx already defined"), + vendor->value); + goto cleanup; + } + + if (VIR_APPEND_ELEMENT(map->vendors, map->nvendors, vendor) < 0) + goto cleanup; + + ret =3D 0; + + cleanup: + virCPUarmVendorFree(vendor); + return ret; + +} + +static virCPUarmModelPtr +virCPUarmModelFind(virCPUarmMapPtr map, + const char *name) +{ + size_t i; + + for (i =3D 0; i < map->nmodels; i++) { + if (STREQ(map->models[i]->name, name)) + return map->models[i]; + } + + return NULL; +} + +#if defined(__aarch64__) +static virCPUarmModelPtr +virCPUarmModelFindByPVR(virCPUarmMapPtr map, + unsigned long pvr) +{ + size_t i; + + for (i =3D 0; i < map->nmodels; i++) { + if (map->models[i]->data.pvr =3D=3D pvr) + return map->models[i]; + } + + return NULL; +} +#endif + +static int +virCPUarmModelParse(xmlXPathContextPtr ctxt, + const char *name, + void *data) +{ + virCPUarmMapPtr map =3D data; + virCPUarmModel *model; + g_autofree xmlNodePtr *nodes =3D NULL; + g_autofree char *vendor =3D NULL; + + if (VIR_ALLOC(model) < 0) + goto error; + + model->name =3D g_strdup(name); + + if (virCPUarmModelFind(map, model->name)) { + virReportError(VIR_ERR_INTERNAL_ERROR, + _("CPU model %s already defined"), + model->name); + goto error; + } + + if (virXPathBoolean("boolean(./vendor)", ctxt)) { + vendor =3D virXPathString("string(./vendor/@name)", ctxt); + if (!vendor) { + virReportError(VIR_ERR_INTERNAL_ERROR, + _("Invalid vendor element in CPU model %s"), + model->name); + goto error; + } + + if (!(model->vendor =3D virCPUarmVendorFindByName(map, vendor))) { + virReportError(VIR_ERR_INTERNAL_ERROR, + _("Unknown vendor %s referenced by CPU model %s= "), + vendor, model->name); + goto error; + } + } + + if (!virXPathBoolean("boolean(./pvr)", ctxt)) { + virReportError(VIR_ERR_INTERNAL_ERROR, + _("Missing PVR information for CPU model %s"), + model->name); + goto error; + } + + if (virXPathULongHex("string(./pvr/@value)", ctxt, &model->data.pvr) <= 0) { + virReportError(VIR_ERR_INTERNAL_ERROR, + _("Missing or invalid PVR value in CPU model %s"), + model->name); + goto error; + } + + if (VIR_APPEND_ELEMENT(map->models, map->nmodels, model) < 0) + goto error; + + return 0; + + error: + virCPUarmModelFree(model); + return -1; +} + static virCPUarmMapPtr virCPUarmLoadMap(void) { @@ -211,8 +379,8 @@ virCPUarmLoadMap(void) =20 map =3D virCPUarmMapNew(); =20 - if (cpuMapLoad("arm", NULL, virCPUarmMapFeatureParse, NULL, map) < 0) - return NULL; + if (cpuMapLoad("arm", virCPUarmVendorParse, virCPUarmMapFeatureParse, + virCPUarmModelParse, map) < 0) =20 return g_steal_pointer(&map); } @@ -273,7 +441,6 @@ virCPUarmUpdate(virCPUDefPtr guest, return ret; } =20 - static virCPUDefPtr virCPUarmBaseline(virCPUDefPtr *cpus, unsigned int ncpus G_GNUC_UNUSED, --=20 2.26.0.windows.1 From nobody Thu May 2 09:06:18 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of redhat.com designates 205.139.110.120 as permitted sender) client-ip=205.139.110.120; envelope-from=libvir-list-bounces@redhat.com; helo=us-smtp-1.mimecast.com; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of redhat.com designates 205.139.110.120 as permitted sender) smtp.mailfrom=libvir-list-bounces@redhat.com; dmarc=fail(p=none dis=none) header.from=foxmail.com ARC-Seal: i=1; a=rsa-sha256; t=1587539590; cv=none; d=zohomail.com; s=zohoarc; b=DZyUpJeK23dgpWsmqwMzP4CFAs4xnp2hl/PkWcFj9oxhl6p9CuN5nNZOUFcWbL5B64r1Uo94/7apkYx29s+AtD7gzXD15oVfsUEqe7ZdTxWM5zDClBBN1e6NRSJFOCS1XA/bmggaP/1gyKjrGbwDlMTApJbXmmtw0gpt6CL8Lzs= ARC-Message-Signature: i=1; a=rsa-sha256; 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bh=fAI39u2daFVjKYRIT+mW0tr92eyaIa0FTCAmikuY0As=; b=crRsU5k6hPHQZY6TfZS2Lbjh5EF8Pl8+tjBw7u/X9sBYIN8TAxCxfrxTgKjeg5+DWEA2at MQELCeFKVm1ZOF1MPSrfuhHa0veXRrsihimB844yQ7LSZvYRCAqkvlAA8fespc/eXKwauz erevHoP0sct+Jck0aywfVReXTzD81pc= X-MC-Unique: mpJO-SguPE6FqhDeaz8JoQ-1 X-MC-Unique: UidAv3BbMvGhIWflVvfkHA-1 X-QQ-mid: xmsmtpt1587539557t60b1ppm7 X-QQ-XMAILINFO: MAG0TOuIZ+ZjXdbetK5/jFf0oYDmRGR+XfU2lBhecUdggz47/JRLSfPXUpgeOZ e59Ln8Ry7DwiVTX2S95qfEpMfy8/XaMEzTsE+GA2lOVX1KAeqYOcaoqWk/3kuRQpuykm9fTiH7Pc gg9DZwN9IEHHKvcvWi14ixDmOKdjVlhpr+dnYFPxAwGYK6iw5RvPGU4mplDOftjCIJeQAfUV0xIx I8O7nwz2UjsTAAoICVPQWDiglsseymQDEdS8S3h0VwR7B2bVKw1SRLbFDYOFL97ZdqqXzKHL+q54 NNnNdwzObfqn8272UKj+v27B6huP+ypf2JCyD0r07iqTUdFQ5Nr3KyHBU9WQRkUkcWsVNm6qPW+n IF2vskk57ECULz/nN0pk0/9nMGo38l0ZUm+oYkJ5DPeH3Jjr6o2Jlggw+hczDoRyWQsnk31usKPv BqUQeERuk3JTCtn3GVbVbyU4WJGjWXvJLss6XHjJ65wl5ZFRfID892tmOfxtbSjGAfsmjFQZnylR VNcen25c/XOTFvDGSQiJnPsT96FsqM6o9NTnOfYwpM/Bgu132gvzhm1QozHN4VPcbw2fItnxGwoe 3FFFFxMzq+BgA+T7x4KiWuykjl69cPSQxYPksjAritLtJU7KwWf3MGBO/Jy0g3Hd2vjVZlPR3nL2 HzugunxfBJCKuC From: ZhengZhenyu To: libvir-list@redhat.com Subject: [PATCH V3 5/5] cpu: Introduce getHost support for ARM CPU driver Date: Wed, 22 Apr 2020 15:11:24 +0800 Message-Id: <20200422071119.2026-6-zheng.zhenyu@foxmail.com> In-Reply-To: <20200422071119.2026-1-zheng.zhenyu@foxmail.com> References: <20200422071119.2026-1-zheng.zhenyu@foxmail.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.78 on 10.11.54.4 X-MIME-Autoconverted: from quoted-printable to 8bit by lists01.pubmisc.prod.ext.phx2.redhat.com id 03M7CwJ3010573 X-loop: libvir-list@redhat.com Cc: Zhenyu Zheng , ZhengZhenyu X-BeenThere: libvir-list@redhat.com X-Mailman-Version: 2.1.12 Precedence: junk List-Id: Development discussions about the libvirt library & tools List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: libvir-list-bounces@redhat.com Errors-To: libvir-list-bounces@redhat.com X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @redhat.com) Content-Type: text/plain; charset="utf-8" Introduce getHost support for ARM CPU driver, read CPU vendor_id, part_id and flags from registers directly. These codes will only be compiled on aarch64 hardwares. Signed-off-by: Zhenyu Zheng --- src/cpu/cpu_arm.c | 204 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 204 insertions(+) diff --git a/src/cpu/cpu_arm.c b/src/cpu/cpu_arm.c index 6e9ff9bf11..ec50a5615d 100644 --- a/src/cpu/cpu_arm.c +++ b/src/cpu/cpu_arm.c @@ -21,6 +21,10 @@ */ =20 #include +#if defined(__aarch64__) +# include +# include +#endif =20 #include "viralloc.h" #include "cpu.h" @@ -32,6 +36,15 @@ =20 #define VIR_FROM_THIS VIR_FROM_CPU =20 +#if defined(__aarch64__) +/* Shift bit mask for parsing cpu flags */ +# define BIT_SHIFTS(n) (1UL << (n)) +/* The current max number of cpu flags on ARM is 32 */ +# define MAX_CPU_FLAGS 32 +#endif + +VIR_LOG_INIT("cpu.cpu_arm"); + static const virArch archs[] =3D { VIR_ARCH_ARMV6L, VIR_ARCH_ARMV7B, @@ -491,12 +504,203 @@ virCPUarmValidateFeatures(virCPUDefPtr cpu) return 0; } =20 +#if defined(__aarch64__) +/** + * virCPUarmCpuDataFromRegs: + * + * @data: 64-bit arm CPU specific data + * + * Fetches CPU vendor_id and part_id from MIDR_EL1 register, parse CPU + * flags from AT_HWCAP. There are currently 32 valid flags on ARM arch + * represented by each bit. + */ +static int +virCPUarmCpuDataFromRegs(virCPUarmData *data) +{ + /* Generate human readable flag list according to the order of */ + /* AT_HWCAP bit map */ + const char *flag_list[MAX_CPU_FLAGS] =3D { + "fp", "asimd", "evtstrm", "aes", "pmull", "sha1", "sha2", + "crc32", "atomics", "fphp", "asimdhp", "cpuid", "asimdrdm", + "jscvt", "fcma", "lrcpc", "dcpop", "sha3", "sm3", "sm4", + "asimddp", "sha512", "sve", "asimdfhm", "dit", "uscat", + "ilrcpc", "flagm", "ssbs", "sb", "paca", "pacg"}; + unsigned long cpuid, hwcaps; + char **features =3D NULL; + g_autofree char *cpu_feature_str =3D NULL; + int cpu_feature_index =3D 0; + size_t i; + + if (!(getauxval(AT_HWCAP) & HWCAP_CPUID)) { + virReportError(VIR_ERR_INTERNAL_ERROR, "%s", + _("CPUID registers unavailable")); + return -1; + } + + /* read the cpuid data from MIDR_EL1 register */ + asm("mrs %0, MIDR_EL1" : "=3Dr" (cpuid)); + VIR_DEBUG("CPUID read from register: 0x%016lx", cpuid); + + /* parse the coresponding part_id bits */ + data->pvr =3D cpuid>>4&0xFFF; + /* parse the coresponding vendor_id bits */ + data->vendor_id =3D cpuid>>24&0xFF; + + hwcaps =3D getauxval(AT_HWCAP); + VIR_DEBUG("CPU flags read from register: 0x%016lx", hwcaps); + + if (VIR_ALLOC_N(features, MAX_CPU_FLAGS) < 0) + return -1; + + /* shift bit map mask to parse for CPU flags */ + for (i =3D 0; i< MAX_CPU_FLAGS; i++) { + if (hwcaps & BIT_SHIFTS(i)) { + features[cpu_feature_index] =3D g_strdup(flag_list[i]); + cpu_feature_index++; + } + } + + if (cpu_feature_index > 1) { + cpu_feature_str =3D virStringListJoin((const char **)features, " "= ); + if (!cpu_feature_str) + goto error; + } + data->features =3D g_strdup(cpu_feature_str); + + return 0; + + error: + virStringListFree(features); + return -1; +} + +static int +virCPUarmDataParseFeatures(virCPUDefPtr cpu, + const virCPUarmData *cpuData) +{ + int ret =3D -1; + size_t i; + char **features; + + if (!cpu || !cpuData) + return ret; + + if (!(features =3D virStringSplitCount(cpuData->features, " ", + 0, &cpu->nfeatures))) + return ret; + if (cpu->nfeatures) { + if (VIR_ALLOC_N(cpu->features, cpu->nfeatures) < 0) + goto error; + + for (i =3D 0; i < cpu->nfeatures; i++) { + cpu->features[i].policy =3D VIR_CPU_FEATURE_REQUIRE; + cpu->features[i].name =3D g_strdup(features[i]); + } + } + + ret =3D 0; + + cleanup: + virStringListFree(features); + return ret; + + error: + for (i =3D 0; i < cpu->nfeatures; i++) + VIR_FREE(cpu->features[i].name); + VIR_FREE(cpu->features); + cpu->nfeatures =3D 0; + goto cleanup; +} + +static int +virCPUarmDecode(virCPUDefPtr cpu, + const virCPUarmData *cpuData, + virDomainCapsCPUModelsPtr models) +{ + virCPUarmMapPtr map; + virCPUarmModelPtr model; + virCPUarmVendorPtr vendor =3D NULL; + + if (!cpuData || !(map =3D virCPUarmGetMap())) + return -1; + + if (!(model =3D virCPUarmModelFindByPVR(map, cpuData->pvr))) { + virReportError(VIR_ERR_OPERATION_FAILED, + _("Cannot find CPU model with PVR 0x%03lx"), + cpuData->pvr); + return -1; + } + + if (!virCPUModelIsAllowed(model->name, models)) { + virReportError(VIR_ERR_CONFIG_UNSUPPORTED, + _("CPU model %s is not supported by hypervisor"), + model->name); + return -1; + } + + cpu->model =3D g_strdup(model->name); + + if (cpuData->vendor_id && + !(vendor =3D virCPUarmVendorFindByID(map, cpuData->vendor_id))) { + virReportError(VIR_ERR_OPERATION_FAILED, + _("Cannot find CPU vendor with vendor id 0x%02lx"), + cpuData->vendor_id); + return -1; + } + + if (vendor) + cpu->vendor =3D g_strdup(vendor->name); + + if (cpuData->features && + virCPUarmDataParseFeatures(cpu, cpuData) < 0) + return -1; + + return 0; +} + +static int +virCPUarmDecodeCPUData(virCPUDefPtr cpu, + const virCPUData *data, + virDomainCapsCPUModelsPtr models) +{ + return virCPUarmDecode(cpu, &data->data.arm, models); +} + +static int +virCPUarmGetHost(virCPUDefPtr cpu, + virDomainCapsCPUModelsPtr models) +{ + virCPUDataPtr cpuData =3D NULL; + int ret =3D -1; + + if (virCPUarmDriverInitialize() < 0) + goto cleanup; + + if (!(cpuData =3D virCPUDataNew(archs[0]))) + goto cleanup; + + if (virCPUarmCpuDataFromRegs(&cpuData->data.arm) < 0) + goto cleanup; + + ret =3D virCPUarmDecodeCPUData(cpu, cpuData, models); + + cleanup: + virCPUarmDataFree(cpuData); + return ret; +} +#endif + struct cpuArchDriver cpuDriverArm =3D { .name =3D "arm", .arch =3D archs, .narch =3D G_N_ELEMENTS(archs), .compare =3D virCPUarmCompare, +#if defined(__aarch64__) + .getHost =3D virCPUarmGetHost, + .decode =3D virCPUarmDecodeCPUData, +#else .decode =3D NULL, +#endif .encode =3D NULL, .dataFree =3D virCPUarmDataFree, .baseline =3D virCPUarmBaseline, --=20 2.26.0.windows.1