From nobody Sat May 18 05:34:57 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of redhat.com designates 209.132.183.28 as permitted sender) client-ip=209.132.183.28; envelope-from=libvir-list-bounces@redhat.com; helo=mx1.redhat.com; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of redhat.com designates 209.132.183.28 as permitted sender) smtp.mailfrom=libvir-list-bounces@redhat.com; dmarc=pass(p=none dis=none) header.from=redhat.com Return-Path: Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) by mx.zohomail.com with SMTPS id 1533142962268481.9966438493019; Wed, 1 Aug 2018 10:02:42 -0700 (PDT) Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id C98B3307D857; Wed, 1 Aug 2018 17:02:39 +0000 (UTC) Received: from colo-mx.corp.redhat.com (colo-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.21]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 5AA1C194B9; Wed, 1 Aug 2018 17:02:39 +0000 (UTC) Received: from lists01.pubmisc.prod.ext.phx2.redhat.com (lists01.pubmisc.prod.ext.phx2.redhat.com [10.5.19.33]) by colo-mx.corp.redhat.com (Postfix) with ESMTP id 5D9E54A463; Wed, 1 Aug 2018 17:02:38 +0000 (UTC) Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.rdu2.redhat.com [10.11.54.5]) by lists01.pubmisc.prod.ext.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id w71H2av6025939 for ; Wed, 1 Aug 2018 13:02:37 -0400 Received: by smtp.corp.redhat.com (Postfix) id D3FC21C581; Wed, 1 Aug 2018 17:02:36 +0000 (UTC) Received: from localhost.localdomain.com (unknown [10.33.36.41]) by smtp.corp.redhat.com (Postfix) with ESMTP id 4C0931C664; Wed, 1 Aug 2018 17:02:36 +0000 (UTC) From: =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= To: libvir-list@redhat.com Date: Wed, 1 Aug 2018 18:02:29 +0100 Message-Id: <20180801170232.17672-2-berrange@redhat.com> In-Reply-To: <20180801170232.17672-1-berrange@redhat.com> References: <20180801170232.17672-1-berrange@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.11.54.5 X-loop: libvir-list@redhat.com Subject: [libvirt] [PATCH 1/4] cpu: allow include files for CPU definition X-BeenThere: libvir-list@redhat.com X-Mailman-Version: 2.1.12 Precedence: junk List-Id: Development discussions about the libvirt library & tools List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Sender: libvir-list-bounces@redhat.com Errors-To: libvir-list-bounces@redhat.com X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.48]); Wed, 01 Aug 2018 17:02:40 +0000 (UTC) X-ZohoMail: RSF_0 Z_629925259 SPT_0 Allow for syntax to reference other files in the CPU database directory Signed-off-by: Daniel P. Berrang=C3=A9 Reviewed-by: John Ferlan --- libvirt.spec.in | 2 +- mingw-libvirt.spec.in | 4 +-- src/Makefile.am | 2 +- src/cpu/cpu_map.c | 84 +++++++++++++++++++++++++++++++++++++++++-- 4 files changed, 86 insertions(+), 6 deletions(-) diff --git a/libvirt.spec.in b/libvirt.spec.in index 19ae55cdaf..b6745dbffa 100644 --- a/libvirt.spec.in +++ b/libvirt.spec.in @@ -1856,7 +1856,7 @@ exit 0 %{_datadir}/libvirt/schemas/storagepool.rng %{_datadir}/libvirt/schemas/storagevol.rng =20 -%{_datadir}/libvirt/cpu_map.xml +%{_datadir}/libvirt/cpu_map*.xml =20 %{_datadir}/libvirt/test-screenshot.png =20 diff --git a/mingw-libvirt.spec.in b/mingw-libvirt.spec.in index cc1e619927..22fe7a000f 100644 --- a/mingw-libvirt.spec.in +++ b/mingw-libvirt.spec.in @@ -260,7 +260,7 @@ rm -rf $RPM_BUILD_ROOT%{mingw64_libexecdir}/libvirt-gue= sts.sh %{mingw32_datadir}/libvirt/api/libvirt-qemu-api.xml %{mingw32_datadir}/libvirt/api/libvirt-admin-api.xml =20 -%{mingw32_datadir}/libvirt/cpu_map.xml +%{mingw32_datadir}/libvirt/cpu_map*.xml =20 %{mingw32_datadir}/libvirt/test-screenshot.png =20 @@ -347,7 +347,7 @@ rm -rf $RPM_BUILD_ROOT%{mingw64_libexecdir}/libvirt-gue= sts.sh %{mingw64_datadir}/libvirt/api/libvirt-qemu-api.xml %{mingw64_datadir}/libvirt/api/libvirt-admin-api.xml =20 -%{mingw64_datadir}/libvirt/cpu_map.xml +%{mingw64_datadir}/libvirt/cpu_map*.xml =20 %{mingw64_datadir}/libvirt/test-screenshot.png =20 diff --git a/src/Makefile.am b/src/Makefile.am index a4f213480e..11a7ac81e2 100644 --- a/src/Makefile.am +++ b/src/Makefile.am @@ -366,7 +366,7 @@ check-local: check-protocol check-symfile check-symsort= ing \ =20 =20 =20 -pkgdata_DATA =3D cpu/cpu_map.xml +pkgdata_DATA =3D $(wildcard $(srcdir)/cpu/cpu_map*.xml) =20 EXTRA_DIST +=3D $(pkgdata_DATA) =20 diff --git a/src/cpu/cpu_map.c b/src/cpu/cpu_map.c index d263eb8cdd..9e090919ed 100644 --- a/src/cpu/cpu_map.c +++ b/src/cpu/cpu_map.c @@ -70,6 +70,83 @@ static int load(xmlXPathContextPtr ctxt, return ret; } =20 +static int +cpuMapLoadInclude(const char *filename, + cpuMapLoadCallback cb, + void *data) +{ + xmlDocPtr xml =3D NULL; + xmlXPathContextPtr ctxt =3D NULL; + int ret =3D -1; + int element; + char *mapfile; + + if (!(mapfile =3D virFileFindResource(filename, + abs_topsrcdir "/src/cpu", + PKGDATADIR))) + return -1; + + VIR_DEBUG("Loading CPU map include from %s", mapfile); + + if (!(xml =3D virXMLParseFileCtxt(mapfile, &ctxt))) + goto cleanup; + + ctxt->node =3D xmlDocGetRootElement(xml); + + for (element =3D 0; element < CPU_MAP_ELEMENT_LAST; element++) { + if (load(ctxt, element, cb, data) < 0) { + virReportError(VIR_ERR_INTERNAL_ERROR, + _("cannot parse CPU map '%s'"), mapfile); + goto cleanup; + } + } + + ret =3D 0; + + cleanup: + xmlXPathFreeContext(ctxt); + xmlFreeDoc(xml); + VIR_FREE(mapfile); + + return ret; +} + + +static int loadIncludes(xmlXPathContextPtr ctxt, + cpuMapLoadCallback callback, + void *data) +{ + int ret =3D -1; + xmlNodePtr ctxt_node; + xmlNodePtr *nodes =3D NULL; + int n; + size_t i; + + ctxt_node =3D ctxt->node; + + n =3D virXPathNodeSet("include", ctxt, &nodes); + if (n < 0) + goto cleanup; + + for (i =3D 0; i < n; i++) { + char *filename =3D virXMLPropString(nodes[i], "filename"); + VIR_DEBUG("Finding CPU map include '%s'", filename); + if (cpuMapLoadInclude(filename, callback, data) < 0) { + VIR_FREE(filename); + goto cleanup; + } + VIR_FREE(filename); + } + + ret =3D 0; + + cleanup: + ctxt->node =3D ctxt_node; + VIR_FREE(nodes); + + return ret; +} + =20 int cpuMapLoad(const char *arch, cpuMapLoadCallback cb, @@ -88,7 +165,7 @@ int cpuMapLoad(const char *arch, PKGDATADIR))) return -1; =20 - VIR_DEBUG("Loading CPU map from %s", mapfile); + VIR_DEBUG("Loading '%s' CPU map from %s", arch, mapfile); =20 if (arch =3D=3D NULL) { virReportError(VIR_ERR_INTERNAL_ERROR, @@ -122,11 +199,14 @@ int cpuMapLoad(const char *arch, for (element =3D 0; element < CPU_MAP_ELEMENT_LAST; element++) { if (load(ctxt, element, cb, data) < 0) { virReportError(VIR_ERR_INTERNAL_ERROR, - _("cannot parse CPU map for %s architecture"), = arch); + _("cannot parse CPU map '%s'"), mapfile); goto cleanup; } } =20 + if (loadIncludes(ctxt, cb, data) < 0) + goto cleanup; + ret =3D 0; =20 cleanup: --=20 2.17.1 -- libvir-list mailing list libvir-list@redhat.com https://www.redhat.com/mailman/listinfo/libvir-list From nobody Sat May 18 05:34:57 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of redhat.com designates 209.132.183.28 as permitted sender) client-ip=209.132.183.28; envelope-from=libvir-list-bounces@redhat.com; helo=mx1.redhat.com; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of redhat.com designates 209.132.183.28 as permitted sender) smtp.mailfrom=libvir-list-bounces@redhat.com; dmarc=pass(p=none dis=none) header.from=redhat.com Return-Path: Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) by mx.zohomail.com with SMTPS id 1533458753918535.9527034427757; Sun, 5 Aug 2018 01:45:53 -0700 (PDT) Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 2B879C057FA2; Sun, 5 Aug 2018 08:45:52 +0000 (UTC) Received: from colo-mx.corp.redhat.com (colo-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.21]) by smtp.corp.redhat.com (Postfix) with ESMTPS id EAF0F5E7AA; Sun, 5 Aug 2018 08:45:51 +0000 (UTC) Received: from lists01.pubmisc.prod.ext.phx2.redhat.com (lists01.pubmisc.prod.ext.phx2.redhat.com [10.5.19.33]) by colo-mx.corp.redhat.com (Postfix) with ESMTP id 9DB474EE10; Sun, 5 Aug 2018 08:45:51 +0000 (UTC) Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.rdu2.redhat.com [10.11.54.5]) by lists01.pubmisc.prod.ext.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id w71H2bw9025944 for ; Wed, 1 Aug 2018 13:02:37 -0400 Received: by smtp.corp.redhat.com (Postfix) id C05AA1C5AB; Wed, 1 Aug 2018 17:02:37 +0000 (UTC) Received: from localhost.localdomain.com (unknown [10.33.36.41]) by smtp.corp.redhat.com (Postfix) with ESMTP id 299721C664; Wed, 1 Aug 2018 17:02:36 +0000 (UTC) From: =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= To: libvir-list@redhat.com Date: Wed, 1 Aug 2018 18:02:30 +0100 Message-Id: <20180801170232.17672-3-berrange@redhat.com> In-Reply-To: <20180801170232.17672-1-berrange@redhat.com> References: <20180801170232.17672-1-berrange@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.11.54.5 X-loop: libvir-list@redhat.com Subject: [libvirt] [PATCH 2/4] cpu: push more parsing logic into common code X-BeenThere: libvir-list@redhat.com X-Mailman-Version: 2.1.12 Precedence: junk List-Id: Development discussions about the libvirt library & tools List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Sender: libvir-list-bounces@redhat.com Errors-To: libvir-list-bounces@redhat.com X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Sun, 05 Aug 2018 08:45:52 +0000 (UTC) X-ZohoMail: RDMRC_0 RSF_0 Z_629925259 SPT_0 The x86 and ppc impls both duplicate some logic when parsing CPU features. Change the callback signature so that this duplication can be pushed up a level to common code. Signed-off-by: Daniel P. Berrang=C3=A9 Reviewed-by: John Ferlan --- src/cpu/cpu_map.c | 106 +++++++++++++++--------- src/cpu/cpu_map.h | 22 ++--- src/cpu/cpu_ppc64.c | 112 ++++++------------------- src/cpu/cpu_x86.c | 196 +++++++++++++------------------------------- 4 files changed, 155 insertions(+), 281 deletions(-) diff --git a/src/cpu/cpu_map.c b/src/cpu/cpu_map.c index 9e090919ed..17ed53fda6 100644 --- a/src/cpu/cpu_map.c +++ b/src/cpu/cpu_map.c @@ -35,31 +35,51 @@ =20 VIR_LOG_INIT("cpu.cpu_map"); =20 -VIR_ENUM_IMPL(cpuMapElement, CPU_MAP_ELEMENT_LAST, - "vendor", - "feature", - "model") - - -static int load(xmlXPathContextPtr ctxt, - cpuMapElement element, - cpuMapLoadCallback callback, - void *data) +static int +loadData(const char *mapfile, + xmlXPathContextPtr ctxt, + const char *xpath, + cpuMapLoadCallback callback, + void *data) { int ret =3D -1; xmlNodePtr ctxt_node; xmlNodePtr *nodes =3D NULL; int n; + size_t i; + int rv; =20 ctxt_node =3D ctxt->node; =20 - n =3D virXPathNodeSet(cpuMapElementTypeToString(element), ctxt, &nodes= ); - if (n < 0) + n =3D virXPathNodeSet(xpath, ctxt, &nodes); + if (n < 0) { + virReportError(VIR_ERR_INTERNAL_ERROR, + _("cannot find '%s' in CPU map '%s'"), xpath, mapfi= le); goto cleanup; + } =20 - if (n > 0 && - callback(element, ctxt, nodes, n, data) < 0) + if (n > 0 && !callback) { + virReportError(VIR_ERR_INTERNAL_ERROR, + _("Unexpected %s in CPU map '%s'"), xpath, mapfile); goto cleanup; + } + + for (i =3D 0; i < n; i++) { + xmlNodePtr old =3D ctxt->node; + char *name =3D virXMLPropString(nodes[i], "name"); + if (!name) { + virReportError(VIR_ERR_INTERNAL_ERROR, + _("cannot find %s name in CPU map '%s'"), xpath= , mapfile); + goto cleanup; + } + VIR_DEBUG("Load %s name %s", xpath, name); + ctxt->node =3D nodes[i]; + rv =3D callback(ctxt, name, data); + ctxt->node =3D old; + VIR_FREE(name); + if (rv < 0) + goto cleanup; + } =20 ret =3D 0; =20 @@ -72,13 +92,14 @@ static int load(xmlXPathContextPtr ctxt, =20 static int cpuMapLoadInclude(const char *filename, - cpuMapLoadCallback cb, + cpuMapLoadCallback vendorCB, + cpuMapLoadCallback featureCB, + cpuMapLoadCallback modelCB, void *data) { xmlDocPtr xml =3D NULL; xmlXPathContextPtr ctxt =3D NULL; int ret =3D -1; - int element; char *mapfile; =20 if (!(mapfile =3D virFileFindResource(filename, @@ -93,13 +114,14 @@ cpuMapLoadInclude(const char *filename, =20 ctxt->node =3D xmlDocGetRootElement(xml); =20 - for (element =3D 0; element < CPU_MAP_ELEMENT_LAST; element++) { - if (load(ctxt, element, cb, data) < 0) { - virReportError(VIR_ERR_INTERNAL_ERROR, - _("cannot parse CPU map '%s'"), mapfile); - goto cleanup; - } - } + if (loadData(mapfile, ctxt, "vendor", vendorCB, data) < 0) + goto cleanup; + + if (loadData(mapfile, ctxt, "feature", featureCB, data) < 0) + goto cleanup; + + if (loadData(mapfile, ctxt, "model", modelCB, data) < 0) + goto cleanup; =20 ret =3D 0; =20 @@ -113,7 +135,9 @@ cpuMapLoadInclude(const char *filename, =20 =20 static int loadIncludes(xmlXPathContextPtr ctxt, - cpuMapLoadCallback callback, + cpuMapLoadCallback vendorCB, + cpuMapLoadCallback featureCB, + cpuMapLoadCallback modelCB, void *data) { int ret =3D -1; @@ -131,7 +155,7 @@ static int loadIncludes(xmlXPathContextPtr ctxt, for (i =3D 0; i < n; i++) { char *filename =3D virXMLPropString(nodes[i], "filename"); VIR_DEBUG("Finding CPU map include '%s'", filename); - if (cpuMapLoadInclude(filename, callback, data) < 0) { + if (cpuMapLoadInclude(filename, vendorCB, featureCB, modelCB, data= ) < 0) { VIR_FREE(filename); goto cleanup; } @@ -149,7 +173,9 @@ static int loadIncludes(xmlXPathContextPtr ctxt, =20 =20 int cpuMapLoad(const char *arch, - cpuMapLoadCallback cb, + cpuMapLoadCallback vendorCB, + cpuMapLoadCallback featureCB, + cpuMapLoadCallback modelCB, void *data) { xmlDocPtr xml =3D NULL; @@ -157,7 +183,6 @@ int cpuMapLoad(const char *arch, virBuffer buf =3D VIR_BUFFER_INITIALIZER; char *xpath =3D NULL; int ret =3D -1; - int element; char *mapfile; =20 if (!(mapfile =3D virFileFindResource("cpu_map.xml", @@ -173,9 +198,15 @@ int cpuMapLoad(const char *arch, goto cleanup; } =20 - if (cb =3D=3D NULL) { + if (vendorCB =3D=3D NULL) { + virReportError(VIR_ERR_INTERNAL_ERROR, + "%s", _("no vendor callback provided")); + goto cleanup; + } + + if (modelCB =3D=3D NULL) { virReportError(VIR_ERR_INTERNAL_ERROR, - "%s", _("no callback provided")); + "%s", _("no model callback provided")); goto cleanup; } =20 @@ -196,15 +227,16 @@ int cpuMapLoad(const char *arch, goto cleanup; } =20 - for (element =3D 0; element < CPU_MAP_ELEMENT_LAST; element++) { - if (load(ctxt, element, cb, data) < 0) { - virReportError(VIR_ERR_INTERNAL_ERROR, - _("cannot parse CPU map '%s'"), mapfile); - goto cleanup; - } - } + if (loadData(mapfile, ctxt, "vendor", vendorCB, data) < 0) + goto cleanup; + + if (loadData(mapfile, ctxt, "feature", featureCB, data) < 0) + goto cleanup; + + if (loadData(mapfile, ctxt, "model", modelCB, data) < 0) + goto cleanup; =20 - if (loadIncludes(ctxt, cb, data) < 0) + if (loadIncludes(ctxt, vendorCB, featureCB, modelCB, data) < 0) goto cleanup; =20 ret =3D 0; diff --git a/src/cpu/cpu_map.h b/src/cpu/cpu_map.h index 0c7507e98f..4596987150 100644 --- a/src/cpu/cpu_map.h +++ b/src/cpu/cpu_map.h @@ -26,28 +26,16 @@ =20 # include "virxml.h" =20 - -typedef enum { - CPU_MAP_ELEMENT_VENDOR, - CPU_MAP_ELEMENT_FEATURE, - CPU_MAP_ELEMENT_MODEL, - - CPU_MAP_ELEMENT_LAST -} cpuMapElement; - -VIR_ENUM_DECL(cpuMapElement) - - typedef int -(*cpuMapLoadCallback) (cpuMapElement element, - xmlXPathContextPtr ctxt, - xmlNodePtr *nodes, - int n, +(*cpuMapLoadCallback) (xmlXPathContextPtr ctxt, + const char *name, void *data); =20 int cpuMapLoad(const char *arch, - cpuMapLoadCallback cb, + cpuMapLoadCallback vendorCB, + cpuMapLoadCallback featureCB, + cpuMapLoadCallback modelCB, void *data); =20 #endif /* __VIR_CPU_MAP_H__ */ diff --git a/src/cpu/cpu_ppc64.c b/src/cpu/cpu_ppc64.c index d562677fa3..75da5b77d8 100644 --- a/src/cpu/cpu_ppc64.c +++ b/src/cpu/cpu_ppc64.c @@ -281,21 +281,19 @@ ppc64MapFree(struct ppc64_map *map) VIR_FREE(map); } =20 -static struct ppc64_vendor * -ppc64VendorParse(xmlXPathContextPtr ctxt, - struct ppc64_map *map) +static int +ppc64VendorParse(xmlXPathContextPtr ctxt ATTRIBUTE_UNUSED, + const char *name, + void *data) { + struct ppc64_map *map =3D data; struct ppc64_vendor *vendor; =20 if (VIR_ALLOC(vendor) < 0) - return NULL; + return -1; =20 - vendor->name =3D virXPathString("string(@name)", ctxt); - if (!vendor->name) { - virReportError(VIR_ERR_INTERNAL_ERROR, - "%s", _("Missing CPU vendor name")); + if (VIR_STRDUP(vendor->name, name) < 0) goto error; - } =20 if (ppc64VendorFind(map, vendor->name)) { virReportError(VIR_ERR_INTERNAL_ERROR, @@ -303,57 +301,36 @@ ppc64VendorParse(xmlXPathContextPtr ctxt, goto error; } =20 - return vendor; + if (VIR_APPEND_ELEMENT(map->vendors, map->nvendors, vendor) < 0) + goto error; + + return 0; =20 error: ppc64VendorFree(vendor); - return NULL; + return -1; } =20 =20 static int -ppc64VendorsLoad(struct ppc64_map *map, - xmlXPathContextPtr ctxt, - xmlNodePtr *nodes, - int n) -{ - struct ppc64_vendor *vendor; - size_t i; - - if (VIR_ALLOC_N(map->vendors, n) < 0) - return -1; - - for (i =3D 0; i < n; i++) { - ctxt->node =3D nodes[i]; - if (!(vendor =3D ppc64VendorParse(ctxt, map))) - return -1; - map->vendors[map->nvendors++] =3D vendor; - } - - return 0; -} - - -static struct ppc64_model * ppc64ModelParse(xmlXPathContextPtr ctxt, - struct ppc64_map *map) + const char *name, + void *data) { + struct ppc64_map *map =3D data; struct ppc64_model *model; xmlNodePtr *nodes =3D NULL; char *vendor =3D NULL; unsigned long pvr; size_t i; int n; + int ret =3D -1; =20 if (VIR_ALLOC(model) < 0) goto error; =20 - model->name =3D virXPathString("string(@name)", ctxt); - if (!model->name) { - virReportError(VIR_ERR_INTERNAL_ERROR, - "%s", _("Missing CPU model name")); + if (VIR_STRDUP(model->name, name) < 0) goto error; - } =20 if (ppc64ModelFind(map, model->name)) { virReportError(VIR_ERR_INTERNAL_ERROR, @@ -410,63 +387,22 @@ ppc64ModelParse(xmlXPathContextPtr ctxt, model->data.pvr[i].mask =3D pvr; } =20 + if (VIR_APPEND_ELEMENT(map->models, map->nmodels, model) < 0) + goto error; + + ret =3D 0; + cleanup: VIR_FREE(vendor); VIR_FREE(nodes); - return model; + return ret; =20 error: ppc64ModelFree(model); - model =3D NULL; goto cleanup; } =20 =20 -static int -ppc64ModelsLoad(struct ppc64_map *map, - xmlXPathContextPtr ctxt, - xmlNodePtr *nodes, - int n) -{ - struct ppc64_model *model; - size_t i; - - if (VIR_ALLOC_N(map->models, n) < 0) - return -1; - - for (i =3D 0; i < n; i++) { - ctxt->node =3D nodes[i]; - if (!(model =3D ppc64ModelParse(ctxt, map))) - return -1; - map->models[map->nmodels++] =3D model; - } - - return 0; -} - - -static int -ppc64MapLoadCallback(cpuMapElement element, - xmlXPathContextPtr ctxt, - xmlNodePtr *nodes, - int n, - void *data) -{ - struct ppc64_map *map =3D data; - - switch (element) { - case CPU_MAP_ELEMENT_VENDOR: - return ppc64VendorsLoad(map, ctxt, nodes, n); - case CPU_MAP_ELEMENT_MODEL: - return ppc64ModelsLoad(map, ctxt, nodes, n); - case CPU_MAP_ELEMENT_FEATURE: - case CPU_MAP_ELEMENT_LAST: - break; - } - - return 0; -} - static struct ppc64_map * ppc64LoadMap(void) { @@ -475,7 +411,7 @@ ppc64LoadMap(void) if (VIR_ALLOC(map) < 0) goto error; =20 - if (cpuMapLoad("ppc64", ppc64MapLoadCallback, map) < 0) + if (cpuMapLoad("ppc64", ppc64VendorParse, NULL, ppc64ModelParse, map) = < 0) goto error; =20 return map; diff --git a/src/cpu/cpu_x86.c b/src/cpu/cpu_x86.c index 809da94117..76f1d417c1 100644 --- a/src/cpu/cpu_x86.c +++ b/src/cpu/cpu_x86.c @@ -712,22 +712,21 @@ x86VendorFind(virCPUx86MapPtr map, } =20 =20 -static virCPUx86VendorPtr +static int x86VendorParse(xmlXPathContextPtr ctxt, - virCPUx86MapPtr map) + const char *name, + void *data) { + virCPUx86MapPtr map =3D data; virCPUx86VendorPtr vendor =3D NULL; char *string =3D NULL; + int ret =3D -1; =20 if (VIR_ALLOC(vendor) < 0) goto error; =20 - vendor->name =3D virXPathString("string(@name)", ctxt); - if (!vendor->name) { - virReportError(VIR_ERR_INTERNAL_ERROR, "%s", - _("Missing CPU vendor name")); + if (VIR_STRDUP(vendor->name, name) < 0) goto error; - } =20 if (x86VendorFind(map, vendor->name)) { virReportError(VIR_ERR_INTERNAL_ERROR, @@ -746,40 +745,21 @@ x86VendorParse(xmlXPathContextPtr ctxt, if (virCPUx86VendorToCPUID(string, &vendor->cpuid) < 0) goto error; =20 + if (VIR_APPEND_ELEMENT(map->vendors, map->nvendors, vendor) < 0) + goto error; + + ret =3D 0; + cleanup: VIR_FREE(string); - return vendor; + return ret; =20 error: x86VendorFree(vendor); - vendor =3D NULL; goto cleanup; } =20 =20 -static int -x86VendorsLoad(virCPUx86MapPtr map, - xmlXPathContextPtr ctxt, - xmlNodePtr *nodes, - int n) -{ - virCPUx86VendorPtr vendor; - size_t i; - - if (VIR_ALLOC_N(map->vendors, n) < 0) - return -1; - - for (i =3D 0; i < n; i++) { - ctxt->node =3D nodes[i]; - if (!(vendor =3D x86VendorParse(ctxt, map))) - return -1; - map->vendors[map->nvendors++] =3D vendor; - } - - return 0; -} - - static virCPUx86FeaturePtr x86FeatureNew(void) { @@ -901,27 +881,27 @@ x86ParseCPUID(xmlXPathContextPtr ctxt, } =20 =20 -static virCPUx86FeaturePtr +static int x86FeatureParse(xmlXPathContextPtr ctxt, - virCPUx86MapPtr map) + const char *name, + void *data) { + virCPUx86MapPtr map =3D data; xmlNodePtr *nodes =3D NULL; virCPUx86FeaturePtr feature; virCPUx86CPUID cpuid; size_t i; int n; char *str =3D NULL; + int ret =3D -1; =20 if (!(feature =3D x86FeatureNew())) goto error; =20 feature->migratable =3D true; - feature->name =3D virXPathString("string(@name)", ctxt); - if (!feature->name) { - virReportError(VIR_ERR_INTERNAL_ERROR, - "%s", _("Missing CPU feature name")); + + if (VIR_STRDUP(feature->name, name) < 0) goto error; - } =20 if (x86FeatureFind(map, feature->name)) { virReportError(VIR_ERR_INTERNAL_ERROR, @@ -949,46 +929,28 @@ x86FeatureParse(xmlXPathContextPtr ctxt, goto error; } =20 + if (!feature->migratable && + VIR_APPEND_ELEMENT_COPY(map->migrate_blockers, + map->nblockers, + feature) < 0) + goto error; + + if (VIR_APPEND_ELEMENT(map->features, map->nfeatures, feature) < 0) + goto error; + + ret =3D 0; + cleanup: VIR_FREE(nodes); VIR_FREE(str); - return feature; + return ret; =20 error: x86FeatureFree(feature); - feature =3D NULL; goto cleanup; } =20 =20 -static int -x86FeaturesLoad(virCPUx86MapPtr map, - xmlXPathContextPtr ctxt, - xmlNodePtr *nodes, - int n) -{ - virCPUx86FeaturePtr feature; - size_t i; - - if (VIR_ALLOC_N(map->features, n) < 0) - return -1; - - for (i =3D 0; i < n; i++) { - ctxt->node =3D nodes[i]; - if (!(feature =3D x86FeatureParse(ctxt, map))) - return -1; - map->features[map->nfeatures++] =3D feature; - if (!feature->migratable && - VIR_APPEND_ELEMENT(map->migrate_blockers, - map->nblockers, - feature) < 0) - return -1; - } - - return 0; -} - - static virCPUx86ModelPtr x86ModelNew(void) { @@ -1184,47 +1146,46 @@ x86ModelCompare(virCPUx86ModelPtr model1, } =20 =20 -static virCPUx86ModelPtr +static int x86ModelParse(xmlXPathContextPtr ctxt, - virCPUx86MapPtr map) + const char *name, + void *data) { + virCPUx86MapPtr map =3D data; xmlNodePtr *nodes =3D NULL; virCPUx86ModelPtr model; char *vendor =3D NULL; size_t i; int n; + int ret =3D -1; =20 if (!(model =3D x86ModelNew())) goto error; =20 - model->name =3D virXPathString("string(@name)", ctxt); - if (!model->name) { - virReportError(VIR_ERR_INTERNAL_ERROR, - "%s", _("Missing CPU model name")); + if (VIR_STRDUP(model->name, name) < 0) goto error; - } =20 if (virXPathNode("./model", ctxt)) { virCPUx86ModelPtr ancestor; - char *name; + char *anname; =20 - name =3D virXPathString("string(./model/@name)", ctxt); - if (!name) { + anname =3D virXPathString("string(./model/@name)", ctxt); + if (!anname) { virReportError(VIR_ERR_INTERNAL_ERROR, _("Missing ancestor's name in CPU model %s"), model->name); goto error; } =20 - if (!(ancestor =3D x86ModelFind(map, name))) { + if (!(ancestor =3D x86ModelFind(map, anname))) { virReportError(VIR_ERR_INTERNAL_ERROR, _("Ancestor model %s not found for CPU model %s= "), - name, model->name); - VIR_FREE(name); + anname, model->name); + VIR_FREE(anname); goto error; } =20 - VIR_FREE(name); + VIR_FREE(anname); =20 model->vendor =3D ancestor->vendor; model->signature =3D ancestor->signature; @@ -1279,62 +1240,43 @@ x86ModelParse(xmlXPathContextPtr ctxt, =20 for (i =3D 0; i < n; i++) { virCPUx86FeaturePtr feature; - char *name; + char *ftname; =20 - if (!(name =3D virXMLPropString(nodes[i], "name"))) { + if (!(ftname =3D virXMLPropString(nodes[i], "name"))) { virReportError(VIR_ERR_INTERNAL_ERROR, _("Missing feature name for CPU model %s"), mod= el->name); goto error; } =20 - if (!(feature =3D x86FeatureFind(map, name))) { + if (!(feature =3D x86FeatureFind(map, ftname))) { virReportError(VIR_ERR_INTERNAL_ERROR, _("Feature %s required by CPU model %s not foun= d"), - name, model->name); - VIR_FREE(name); + ftname, model->name); + VIR_FREE(ftname); goto error; } - VIR_FREE(name); + VIR_FREE(ftname); =20 if (x86DataAdd(&model->data, &feature->data)) goto error; } =20 + if (VIR_APPEND_ELEMENT(map->models, map->nmodels, model) < 0) + goto error; + + ret =3D 0; + cleanup: VIR_FREE(vendor); VIR_FREE(nodes); - return model; + return ret; =20 error: x86ModelFree(model); - model =3D NULL; goto cleanup; } =20 =20 -static int -x86ModelsLoad(virCPUx86MapPtr map, - xmlXPathContextPtr ctxt, - xmlNodePtr *nodes, - int n) -{ - virCPUx86ModelPtr model; - size_t i; - - if (VIR_ALLOC_N(map->models, n) < 0) - return -1; - - for (i =3D 0; i < n; i++) { - ctxt->node =3D nodes[i]; - if (!(model =3D x86ModelParse(ctxt, map))) - return -1; - map->models[map->nmodels++] =3D model; - } - - return 0; -} - - static void x86MapFree(virCPUx86MapPtr map) { @@ -1364,30 +1306,6 @@ x86MapFree(virCPUx86MapPtr map) } =20 =20 -static int -x86MapLoadCallback(cpuMapElement element, - xmlXPathContextPtr ctxt, - xmlNodePtr *nodes, - int n, - void *data) -{ - virCPUx86MapPtr map =3D data; - - switch (element) { - case CPU_MAP_ELEMENT_VENDOR: - return x86VendorsLoad(map, ctxt, nodes, n); - case CPU_MAP_ELEMENT_FEATURE: - return x86FeaturesLoad(map, ctxt, nodes, n); - case CPU_MAP_ELEMENT_MODEL: - return x86ModelsLoad(map, ctxt, nodes, n); - case CPU_MAP_ELEMENT_LAST: - break; - } - - return 0; -} - - static virCPUx86MapPtr virCPUx86LoadMap(void) { @@ -1396,7 +1314,7 @@ virCPUx86LoadMap(void) if (VIR_ALLOC(map) < 0) return NULL; =20 - if (cpuMapLoad("x86", x86MapLoadCallback, map) < 0) + if (cpuMapLoad("x86", x86VendorParse, x86FeatureParse, x86ModelParse, = map) < 0) goto error; =20 return map; --=20 2.17.1 -- libvir-list mailing list libvir-list@redhat.com https://www.redhat.com/mailman/listinfo/libvir-list From nobody Sat May 18 05:34:57 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of redhat.com designates 209.132.183.28 as permitted sender) client-ip=209.132.183.28; envelope-from=libvir-list-bounces@redhat.com; helo=mx1.redhat.com; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of redhat.com designates 209.132.183.28 as permitted sender) smtp.mailfrom=libvir-list-bounces@redhat.com; dmarc=pass(p=none dis=none) header.from=redhat.com Return-Path: Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) by mx.zohomail.com with SMTPS id 1533142977836424.48272734915486; Wed, 1 Aug 2018 10:02:57 -0700 (PDT) Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id B4B2D804ED; Wed, 1 Aug 2018 17:02:55 +0000 (UTC) Received: from colo-mx.corp.redhat.com (colo-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.20]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 77D87B2DFE; Wed, 1 Aug 2018 17:02:55 +0000 (UTC) Received: from lists01.pubmisc.prod.ext.phx2.redhat.com (lists01.pubmisc.prod.ext.phx2.redhat.com [10.5.19.33]) by colo-mx.corp.redhat.com (Postfix) with ESMTP id 28D4018037F3; Wed, 1 Aug 2018 17:02:55 +0000 (UTC) Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.rdu2.redhat.com [10.11.54.5]) by lists01.pubmisc.prod.ext.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id w71H2cVo025954 for ; Wed, 1 Aug 2018 13:02:38 -0400 Received: by smtp.corp.redhat.com (Postfix) id A035B1C666; Wed, 1 Aug 2018 17:02:38 +0000 (UTC) Received: from localhost.localdomain.com (unknown [10.33.36.41]) by smtp.corp.redhat.com (Postfix) with ESMTP id 05C521C664; Wed, 1 Aug 2018 17:02:37 +0000 (UTC) From: =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= To: libvir-list@redhat.com Date: Wed, 1 Aug 2018 18:02:31 +0100 Message-Id: <20180801170232.17672-4-berrange@redhat.com> In-Reply-To: <20180801170232.17672-1-berrange@redhat.com> References: <20180801170232.17672-1-berrange@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.11.54.5 X-loop: libvir-list@redhat.com Subject: [libvirt] [PATCH 3/4] cpu: split PPC64 map data into separate files X-BeenThere: libvir-list@redhat.com X-Mailman-Version: 2.1.12 Precedence: junk List-Id: Development discussions about the libvirt library & tools List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Sender: libvir-list-bounces@redhat.com Errors-To: libvir-list-bounces@redhat.com X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Wed, 01 Aug 2018 17:02:56 +0000 (UTC) X-ZohoMail: RSF_0 Z_629925259 SPT_0 Signed-off-by: Daniel P. Berrang=C3=A9 Reviewed-by: John Ferlan --- src/cpu/cpu_map.xml | 41 +++++-------------------- src/cpu/cpu_map_ppc64_POWER6.xml | 6 ++++ src/cpu/cpu_map_ppc64_POWER7.xml | 7 +++++ src/cpu/cpu_map_ppc64_POWER8.xml | 8 +++++ src/cpu/cpu_map_ppc64_POWER9.xml | 6 ++++ src/cpu/cpu_map_ppc64_POWERPC_e5500.xml | 6 ++++ src/cpu/cpu_map_ppc64_POWERPC_e6500.xml | 6 ++++ src/cpu/cpu_map_ppc64_vendors.xml | 4 +++ 8 files changed, 50 insertions(+), 34 deletions(-) create mode 100644 src/cpu/cpu_map_ppc64_POWER6.xml create mode 100644 src/cpu/cpu_map_ppc64_POWER7.xml create mode 100644 src/cpu/cpu_map_ppc64_POWER8.xml create mode 100644 src/cpu/cpu_map_ppc64_POWER9.xml create mode 100644 src/cpu/cpu_map_ppc64_POWERPC_e5500.xml create mode 100644 src/cpu/cpu_map_ppc64_POWERPC_e6500.xml create mode 100644 src/cpu/cpu_map_ppc64_vendors.xml diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index 9af190a579..e236c41733 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -2340,43 +2340,16 @@ =20 - - - + =20 - - - - - - - - - - - - - - - - - - - - - - + + + + =20 - - - - - - - - - + + diff --git a/src/cpu/cpu_map_ppc64_POWER6.xml b/src/cpu/cpu_map_ppc64_POWER= 6.xml new file mode 100644 index 0000000000..00e27495f4 --- /dev/null +++ b/src/cpu/cpu_map_ppc64_POWER6.xml @@ -0,0 +1,6 @@ + + + + + + diff --git a/src/cpu/cpu_map_ppc64_POWER7.xml b/src/cpu/cpu_map_ppc64_POWER= 7.xml new file mode 100644 index 0000000000..a071481805 --- /dev/null +++ b/src/cpu/cpu_map_ppc64_POWER7.xml @@ -0,0 +1,7 @@ + + + + + + + diff --git a/src/cpu/cpu_map_ppc64_POWER8.xml b/src/cpu/cpu_map_ppc64_POWER= 8.xml new file mode 100644 index 0000000000..64d96fc4c4 --- /dev/null +++ b/src/cpu/cpu_map_ppc64_POWER8.xml @@ -0,0 +1,8 @@ + + + + + + + + diff --git a/src/cpu/cpu_map_ppc64_POWER9.xml b/src/cpu/cpu_map_ppc64_POWER= 9.xml new file mode 100644 index 0000000000..149fcde924 --- /dev/null +++ b/src/cpu/cpu_map_ppc64_POWER9.xml @@ -0,0 +1,6 @@ + + + + + + diff --git a/src/cpu/cpu_map_ppc64_POWERPC_e5500.xml b/src/cpu/cpu_map_ppc6= 4_POWERPC_e5500.xml new file mode 100644 index 0000000000..3d64c8926c --- /dev/null +++ b/src/cpu/cpu_map_ppc64_POWERPC_e5500.xml @@ -0,0 +1,6 @@ + + + + + + diff --git a/src/cpu/cpu_map_ppc64_POWERPC_e6500.xml b/src/cpu/cpu_map_ppc6= 4_POWERPC_e6500.xml new file mode 100644 index 0000000000..b0d1006076 --- /dev/null +++ b/src/cpu/cpu_map_ppc64_POWERPC_e6500.xml @@ -0,0 +1,6 @@ + + + + + + diff --git a/src/cpu/cpu_map_ppc64_vendors.xml b/src/cpu/cpu_map_ppc64_vend= ors.xml new file mode 100644 index 0000000000..52ad45c0bd --- /dev/null +++ b/src/cpu/cpu_map_ppc64_vendors.xml @@ -0,0 +1,4 @@ + + + + --=20 2.17.1 -- libvir-list mailing list libvir-list@redhat.com https://www.redhat.com/mailman/listinfo/libvir-list From nobody Sat May 18 05:34:57 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of redhat.com designates 209.132.183.28 as permitted sender) client-ip=209.132.183.28; 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Sun, 5 Aug 2018 08:45:56 +0000 (UTC) Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.rdu2.redhat.com [10.11.54.5]) by lists01.pubmisc.prod.ext.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id w71H2d4C025970 for ; Wed, 1 Aug 2018 13:02:39 -0400 Received: by smtp.corp.redhat.com (Postfix) id C63591C668; Wed, 1 Aug 2018 17:02:39 +0000 (UTC) Received: from localhost.localdomain.com (unknown [10.33.36.41]) by smtp.corp.redhat.com (Postfix) with ESMTP id DF5851C664; Wed, 1 Aug 2018 17:02:38 +0000 (UTC) From: =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= To: libvir-list@redhat.com Date: Wed, 1 Aug 2018 18:02:32 +0100 Message-Id: <20180801170232.17672-5-berrange@redhat.com> In-Reply-To: <20180801170232.17672-1-berrange@redhat.com> References: <20180801170232.17672-1-berrange@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.11.54.5 X-loop: libvir-list@redhat.com Subject: [libvirt] [PATCH 4/4] cpu: split x86 map data into separate files X-BeenThere: libvir-list@redhat.com X-Mailman-Version: 2.1.12 Precedence: junk List-Id: Development discussions about the libvirt library & tools List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Sender: libvir-list-bounces@redhat.com Errors-To: libvir-list-bounces@redhat.com X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.48]); Sun, 05 Aug 2018 08:46:01 +0000 (UTC) X-ZohoMail: RDMRC_0 RSF_0 Z_629925259 SPT_0 Signed-off-by: Daniel P. Berrang=C3=A9 Reviewed-by: John Ferlan --- src/cpu/cpu_map.xml | 2374 +----------------- src/cpu/cpu_map_x86_486.xml | 7 + src/cpu/cpu_map_x86_Broadwell-IBRS.xml | 61 + src/cpu/cpu_map_x86_Broadwell-noTSX-IBRS.xml | 59 + src/cpu/cpu_map_x86_Broadwell-noTSX.xml | 58 + src/cpu/cpu_map_x86_Broadwell.xml | 60 + src/cpu/cpu_map_x86_Conroe.xml | 33 + src/cpu/cpu_map_x86_EPYC-IBRS.xml | 73 + src/cpu/cpu_map_x86_EPYC.xml | 72 + src/cpu/cpu_map_x86_Haswell-IBRS.xml | 57 + src/cpu/cpu_map_x86_Haswell-noTSX-IBRS.xml | 55 + src/cpu/cpu_map_x86_Haswell-noTSX.xml | 54 + src/cpu/cpu_map_x86_Haswell.xml | 56 + src/cpu/cpu_map_x86_IvyBridge-IBRS.xml | 51 + src/cpu/cpu_map_x86_IvyBridge.xml | 50 + src/cpu/cpu_map_x86_Nehalem-IBRS.xml | 38 + src/cpu/cpu_map_x86_Nehalem.xml | 37 + src/cpu/cpu_map_x86_Opteron_G1.xml | 31 + src/cpu/cpu_map_x86_Opteron_G2.xml | 35 + src/cpu/cpu_map_x86_Opteron_G3.xml | 40 + src/cpu/cpu_map_x86_Opteron_G4.xml | 50 + src/cpu/cpu_map_x86_Opteron_G5.xml | 53 + src/cpu/cpu_map_x86_Penryn.xml | 35 + src/cpu/cpu_map_x86_SandyBridge-IBRS.xml | 45 + src/cpu/cpu_map_x86_SandyBridge.xml | 44 + src/cpu/cpu_map_x86_Skylake-Client-IBRS.xml | 70 + src/cpu/cpu_map_x86_Skylake-Client.xml | 69 + src/cpu/cpu_map_x86_Skylake-Server-IBRS.xml | 77 + src/cpu/cpu_map_x86_Skylake-Server.xml | 76 + src/cpu/cpu_map_x86_Westmere-IBRS.xml | 39 + src/cpu/cpu_map_x86_Westmere.xml | 38 + src/cpu/cpu_map_x86_athlon.xml | 28 + src/cpu/cpu_map_x86_core2duo.xml | 33 + src/cpu/cpu_map_x86_coreduo.xml | 29 + src/cpu/cpu_map_x86_cpu64-rhel5.xml | 29 + src/cpu/cpu_map_x86_cpu64-rhel6.xml | 31 + src/cpu/cpu_map_x86_features.xml | 440 ++++ src/cpu/cpu_map_x86_kvm32.xml | 26 + src/cpu/cpu_map_x86_kvm64.xml | 30 + src/cpu/cpu_map_x86_n270.xml | 30 + src/cpu/cpu_map_x86_pentium.xml | 13 + src/cpu/cpu_map_x86_pentium2.xml | 22 + src/cpu/cpu_map_x86_pentium3.xml | 23 + src/cpu/cpu_map_x86_pentiumpro.xml | 21 + src/cpu/cpu_map_x86_phenom.xml | 36 + src/cpu/cpu_map_x86_qemu32.xml | 22 + src/cpu/cpu_map_x86_qemu64.xml | 40 + src/cpu/cpu_map_x86_vendors.xml | 4 + 48 files changed, 2427 insertions(+), 2327 deletions(-) create mode 100644 src/cpu/cpu_map_x86_486.xml create mode 100644 src/cpu/cpu_map_x86_Broadwell-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_Broadwell-noTSX-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_Broadwell-noTSX.xml create mode 100644 src/cpu/cpu_map_x86_Broadwell.xml create mode 100644 src/cpu/cpu_map_x86_Conroe.xml create mode 100644 src/cpu/cpu_map_x86_EPYC-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_EPYC.xml create mode 100644 src/cpu/cpu_map_x86_Haswell-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_Haswell-noTSX-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_Haswell-noTSX.xml create mode 100644 src/cpu/cpu_map_x86_Haswell.xml create mode 100644 src/cpu/cpu_map_x86_IvyBridge-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_IvyBridge.xml create mode 100644 src/cpu/cpu_map_x86_Nehalem-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_Nehalem.xml create mode 100644 src/cpu/cpu_map_x86_Opteron_G1.xml create mode 100644 src/cpu/cpu_map_x86_Opteron_G2.xml create mode 100644 src/cpu/cpu_map_x86_Opteron_G3.xml create mode 100644 src/cpu/cpu_map_x86_Opteron_G4.xml create mode 100644 src/cpu/cpu_map_x86_Opteron_G5.xml create mode 100644 src/cpu/cpu_map_x86_Penryn.xml create mode 100644 src/cpu/cpu_map_x86_SandyBridge-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_SandyBridge.xml create mode 100644 src/cpu/cpu_map_x86_Skylake-Client-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_Skylake-Client.xml create mode 100644 src/cpu/cpu_map_x86_Skylake-Server-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_Skylake-Server.xml create mode 100644 src/cpu/cpu_map_x86_Westmere-IBRS.xml create mode 100644 src/cpu/cpu_map_x86_Westmere.xml create mode 100644 src/cpu/cpu_map_x86_athlon.xml create mode 100644 src/cpu/cpu_map_x86_core2duo.xml create mode 100644 src/cpu/cpu_map_x86_coreduo.xml create mode 100644 src/cpu/cpu_map_x86_cpu64-rhel5.xml create mode 100644 src/cpu/cpu_map_x86_cpu64-rhel6.xml create mode 100644 src/cpu/cpu_map_x86_features.xml create mode 100644 src/cpu/cpu_map_x86_kvm32.xml create mode 100644 src/cpu/cpu_map_x86_kvm64.xml create mode 100644 src/cpu/cpu_map_x86_n270.xml create mode 100644 src/cpu/cpu_map_x86_pentium.xml create mode 100644 src/cpu/cpu_map_x86_pentium2.xml create mode 100644 src/cpu/cpu_map_x86_pentium3.xml create mode 100644 src/cpu/cpu_map_x86_pentiumpro.xml create mode 100644 src/cpu/cpu_map_x86_phenom.xml create mode 100644 src/cpu/cpu_map_x86_qemu32.xml create mode 100644 src/cpu/cpu_map_x86_qemu64.xml create mode 100644 src/cpu/cpu_map_x86_vendors.xml diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml index e236c41733..80674a678b 100644 --- a/src/cpu/cpu_map.xml +++ b/src/cpu/cpu_map.xml @@ -1,2342 +1,62 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 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- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + =20 diff --git a/src/cpu/cpu_map_x86_486.xml b/src/cpu/cpu_map_x86_486.xml new file mode 100644 index 0000000000..61fa3797e8 --- /dev/null +++ b/src/cpu/cpu_map_x86_486.xml @@ -0,0 +1,7 @@ + + + + + + + diff --git a/src/cpu/cpu_map_x86_Broadwell-IBRS.xml b/src/cpu/cpu_map_x86_B= roadwell-IBRS.xml new file mode 100644 index 0000000000..fc7a3371a5 --- /dev/null +++ b/src/cpu/cpu_map_x86_Broadwell-IBRS.xml @@ -0,0 +1,61 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_Broadwell-noTSX-IBRS.xml b/src/cpu/cpu_map= _x86_Broadwell-noTSX-IBRS.xml new file mode 100644 index 0000000000..19949cb6ca --- /dev/null +++ b/src/cpu/cpu_map_x86_Broadwell-noTSX-IBRS.xml @@ -0,0 +1,59 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_Broadwell-noTSX.xml b/src/cpu/cpu_map_x86_= Broadwell-noTSX.xml new file mode 100644 index 0000000000..6219bd4102 --- /dev/null +++ b/src/cpu/cpu_map_x86_Broadwell-noTSX.xml @@ -0,0 +1,58 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_Broadwell.xml b/src/cpu/cpu_map_x86_Broadw= ell.xml new file mode 100644 index 0000000000..1511394f0b --- /dev/null +++ b/src/cpu/cpu_map_x86_Broadwell.xml @@ -0,0 +1,60 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_Conroe.xml b/src/cpu/cpu_map_x86_Conroe.xml new file mode 100644 index 0000000000..ebcab7be31 --- /dev/null +++ b/src/cpu/cpu_map_x86_Conroe.xml @@ -0,0 +1,33 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_EPYC-IBRS.xml b/src/cpu/cpu_map_x86_EPYC-I= BRS.xml new file mode 100644 index 0000000000..219ead70df --- /dev/null +++ b/src/cpu/cpu_map_x86_EPYC-IBRS.xml @@ -0,0 +1,73 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_EPYC.xml b/src/cpu/cpu_map_x86_EPYC.xml new file mode 100644 index 0000000000..6458dc820c --- /dev/null +++ b/src/cpu/cpu_map_x86_EPYC.xml @@ -0,0 +1,72 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_Haswell-IBRS.xml b/src/cpu/cpu_map_x86_Has= well-IBRS.xml new file mode 100644 index 0000000000..01bab7b803 --- /dev/null +++ b/src/cpu/cpu_map_x86_Haswell-IBRS.xml @@ -0,0 +1,57 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_Haswell-noTSX-IBRS.xml b/src/cpu/cpu_map_x= 86_Haswell-noTSX-IBRS.xml new file mode 100644 index 0000000000..7b53b7be29 --- /dev/null +++ b/src/cpu/cpu_map_x86_Haswell-noTSX-IBRS.xml @@ -0,0 +1,55 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_Haswell-noTSX.xml b/src/cpu/cpu_map_x86_Ha= swell-noTSX.xml new file mode 100644 index 0000000000..10b460818a --- /dev/null +++ b/src/cpu/cpu_map_x86_Haswell-noTSX.xml @@ -0,0 +1,54 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_Haswell.xml b/src/cpu/cpu_map_x86_Haswell.= xml new file mode 100644 index 0000000000..84275b1bdf --- /dev/null +++ b/src/cpu/cpu_map_x86_Haswell.xml @@ -0,0 +1,56 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_IvyBridge-IBRS.xml b/src/cpu/cpu_map_x86_I= vyBridge-IBRS.xml new file mode 100644 index 0000000000..27eb120a8a --- /dev/null +++ b/src/cpu/cpu_map_x86_IvyBridge-IBRS.xml @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_IvyBridge.xml b/src/cpu/cpu_map_x86_IvyBri= dge.xml new file mode 100644 index 0000000000..54f5f55a51 --- /dev/null +++ b/src/cpu/cpu_map_x86_IvyBridge.xml @@ -0,0 +1,50 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_Nehalem-IBRS.xml b/src/cpu/cpu_map_x86_Neh= alem-IBRS.xml new file mode 100644 index 0000000000..f2230ffa89 --- /dev/null +++ b/src/cpu/cpu_map_x86_Nehalem-IBRS.xml @@ -0,0 +1,38 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_Nehalem.xml b/src/cpu/cpu_map_x86_Nehalem.= xml new file mode 100644 index 0000000000..8e0fd5dc49 --- /dev/null +++ b/src/cpu/cpu_map_x86_Nehalem.xml @@ -0,0 +1,37 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_Opteron_G1.xml b/src/cpu/cpu_map_x86_Opter= on_G1.xml new file mode 100644 index 0000000000..8d043fe889 --- /dev/null +++ b/src/cpu/cpu_map_x86_Opteron_G1.xml @@ -0,0 +1,31 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_Opteron_G2.xml b/src/cpu/cpu_map_x86_Opter= on_G2.xml new file mode 100644 index 0000000000..774e86462f --- /dev/null +++ b/src/cpu/cpu_map_x86_Opteron_G2.xml @@ -0,0 +1,35 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_Opteron_G3.xml b/src/cpu/cpu_map_x86_Opter= on_G3.xml new file mode 100644 index 0000000000..5d27e635dc --- /dev/null +++ b/src/cpu/cpu_map_x86_Opteron_G3.xml @@ -0,0 +1,40 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_Opteron_G4.xml b/src/cpu/cpu_map_x86_Opter= on_G4.xml new file mode 100644 index 0000000000..d77cc286ff --- /dev/null +++ b/src/cpu/cpu_map_x86_Opteron_G4.xml @@ -0,0 +1,50 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_Opteron_G5.xml b/src/cpu/cpu_map_x86_Opter= on_G5.xml new file mode 100644 index 0000000000..9a5ecbd4da --- /dev/null +++ b/src/cpu/cpu_map_x86_Opteron_G5.xml @@ -0,0 +1,53 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_Penryn.xml b/src/cpu/cpu_map_x86_Penryn.xml new file mode 100644 index 0000000000..9b0c0cfd0e --- /dev/null +++ b/src/cpu/cpu_map_x86_Penryn.xml @@ -0,0 +1,35 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_SandyBridge-IBRS.xml b/src/cpu/cpu_map_x86= _SandyBridge-IBRS.xml new file mode 100644 index 0000000000..1f56b4bc81 --- /dev/null +++ b/src/cpu/cpu_map_x86_SandyBridge-IBRS.xml @@ -0,0 +1,45 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_SandyBridge.xml b/src/cpu/cpu_map_x86_Sand= yBridge.xml new file mode 100644 index 0000000000..eea85fc3f3 --- /dev/null +++ b/src/cpu/cpu_map_x86_SandyBridge.xml @@ -0,0 +1,44 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_Skylake-Client-IBRS.xml b/src/cpu/cpu_map_= x86_Skylake-Client-IBRS.xml new file mode 100644 index 0000000000..1603bb8c13 --- /dev/null +++ b/src/cpu/cpu_map_x86_Skylake-Client-IBRS.xml @@ -0,0 +1,70 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_Skylake-Client.xml b/src/cpu/cpu_map_x86_S= kylake-Client.xml new file mode 100644 index 0000000000..c0286b9fa5 --- /dev/null +++ b/src/cpu/cpu_map_x86_Skylake-Client.xml @@ -0,0 +1,69 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_Skylake-Server-IBRS.xml b/src/cpu/cpu_map_= x86_Skylake-Server-IBRS.xml new file mode 100644 index 0000000000..45350792a0 --- /dev/null +++ b/src/cpu/cpu_map_x86_Skylake-Server-IBRS.xml @@ -0,0 +1,77 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_Skylake-Server.xml b/src/cpu/cpu_map_x86_S= kylake-Server.xml new file mode 100644 index 0000000000..0119428357 --- /dev/null +++ b/src/cpu/cpu_map_x86_Skylake-Server.xml @@ -0,0 +1,76 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_Westmere-IBRS.xml b/src/cpu/cpu_map_x86_We= stmere-IBRS.xml new file mode 100644 index 0000000000..dea7a73dcd --- /dev/null +++ b/src/cpu/cpu_map_x86_Westmere-IBRS.xml @@ -0,0 +1,39 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_Westmere.xml b/src/cpu/cpu_map_x86_Westmer= e.xml new file mode 100644 index 0000000000..f5c31449e0 --- /dev/null +++ b/src/cpu/cpu_map_x86_Westmere.xml @@ -0,0 +1,38 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_athlon.xml b/src/cpu/cpu_map_x86_athlon.xml new file mode 100644 index 0000000000..0d44508e20 --- /dev/null +++ b/src/cpu/cpu_map_x86_athlon.xml @@ -0,0 +1,28 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_core2duo.xml b/src/cpu/cpu_map_x86_core2du= o.xml new file mode 100644 index 0000000000..3c9a148f3c --- /dev/null +++ b/src/cpu/cpu_map_x86_core2duo.xml @@ -0,0 +1,33 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_coreduo.xml b/src/cpu/cpu_map_x86_coreduo.= xml new file mode 100644 index 0000000000..676e846920 --- /dev/null +++ b/src/cpu/cpu_map_x86_coreduo.xml @@ -0,0 +1,29 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_cpu64-rhel5.xml b/src/cpu/cpu_map_x86_cpu6= 4-rhel5.xml new file mode 100644 index 0000000000..670a92f274 --- /dev/null +++ b/src/cpu/cpu_map_x86_cpu64-rhel5.xml @@ -0,0 +1,29 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_cpu64-rhel6.xml b/src/cpu/cpu_map_x86_cpu6= 4-rhel6.xml new file mode 100644 index 0000000000..3cae0f00c2 --- /dev/null +++ b/src/cpu/cpu_map_x86_cpu64-rhel6.xml @@ -0,0 +1,31 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_features.xml b/src/cpu/cpu_map_x86_feature= s.xml new file mode 100644 index 0000000000..109c653dbc --- /dev/null +++ b/src/cpu/cpu_map_x86_features.xml @@ -0,0 +1,440 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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+ + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_n270.xml b/src/cpu/cpu_map_x86_n270.xml new file mode 100644 index 0000000000..cb359d968e --- /dev/null +++ b/src/cpu/cpu_map_x86_n270.xml @@ -0,0 +1,30 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_pentium.xml b/src/cpu/cpu_map_x86_pentium.= xml new file mode 100644 index 0000000000..d44c1399b0 --- /dev/null +++ b/src/cpu/cpu_map_x86_pentium.xml @@ -0,0 +1,13 @@ + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_pentium2.xml b/src/cpu/cpu_map_x86_pentium= 2.xml new file mode 100644 index 0000000000..0d772bad2f --- /dev/null +++ b/src/cpu/cpu_map_x86_pentium2.xml @@ -0,0 +1,22 @@ + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_pentium3.xml b/src/cpu/cpu_map_x86_pentium= 3.xml new file mode 100644 index 0000000000..24eb227c28 --- /dev/null +++ b/src/cpu/cpu_map_x86_pentium3.xml @@ -0,0 +1,23 @@ + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_pentiumpro.xml b/src/cpu/cpu_map_x86_penti= umpro.xml new file mode 100644 index 0000000000..9f7a610a87 --- /dev/null +++ b/src/cpu/cpu_map_x86_pentiumpro.xml @@ -0,0 +1,21 @@ + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_phenom.xml b/src/cpu/cpu_map_x86_phenom.xml new file mode 100644 index 0000000000..71f004057b --- /dev/null +++ b/src/cpu/cpu_map_x86_phenom.xml @@ -0,0 +1,36 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_qemu32.xml b/src/cpu/cpu_map_x86_qemu32.xml new file mode 100644 index 0000000000..3c9cdec981 --- /dev/null +++ b/src/cpu/cpu_map_x86_qemu32.xml @@ -0,0 +1,22 @@ + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_qemu64.xml b/src/cpu/cpu_map_x86_qemu64.xml new file mode 100644 index 0000000000..ed3b8d54e2 --- /dev/null +++ b/src/cpu/cpu_map_x86_qemu64.xml @@ -0,0 +1,40 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/cpu/cpu_map_x86_vendors.xml b/src/cpu/cpu_map_x86_vendors.= xml new file mode 100644 index 0000000000..418712af21 --- /dev/null +++ b/src/cpu/cpu_map_x86_vendors.xml @@ -0,0 +1,4 @@ + + + + --=20 2.17.1 -- libvir-list mailing list libvir-list@redhat.com https://www.redhat.com/mailman/listinfo/libvir-list