From nobody Fri May 3 18:44:37 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) client-ip=66.175.222.12; envelope-from=bounce+27952+60978+1787277+3901457@groups.io; helo=web01.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+60978+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=nvidia.com ARC-Seal: i=1; a=rsa-sha256; t=1591725396; cv=none; d=zohomail.com; s=zohoarc; b=J1V4pH1JBHuadGzGQIzZ1zNCL6jnoyKHDiqosdbbkp4sWhS0k/TfbAdUivKKc+lk0XVi4zXDHp19bxfznjU3giN5VHXReXqqFuIS5ZmigBhn5xkbd+tUz/1fz7IUlUF8L4hiE5m7RFiIUNhFQv2eJXEajnnc+JfsdiSanapQvy0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1591725396; h=Content-Type:Cc:Date:From:List-Id:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Sender:Subject:To; bh=iova/b0zcvWvQZEEjg/egoTzY2rqUDrD2a2lA0b56Sg=; b=ma4WK8TdvYva5Gt0GccQ6/HHl+PL5jhdfGUMgiA2n9zdtBOHm2FDx7uz5+fEcQjquHAsup4+5vODMQqL+r6i1nnan1/Cm1DlLkpVWeYFiRihy1d8mQ5hHydQgiHiRpam+zwpIbRnszk9ksLzUJupq3y1aUoXFwAX0WeOIkIUjq4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.12 as permitted sender) smtp.mailfrom=bounce+27952+60978+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) header.from= Received: from web01.groups.io (web01.groups.io [66.175.222.12]) by mx.zohomail.com with SMTPS id 1591725396914382.58831559592534; Tue, 9 Jun 2020 10:56:36 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id mJvoYY1788612xFlKLNq9w2K; Tue, 09 Jun 2020 10:56:36 -0700 X-Received: from hqnvemgate26.nvidia.com (hqnvemgate26.nvidia.com [216.228.121.65]) by mx.groups.io with SMTP id smtpd.web11.4638.1591725395898279585 for ; Tue, 09 Jun 2020 10:56:36 -0700 X-Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate26.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Tue, 09 Jun 2020 10:56:22 -0700 X-Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Tue, 09 Jun 2020 10:56:35 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Tue, 09 Jun 2020 10:56:35 -0700 X-Received: from HQMAIL105.nvidia.com (172.20.187.12) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Tue, 9 Jun 2020 17:56:35 +0000 X-Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Tue, 9 Jun 2020 17:56:35 +0000 X-Received: from ipark-ubuntu.nvidia.com (Not Verified[10.28.100.106]) by rnnvemgw01.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Tue, 09 Jun 2020 10:56:34 -0700 From: "Irene Park" To: CC: Irene Park Subject: [edk2-devel] [PATCH] ArmPlatformPkg/PL011UartLib: Check PID2 if FiFoDepth is zero Date: Tue, 9 Jun 2020 13:56:31 -0400 Message-ID: X-NVConfidentiality: public MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ipark@nvidia.com X-Gm-Message-State: 49Bsw2aKCLi74pommg0BzWKKx1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1591725396; bh=6qSrArYkXNlrKfNbrbe/I/MR71RauPMX3JBLli2dmW8=; h=CC:Content-Type:Date:From:Reply-To:Subject:To; b=OcnUs7SVcxwqwp21iJK/My6a7WJaHESr7+2jj7Z8VARi0jDRmswSmFoY1wH1my1v2jc bCop9+zNFswEM6U7YgX2teY2BjN2U/cOpK1ee3ltDq2pO1sYCa584Q/S3Uv1WkZsgSLeX C5KvguHgV9pubal6cZIWT7yJoTLLctX3/dA= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Irene Park PL011UartLib determines its FIFO depth based on the PID2 value but the register PID2 is not mandatory as per the SBSA spec. This change won't check PID2 if PcdUartDefaultReceiveFifoDepth is set to a value > 0. Change-Id: I2dd7b3412f9306888078e0cb0488b902d4a8ace9 Signed-off-by: Irene Park --- ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c | 4 ++++ ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf | 1 + 2 files changed, 5 insertions(+) diff --git a/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c b/ArmPlatfo= rmPkg/Library/PL011UartLib/PL011UartLib.c index 801990d..05ad1ad 100644 --- a/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c +++ b/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c @@ -79,9 +79,13 @@ PL011UartInitializePort ( UINT32 Fractional; UINT32 HardwareFifoDepth; =20 + HardwareFifoDepth =3D FixedPcdGet16 (PcdUartDefaultReceiveFifoDepth); +#if FixedPcdGet16 (PcdUartDefaultReceiveFifoDepth) =3D=3D 0 HardwareFifoDepth =3D (PL011_UARTPID2_VER (MmioRead32 (UartBase + UARTPI= D2)) \ > PL011_VER_R1P4) \ ? 32 : 16 ; +#endif + // The PL011 supports a buffer of 1, 16 or 32 chars. Therefore we can ac= cept // 1 char buffer as the minimum FIFO size. Because everything can be rou= nded // down, there is no maximum FIFO size. diff --git a/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf b/ArmPlat= formPkg/Library/PL011UartLib/PL011UartLib.inf index d99e89f..e3da507 100644 --- a/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf +++ b/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf @@ -30,6 +30,7 @@ ArmPlatformPkg/ArmPlatformPkg.dec =20 [FixedPcd] + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate =20 gArmPlatformTokenSpaceGuid.PL011UartInteger --=20 2.7.4 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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