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Tue, 24 Mar 2020 17:41:20 +0000 From: "Lendacky, Thomas" To: devel@edk2.groups.io Cc: Jordan Justen , Laszlo Ersek , Ard Biesheuvel , Michael D Kinney , Liming Gao , Eric Dong , Ray Ni , Brijesh Singh Subject: [edk2-devel] [PATCH v6 11/42] UefiCpuPkg/CpuExceptionHandler: Add support for IOIO_PROT NAE events Date: Tue, 24 Mar 2020 12:40:25 -0500 Message-Id: In-Reply-To: References: X-ClientProxiedBy: DM5PR06CA0025.namprd06.prod.outlook.com (2603:10b6:3:5d::11) To DM6PR12MB3163.namprd12.prod.outlook.com (2603:10b6:5:15e::26) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-Received: from tlendack-t1.amd.com (165.204.77.1) by DM5PR06CA0025.namprd06.prod.outlook.com (2603:10b6:3:5d::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2835.19 via Frontend Transport; Tue, 24 Mar 2020 17:41:19 +0000 X-Originating-IP: [165.204.77.1] X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 01f685ca-2a7e-4a50-f458-08d7d01a902d X-MS-TrafficTypeDiagnostic: DM6PR12MB4027:|DM6PR12MB4027: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:6790; 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contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,thomas.lendacky@amd.com X-Gm-Message-State: IxlUtooeXrYkHPCZxxCIHm53x1787277AA= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1585071685; bh=A4H1ly1wNtYKhgzAbWlR9QOhNgs6fzgNRj4ehcHZ0wA=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=c+z+AmwuqcpbgqRxppfCV4Drj5yTPDffubABXdG8x1zaX1pI085EJB4Y4czEj996JUv Sej9zDGzYoZs6PSyfGcs/fcAZjMfcpfbnKoIDj5kVnqIuOi2fK6HyNR7HHTgbCybB3Q/V UGDD+s6SDrpfWqBCGXy6CpPTm2W2cbg3/X0= X-ZohoMail-DKIM: pass (identity @groups.io) Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3D2198 Under SEV-ES, a IOIO_PROT intercept generates a #VC exception. VMGEXIT must be used to allow the hypervisor to handle this intercept. Add support to construct the required GHCB values to support a IOIO_PROT NAE event. Parse the instruction that generated the #VC exception, setting the required register values in the GHCB and creating the proper SW_EXITINFO1 value in the GHCB. Cc: Eric Dong Cc: Ray Ni Cc: Laszlo Ersek Signed-off-by: Tom Lendacky --- .../X64/ArchAMDSevVcHandler.c | 463 +++++++++++++++++- 1 file changed, 449 insertions(+), 14 deletions(-) diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHand= ler.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c index 7cbf89d9b1aa..577dacfb7ca5 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchAMDSevVcHandler.c @@ -11,6 +11,431 @@ #include #include "AMDSevVcCommon.h" =20 +typedef enum { + LongMode64Bit =3D 0, + LongModeCompat32Bit, + LongModeCompat16Bit, +} SEV_ES_INSTRUCTION_MODE; + +typedef enum { + Size8Bits =3D 0, + Size16Bits, + Size32Bits, + Size64Bits, +} SEV_ES_INSTRUCTION_SIZE; + +typedef enum { + SegmentEs =3D 0, + SegmentCs, + SegmentSs, + SegmentDs, + SegmentFs, + SegmentGs, +} SEV_ES_INSTRUCTION_SEGMENT; + +typedef enum { + RepNone =3D 0, + RepZ, + RepNZ, +} SEV_ES_INSTRUCTION_REP; + +typedef union { + struct { + UINT8 B:1; + UINT8 X:1; + UINT8 R:1; + UINT8 W:1; + UINT8 REX:4; + } Bits; + + UINT8 Uint8; +} SEV_ES_INSTRUCTION_REX_PREFIX; + +typedef union { + struct { + UINT8 Rm:3; + UINT8 Reg:3; + UINT8 Mod:2; + } Bits; + + UINT8 Uint8; +} SEV_ES_INSTRUCTION_MODRM; + +typedef union { + struct { + UINT8 Base:3; + UINT8 Index:3; + UINT8 Scale:2; + } Bits; + + UINT8 Uint8; +} SEV_ES_INSTRUCTION_SIB; + +typedef struct { + struct { + UINT8 Rm; + UINT8 Reg; + UINT8 Mod; + } ModRm; + + struct { + UINT8 Base; + UINT8 Index; + UINT8 Scale; + } Sib; + + UINTN RegData; + UINTN RmData; +} SEV_ES_INSTRUCTION_OPCODE_EXT; + +typedef struct { + GHCB *Ghcb; + + SEV_ES_INSTRUCTION_MODE Mode; + SEV_ES_INSTRUCTION_SIZE DataSize; + SEV_ES_INSTRUCTION_SIZE AddrSize; + BOOLEAN SegmentSpecified; + SEV_ES_INSTRUCTION_SEGMENT Segment; + SEV_ES_INSTRUCTION_REP RepMode; + + UINT8 *Begin; + UINT8 *End; + + UINT8 *Prefixes; + UINT8 *OpCodes; + UINT8 *Displacement; + UINT8 *Immediate; + + SEV_ES_INSTRUCTION_REX_PREFIX RexPrefix; + + BOOLEAN ModRmPresent; + SEV_ES_INSTRUCTION_MODRM ModRm; + + BOOLEAN SibPresent; + SEV_ES_INSTRUCTION_SIB Sib; + + UINT8 PrefixSize; + UINT8 OpCodeSize; + UINT8 DisplacementSize; + UINT8 ImmediateSize; + + SEV_ES_INSTRUCTION_OPCODE_EXT Ext; +} SEV_ES_INSTRUCTION_DATA; + +typedef +UINT64 +(*NAE_EXIT) ( + GHCB *Ghcb, + EFI_SYSTEM_CONTEXT_X64 *Regs, + SEV_ES_INSTRUCTION_DATA *InstructionData + ); + + +STATIC +BOOLEAN +GhcbIsRegValid ( + GHCB *Ghcb, + GHCB_REGISTER Reg + ) +{ + UINT32 RegIndex =3D Reg / 8; + UINT32 RegBit =3D Reg & 0x07; + + return (Ghcb->SaveArea.ValidBitmap[RegIndex] & (1 << RegBit)); +} + +STATIC +VOID +GhcbSetRegValid ( + GHCB *Ghcb, + GHCB_REGISTER Reg + ) +{ + UINT32 RegIndex =3D Reg / 8; + UINT32 RegBit =3D Reg & 0x07; + + Ghcb->SaveArea.ValidBitmap[RegIndex] |=3D (1 << RegBit); +} + +STATIC +VOID +DecodePrefixes ( + EFI_SYSTEM_CONTEXT_X64 *Regs, + SEV_ES_INSTRUCTION_DATA *InstructionData + ) +{ + SEV_ES_INSTRUCTION_MODE Mode; + SEV_ES_INSTRUCTION_SIZE ModeDataSize; + SEV_ES_INSTRUCTION_SIZE ModeAddrSize; + UINT8 *Byte; + + /*TODO: Determine current mode - 64-bit for now */ + Mode =3D LongMode64Bit; + ModeDataSize =3D Size32Bits; + ModeAddrSize =3D Size64Bits; + + InstructionData->Mode =3D Mode; + InstructionData->DataSize =3D ModeDataSize; + InstructionData->AddrSize =3D ModeAddrSize; + + InstructionData->Prefixes =3D InstructionData->Begin; + + Byte =3D InstructionData->Prefixes; + for ( ; ; Byte++, InstructionData->PrefixSize++) { + switch (*Byte) { + case 0x26: + case 0x2E: + case 0x36: + case 0x3E: + if (Mode !=3D LongMode64Bit) { + InstructionData->SegmentSpecified =3D TRUE; + InstructionData->Segment =3D (*Byte >> 3) & 3; + } + break; + + case 0x40 ... 0x4F: + InstructionData->RexPrefix.Uint8 =3D *Byte; + if (*Byte & 0x08) + InstructionData->DataSize =3D Size64Bits; + break; + + case 0x64: + InstructionData->SegmentSpecified =3D TRUE; + InstructionData->Segment =3D *Byte & 7; + break; + + case 0x66: + if (!InstructionData->RexPrefix.Uint8) { + InstructionData->DataSize =3D + (Mode =3D=3D LongMode64Bit) ? Size16Bits : + (Mode =3D=3D LongModeCompat32Bit) ? Size16Bits : + (Mode =3D=3D LongModeCompat16Bit) ? Size32Bits : 0; + } + break; + + case 0x67: + InstructionData->AddrSize =3D + (Mode =3D=3D LongMode64Bit) ? Size32Bits : + (Mode =3D=3D LongModeCompat32Bit) ? Size16Bits : + (Mode =3D=3D LongModeCompat16Bit) ? Size32Bits : 0; + break; + + case 0xF0: + break; + + case 0xF2: + InstructionData->RepMode =3D RepZ; + break; + + case 0xF3: + InstructionData->RepMode =3D RepNZ; + break; + + default: + InstructionData->OpCodes =3D Byte; + InstructionData->OpCodeSize =3D (*Byte =3D=3D 0x0F) ? 2 : 1; + + InstructionData->End =3D Byte + InstructionData->OpCodeSize; + InstructionData->Displacement =3D InstructionData->End; + InstructionData->Immediate =3D InstructionData->End; + return; + } + } +} + +UINT64 +InstructionLength ( + SEV_ES_INSTRUCTION_DATA *InstructionData + ) +{ + return (UINT64) (InstructionData->End - InstructionData->Begin); +} + +STATIC +VOID +InitInstructionData ( + SEV_ES_INSTRUCTION_DATA *InstructionData, + GHCB *Ghcb, + EFI_SYSTEM_CONTEXT_X64 *Regs + ) +{ + SetMem (InstructionData, sizeof (*InstructionData), 0); + InstructionData->Ghcb =3D Ghcb; + InstructionData->Begin =3D (UINT8 *) Regs->Rip; + InstructionData->End =3D (UINT8 *) Regs->Rip; + + DecodePrefixes (Regs, InstructionData); +} + +STATIC +UINT64 +UnsupportedExit ( + GHCB *Ghcb, + EFI_SYSTEM_CONTEXT_X64 *Regs, + SEV_ES_INSTRUCTION_DATA *InstructionData + ) +{ + UINT64 Status; + + Status =3D VmgExit (Ghcb, SvmExitUnsupported, Regs->ExceptionData, 0); + if (Status =3D=3D 0) { + GHCB_EVENT_INJECTION Event; + + Event.Uint64 =3D 0; + Event.Elements.Vector =3D GP_EXCEPTION; + Event.Elements.Type =3D GHCB_EVENT_INJECTION_TYPE_EXCEPTION; + Event.Elements.Valid =3D 1; + + Status =3D Event.Uint64; + } + + return Status; +} + +#define IOIO_TYPE_STR (1 << 2) +#define IOIO_TYPE_IN 1 +#define IOIO_TYPE_INS (IOIO_TYPE_IN | IOIO_TYPE_STR) +#define IOIO_TYPE_OUT 0 +#define IOIO_TYPE_OUTS (IOIO_TYPE_OUT | IOIO_TYPE_STR) + +#define IOIO_REP (1 << 3) + +#define IOIO_ADDR_64 (1 << 9) +#define IOIO_ADDR_32 (1 << 8) +#define IOIO_ADDR_16 (1 << 7) + +#define IOIO_DATA_32 (1 << 6) +#define IOIO_DATA_16 (1 << 5) +#define IOIO_DATA_8 (1 << 4) + +#define IOIO_SEG_ES (0 << 10) +#define IOIO_SEG_DS (3 << 10) + +STATIC +UINT64 +IoioExitInfo ( + EFI_SYSTEM_CONTEXT_X64 *Regs, + SEV_ES_INSTRUCTION_DATA *InstructionData + ) +{ + UINT64 ExitInfo =3D 0; + + switch (*(InstructionData->OpCodes)) { + // IN immediate opcodes + case 0xE4: + case 0xE5: + InstructionData->ImmediateSize =3D 1; + InstructionData->End++; + ExitInfo |=3D IOIO_TYPE_IN; + ExitInfo |=3D ((*(InstructionData->OpCodes + 1)) << 16); + break; + + // OUT immediate opcodes + case 0xE6: + case 0xE7: + InstructionData->ImmediateSize =3D 1; + InstructionData->End++; + ExitInfo |=3D IOIO_TYPE_OUT; + ExitInfo |=3D ((*(InstructionData->OpCodes + 1)) << 16) | IOIO_TYPE_OU= T; + break; + + // IN register opcodes + case 0xEC: + case 0xED: + ExitInfo |=3D IOIO_TYPE_IN; + ExitInfo |=3D ((Regs->Rdx & 0xffff) << 16); + break; + + // OUT register opcodes + case 0xEE: + case 0xEF: + ExitInfo |=3D IOIO_TYPE_OUT; + ExitInfo |=3D ((Regs->Rdx & 0xffff) << 16); + break; + + default: + return 0; + } + + switch (*(InstructionData->OpCodes)) { + case 0xE4: + case 0xE6: + case 0xEC: + case 0xEE: + // Single-byte opcodes + ExitInfo |=3D IOIO_DATA_8; + break; + + default: + // Length determined by instruction parsing + ExitInfo |=3D (InstructionData->DataSize =3D=3D Size16Bits) ? IOIO_DAT= A_16 + : IOIO_DATA_32; + } + + switch (InstructionData->AddrSize) { + case Size16Bits: + ExitInfo |=3D IOIO_ADDR_16; + break; + + case Size32Bits: + ExitInfo |=3D IOIO_ADDR_32; + break; + + case Size64Bits: + ExitInfo |=3D IOIO_ADDR_64; + break; + + default: + break; + } + + if (InstructionData->RepMode) { + ExitInfo |=3D IOIO_REP; + } + + return ExitInfo; +} + +STATIC +UINT64 +IoioExit ( + GHCB *Ghcb, + EFI_SYSTEM_CONTEXT_X64 *Regs, + SEV_ES_INSTRUCTION_DATA *InstructionData + ) +{ + UINT64 ExitInfo1, Status; + + ExitInfo1 =3D IoioExitInfo (Regs, InstructionData); + if (!ExitInfo1) { + return UnsupportedExit (Ghcb, Regs, InstructionData); + } + + if (!(ExitInfo1 & IOIO_TYPE_IN)) { + Ghcb->SaveArea.Rax =3D Regs->Rax; + GhcbSetRegValid (Ghcb, GhcbRax); + } + + //FIXME: This is likely needed for the merging cases (size<32 bits) + // Pass in zero and perform merge here (only for non-string) + Ghcb->SaveArea.Rax =3D Regs->Rax; + GhcbSetRegValid (Ghcb, GhcbRax); + + Status =3D VmgExit (Ghcb, SvmExitIoioProt, ExitInfo1, 0); + if (Status) { + return Status; + } + + if (ExitInfo1 & IOIO_TYPE_IN) { + if (!GhcbIsRegValid (Ghcb, GhcbRax)) { + return UnsupportedExit (Ghcb, Regs, InstructionData); + } + Regs->Rax =3D Ghcb->SaveArea.Rax; + } + + return 0; +} + UINTN DoVcCommon ( GHCB *Ghcb, @@ -18,6 +443,8 @@ DoVcCommon ( ) { EFI_SYSTEM_CONTEXT_X64 *Regs =3D Context.SystemContextX64; + SEV_ES_INSTRUCTION_DATA InstructionData; + NAE_EXIT NaeExit; UINT64 Status; UINTN ExitCode, VcRet; =20 @@ -25,23 +452,31 @@ DoVcCommon ( =20 ExitCode =3D Regs->ExceptionData; switch (ExitCode) { + case SvmExitIoioProt: + NaeExit =3D IoioExit; + break; + default: - Status =3D VmgExit (Ghcb, SvmExitUnsupported, ExitCode, 0); - if (Status =3D=3D 0) { - Regs->ExceptionData =3D 0; - VcRet =3D GP_EXCEPTION; + NaeExit =3D UnsupportedExit; + } + + InitInstructionData (&InstructionData, Ghcb, Regs); + + Status =3D NaeExit (Ghcb, Regs, &InstructionData); + if (Status =3D=3D 0) { + Regs->Rip +=3D InstructionLength (&InstructionData); + VcRet =3D 0; + } else { + GHCB_EVENT_INJECTION Event; + + Event.Uint64 =3D Status; + if (Event.Elements.ErrorCodeValid) { + Regs->ExceptionData =3D Event.Elements.ErrorCode; } else { - GHCB_EVENT_INJECTION Event; - - Event.Uint64 =3D Status; - if (Event.Elements.ErrorCodeValid) { - Regs->ExceptionData =3D Event.Elements.ErrorCode; - } else { - Regs->ExceptionData =3D 0; - } - - VcRet =3D Event.Elements.Vector; + Regs->ExceptionData =3D 0; } + + VcRet =3D Event.Elements.Vector; } =20 VmgDone (Ghcb); --=20 2.17.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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