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Mon, 19 Sep 2022 22:01:32 +0000 X-Received: from rnnvmail203.nvidia.com (10.129.68.9) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.26; Mon, 19 Sep 2022 15:01:18 -0700 X-Received: from drhqmail202.nvidia.com (10.126.190.181) by rnnvmail203.nvidia.com (10.129.68.9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Mon, 19 Sep 2022 15:01:17 -0700 X-Received: from drhqmail203.nvidia.com (10.126.190.182) by drhqmail202.nvidia.com (10.126.190.181) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Mon, 19 Sep 2022 15:01:17 -0700 X-Received: from f153882e4be8.nvidia.com (10.127.8.12) by mail.nvidia.com (10.126.190.182) with Microsoft SMTP Server id 15.2.986.29 via Frontend Transport; Mon, 19 Sep 2022 15:01:16 -0700 From: "Jeff Brasen via groups.io" To: CC: , , , , , Jeff Brasen Subject: [edk2-devel] [PATCH v4 1/3] DynamicTablesPkg: Add CM_ARM_CPC_INFO object Date: Mon, 19 Sep 2022 16:01:09 -0600 Message-ID: In-Reply-To: References: MIME-Version: 1.0 X-NVConfidentiality: public X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT032:EE_|CH0PR12MB5187:EE_ X-MS-Office365-Filtering-Correlation-Id: 4a015063-ffe4-4838-ed17-08da9a8a8336 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Message-Info: uuWc/Q/VP8QztqUIwGxtbsGes9KusvRgyZh8J3mkdX3te/MrflXJK0xKxcim4XTyDPhqqy3YenqX5IdU5cduvaZ6JRU+GhtXln13MNBtklyAMECXxFZX7rhF2w1kqLOs35OoeaoAkUAdDOdaP54q7dIDa2S4rcCinL/MVRZT1IZr06MICD3NQFYNgkuqRJDQzn00vawdyEhyp0r/07tUvTXYqnWCqV2Yc8spefg+8FRPQwmFw+RjalQ2s+k2XqDoq1gpUZ6bqeKku5j1FTTBRmRnL4wfFoAq9QF2CfnglHNAWIl+Wp4tIxndHkxpiBLfbP/IOC9oqeqVcWDMOVEDX2lXIAe63dNEF9Zuvm0K/38eXCNGT4sSPO0Z9J9Z+NhAOtVUZVO9MKIgMSmeYlWlQFCfNqLfPHviCdUXHF6dL/LKvTxjSNsfb7EvYnryKkFVc3IhOxBZfLhD1nOMRNJWumrLG/8HQRUMuSmXUh/bTT3/+NJuwGKwwRkc1QUQwryWhUu1PaXV8F13DM0qZ9oKkoPfh+smXGNk3yPFFqBufoSS+z7OsoKaCK8WHsD9cCAWk4qHe1x24AR6eO0IofwMskgN9XpwB9OWvzEvCCXW6JR4k03j5h810gw45uOBbAE+tNXRuXSps5FHtxVGFBrs4jVMXvKBJ/6Da9OUxSosXDe8u9+A80dhgzUA18MWRLWxn9CiIfMXkh/Nuny5wSdMx7UvXIREEUu1cmQeUzAxwdTdJ9T1xMlOKDEg+b4Fy//EL+wr8xlwnpbYmScMKb9qJw== X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Sep 2022 22:01:32.1582 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4a015063-ffe4-4838-ed17-08da9a8a8336 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT032.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH0PR12MB5187 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,jbrasen@nvidia.com X-Gm-Message-State: Or4SUBwqzUCInrCD81jBJpODx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1663624895; bh=c7zl0bda2Og7/UqIX5paddhREQenGiaYUVYls6+HUQ4=; h=CC:Content-Type:Date:From:Reply-To:Subject:To; b=banDgeFVol3rbV6lZ0Urzutf6rRyqh/DLincUSN3iQIHTsvGLjg3cs+MXdB6918H5d1 IuCYFykA+Pm+m3U4QpAqdVgrkGy7KPPMxUEBpnyiTBII7RKI7j9OKM9v8ddqoNP/ZJMVe FFbUsrV/hoHC9c9LTlnGo7TPkSN4JQRgp3c= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1663624898881100006 Content-Type: text/plain; charset="utf-8" Introduce the CM_ARM_CPC_INFO CmObj in the ArmNameSpaceObjects. This allows to describe CPC information, as described in ACPI 6.4, s8.4.7.1 "_CPC (Continuous Performance Control)". Signed-off-by: Jeff Brasen --- .../Include/ArmNameSpaceObjects.h | 60 ++++++--- DynamicTablesPkg/Include/Library/AmlCpcInfo.h | 124 ++++++++++++++++++ .../ConfigurationManagerObjectParser.c | 80 +++++++++++ 3 files changed, 247 insertions(+), 17 deletions(-) create mode 100644 DynamicTablesPkg/Include/Library/AmlCpcInfo.h diff --git a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h b/DynamicTables= Pkg/Include/ArmNameSpaceObjects.h index 102e0f96be..ea5bf81070 100644 --- a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h +++ b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h @@ -14,6 +14,7 @@ #define ARM_NAMESPACE_OBJECTS_H_ =20 #include +#include =20 #pragma pack(1) =20 @@ -63,6 +64,7 @@ typedef enum ArmObjectID { EArmObjPciInterruptMapInfo, ///< 39 - Pci Interrupt Map Info EArmObjRmr, ///< 40 - Reserved Memory Range Node EArmObjMemoryRangeDescriptor, ///< 41 - Memory Range Descriptor + EArmObjCpcInfo, ///< 42 - Continuous Performance Co= ntrol Info EArmObjMax } EARM_OBJECT_ID; =20 @@ -97,99 +99,105 @@ typedef struct CmArmPowerManagementProfileInfo { */ typedef struct CmArmGicCInfo { /// The GIC CPU Interface number. - UINT32 CPUInterfaceNumber; + UINT32 CPUInterfaceNumber; =20 /** The ACPI Processor UID. This must match the _UID of the CPU Device object information described in the DSDT/SSDT for the CPU. */ - UINT32 AcpiProcessorUid; + UINT32 AcpiProcessorUid; =20 /** The flags field as described by the GICC structure in the ACPI Specification. */ - UINT32 Flags; + UINT32 Flags; =20 /** The parking protocol version field as described by the GICC structure in the ACPI Specification. */ - UINT32 ParkingProtocolVersion; + UINT32 ParkingProtocolVersion; =20 /** The Performance Interrupt field as described by the GICC structure in the ACPI Specification. */ - UINT32 PerformanceInterruptGsiv; + UINT32 PerformanceInterruptGsiv; =20 /** The CPU Parked address field as described by the GICC structure in the ACPI Specification. */ - UINT64 ParkedAddress; + UINT64 ParkedAddress; =20 /** The base address for the GIC CPU Interface as described by the GICC structure in the ACPI Specification. */ - UINT64 PhysicalBaseAddress; + UINT64 PhysicalBaseAddress; =20 /** The base address for GICV interface as described by the GICC structure in the ACPI Specification. */ - UINT64 GICV; + UINT64 GICV; =20 /** The base address for GICH interface as described by the GICC structure in the ACPI Specification. */ - UINT64 GICH; + UINT64 GICH; =20 /** The GICV maintenance interrupt as described by the GICC structure in the ACPI Specification. */ - UINT32 VGICMaintenanceInterrupt; + UINT32 VGICMaintenanceInterrupt; =20 /** The base address for GICR interface as described by the GICC structure in the ACPI Specification. */ - UINT64 GICRBaseAddress; + UINT64 GICRBaseAddress; =20 /** The MPIDR for the CPU as described by the GICC structure in the ACPI Specification. */ - UINT64 MPIDR; + UINT64 MPIDR; =20 /** The Processor Power Efficiency class as described by the GICC structure in the ACPI Specification. */ - UINT8 ProcessorPowerEfficiencyClass; + UINT8 ProcessorPowerEfficiencyClass; =20 /** Statistical Profiling Extension buffer overflow GSIV. Zero if unsupported by this processor. This field was introduced in ACPI 6.3 (MADT revision 5) and is therefore ignored when generating MADT revision 4 or lower. */ - UINT16 SpeOverflowInterrupt; + UINT16 SpeOverflowInterrupt; =20 /** The proximity domain to which the logical processor belongs. This field is used to populate the GICC affinity structure in the SRAT table. */ - UINT32 ProximityDomain; + UINT32 ProximityDomain; =20 /** The clock domain to which the logical processor belongs. This field is used to populate the GICC affinity structure in the SRAT table. */ - UINT32 ClockDomain; + UINT32 ClockDomain; =20 /** The GICC Affinity flags field as described by the GICC Affinity stru= cture in the SRAT table. */ - UINT32 AffinityFlags; + UINT32 AffinityFlags; + + /** Optional field: Reference Token for the Cpc info of this processor. + Token identifying a CM_ARM_OBJ_REF structure, itself referencing + CM_ARM_CPC_INFO objects. + */ + CM_OBJECT_TOKEN CpcToken; } CM_ARM_GICC_INFO; =20 /** A structure that describes the @@ -1070,6 +1078,24 @@ typedef struct CmArmRmrDescriptor { UINT64 Length; } CM_ARM_MEMORY_RANGE_DESCRIPTOR; =20 +/** A structure that describes the Cpc information. + + Continuous Performance Control is described in DSDT/SSDT and associated + to cpus/clusters in the cpu topology. + + Unsupported Optional registers should be encoded with NULL resource + Register {(SystemMemory, 0, 0, 0, 0)} + + For values that support Integer or Buffer, integer will be used + if buffer is NULL resource. + If resource is not NULL then Integer must be 0 + + Cf. ACPI 6.4, s8.4.7.1 _CPC (Continuous Performance Control) + + ID: EArmObjCpcInfo +*/ +typedef AML_CPC_INFO CM_ARM_CPC_INFO; + #pragma pack() =20 #endif // ARM_NAMESPACE_OBJECTS_H_ diff --git a/DynamicTablesPkg/Include/Library/AmlCpcInfo.h b/DynamicTablesP= kg/Include/Library/AmlCpcInfo.h new file mode 100644 index 0000000000..8981c22954 --- /dev/null +++ b/DynamicTablesPkg/Include/Library/AmlCpcInfo.h @@ -0,0 +1,124 @@ +/** @file + + Copyright (c) 2022, NVIDIA CORPORATION & AFFILIATES. All rights reserved= .
+ + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#ifndef AML_CPC_INFO_H_ +#define AML_CPC_INFO_H_ + +#include + +#pragma pack(1) + +/** A structure that describes the Cpc information. + + Continuous Performance Control is described in DSDT/SSDT and associated + to cpus/clusters in the cpu topology. + + Unsupported Optional registers should be encoded with NULL resource + Register {(SystemMemory, 0, 0, 0, 0)} + + For values that support Integer or Buffer, integer will be used + if buffer is NULL resource. + If resource is not NULL then Integer must be 0 + + Cf. ACPI 6.4, s8.4.7.1 _CPC (Continuous Performance Control) + +**/ + +typedef struct AmlCpcInfo { + /// The revision number of the _CPC package format. + UINT32 Revision; + + /// Indicates the highest level of performance the processor + /// is theoretically capable of achieving. + EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE HighestPerformanceBuffer; + UINT32 HighestPerformanceInteger; + + /// Indicates the highest sustained performance level of the processor. + EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE NominalPerformanceBuffer; + UINT32 NominalPerformanceInteger; + + /// Indicates the lowest performance level of the processor with non-lin= ear power savings. + EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE LowestNonlinearPerformanceBuff= er; + UINT32 LowestNonlinearPerformanceInte= ger; + + /// Indicates the lowest performance level of the processor.. + EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE LowestPerformanceBuffer; + UINT32 LowestPerformanceInteger; + + /// Guaranteed Performance Register Buffer. + /// Optional + EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE GuaranteedPerformanceRegister; + + /// Desired Performance Register Buffer. + EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE DesiredPerformanceRegister; + + /// Minimum Performance Register Buffer. + /// Optional + EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE MinimumPerformanceRegister; + + /// Maximum Performance Register Buffer. + /// Optional + EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE MaximumPerformanceRegister; + + /// Performance Reduction Tolerance Register. + /// Optional + EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE PerformanceReductionToleranceR= egister; + + /// Time Window Register. + /// Optional + EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE TimeWindowRegister; + + /// Counter Wraparound Time + /// Optional + EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE CounterWraparoundTimeBuffer; + UINT32 CounterWraparoundTimeInteger; + + /// Reference Performance Counter Register + EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE ReferencePerformanceCounterReg= ister; + + /// Delivered Performance Counter Register + EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE DeliveredPerformanceCounterReg= ister; + + /// Performance Limited Register + EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE PerformanceLimitedRegister; + + /// CPPC EnableRegister + /// Optional + EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE CPPCEnableRegister; + + /// Autonomous Selection Enable + /// Optional + EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE AutonomousSelectionEnableBuffe= r; + UINT32 AutonomousSelectionEnableInteg= er; + + /// AutonomousActivity-WindowRegister + /// Optional + EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE AutonomousActivityWindowRegist= er; + + /// EnergyPerformance-PreferenceRegister + /// Optional + EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE EnergyPerformancePreferenceReg= ister; + + /// Reference Performance + /// Optional + EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE ReferencePerformanceBuffer; + UINT32 ReferencePerformanceInteger; + + /// Lowest Frequency + /// Optional + EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE LowestFrequencyBuffer; + UINT32 LowestFrequencyInteger; + + /// Nominal Frequency + /// Optional + EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE NominalFrequencyBuffer; + UINT32 NominalFrequencyInteger; +} AML_CPC_INFO; + +#pragma pack() + +#endif //AML_CPC_INFO_H_ diff --git a/DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationMa= nagerObjectParser.c b/DynamicTablesPkg/Library/Common/TableHelperLib/Config= urationManagerObjectParser.c index c1b21d24a4..cda3696557 100644 --- a/DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationManagerOb= jectParser.c +++ b/DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationManagerOb= jectParser.c @@ -423,6 +423,84 @@ STATIC CONST CM_OBJ_PARSER CmPciInterruptMapInfoParse= r[] =3D { ARRAY_SIZE (CmArmGenericInterruptParser) }, }; =20 +/** A parser for EArmObjCpcInfo. +*/ +STATIC CONST CM_OBJ_PARSER CmArmCpcInfoParser[] =3D { + { "Revision", 4, = "0x%lx", NULL }, + { "HighestPerformanceBuffer", sizeof (EFI_ACPI_6_4_GENERIC_= ADDRESS_STRUCTURE), + NULL, NULL, AcpiGenericAddressParser, + ARRAY_SIZE (AcpiGenericAddressParser) }, + { "HighestPerformanceInteger", 4, = "0x%lx", NULL }, + { "NominalPerformanceBuffer", sizeof (EFI_ACPI_6_4_GENERIC_= ADDRESS_STRUCTURE), + NULL, NULL, AcpiGenericAddressParser, + ARRAY_SIZE (AcpiGenericAddressParser) }, + { "NominalPerformanceInteger", 4, = "0x%lx", NULL }, + { "LowestNonlinearPerformanceBuffer", sizeof (EFI_ACPI_6_4_GENERIC_= ADDRESS_STRUCTURE), + NULL, NULL, AcpiGenericAddressParser, + ARRAY_SIZE (AcpiGenericAddressParser) }, + { "LowestNonlinearPerformanceInteger", 4, = "0x%lx", NULL }, + { "LowestPerformanceBuffer", sizeof (EFI_ACPI_6_4_GENERIC_= ADDRESS_STRUCTURE), + NULL, NULL, AcpiGenericAddressParser, + ARRAY_SIZE (AcpiGenericAddressParser) }, + { "LowestPerformanceInteger", 4, = "0x%lx", NULL }, + { "GuaranteedPerformanceRegister", sizeof (EFI_ACPI_6_4_GENERIC_= ADDRESS_STRUCTURE), + NULL, NULL, AcpiGenericAddressParser, + ARRAY_SIZE (AcpiGenericAddressParser) }, + { "DesiredPerformanceRegister", sizeof (EFI_ACPI_6_4_GENERIC_= ADDRESS_STRUCTURE), + NULL, NULL, AcpiGenericAddressParser, + ARRAY_SIZE (AcpiGenericAddressParser) }, + { "MinimumPerformanceRegister", sizeof (EFI_ACPI_6_4_GENERIC_= ADDRESS_STRUCTURE), + NULL, NULL, AcpiGenericAddressParser, + ARRAY_SIZE (AcpiGenericAddressParser) }, + { "MaximumPerformanceRegister", sizeof (EFI_ACPI_6_4_GENERIC_= ADDRESS_STRUCTURE), + NULL, NULL, AcpiGenericAddressParser, + ARRAY_SIZE (AcpiGenericAddressParser) }, + { "PerformanceReductionToleranceRegister", sizeof (EFI_ACPI_6_4_GENERIC_= ADDRESS_STRUCTURE), + NULL, NULL, AcpiGenericAddressParser, + ARRAY_SIZE (AcpiGenericAddressParser) }, + { "TimeWindowRegister", sizeof (EFI_ACPI_6_4_GENERIC_= ADDRESS_STRUCTURE), + NULL, NULL, AcpiGenericAddressParser, + ARRAY_SIZE (AcpiGenericAddressParser) }, + { "CounterWraparoundTimeBuffer", sizeof (EFI_ACPI_6_4_GENERIC_= ADDRESS_STRUCTURE), + NULL, NULL, AcpiGenericAddressParser, + ARRAY_SIZE (AcpiGenericAddressParser) }, + { "CounterWraparoundTimeInteger", 4, = "0x%lx", NULL }, + { "ReferencePerformanceCounterRegister", sizeof (EFI_ACPI_6_4_GENERIC_= ADDRESS_STRUCTURE), + NULL, NULL, AcpiGenericAddressParser, + ARRAY_SIZE (AcpiGenericAddressParser) }, + { "DeliveredPerformanceCounterRegister", sizeof (EFI_ACPI_6_4_GENERIC_= ADDRESS_STRUCTURE), + NULL, NULL, AcpiGenericAddressParser, + ARRAY_SIZE (AcpiGenericAddressParser) }, + { "PerformanceLimitedRegister", sizeof (EFI_ACPI_6_4_GENERIC_= ADDRESS_STRUCTURE), + NULL, NULL, AcpiGenericAddressParser, + ARRAY_SIZE (AcpiGenericAddressParser) }, + { "CPPCEnableRegister", sizeof (EFI_ACPI_6_4_GENERIC_= ADDRESS_STRUCTURE), + NULL, NULL, AcpiGenericAddressParser, + ARRAY_SIZE (AcpiGenericAddressParser) }, + { "AutonomousSelectionEnableBuffer", sizeof (EFI_ACPI_6_4_GENERIC_= ADDRESS_STRUCTURE), + NULL, NULL, AcpiGenericAddressParser, + ARRAY_SIZE (AcpiGenericAddressParser) }, + { "AutonomousSelectionEnableInteger", 4, = "0x%lx", NULL }, + { "AutonomousActivityWindowRegister", sizeof (EFI_ACPI_6_4_GENERIC_= ADDRESS_STRUCTURE), + NULL, NULL, AcpiGenericAddressParser, + ARRAY_SIZE (AcpiGenericAddressParser) }, + { "EnergyPerformancePreferenceRegister", sizeof (EFI_ACPI_6_4_GENERIC_= ADDRESS_STRUCTURE), + NULL, NULL, AcpiGenericAddressParser, + ARRAY_SIZE (AcpiGenericAddressParser) }, + { "ReferencePerformanceBuffer", sizeof (EFI_ACPI_6_4_GENERIC_= ADDRESS_STRUCTURE), + NULL, NULL, AcpiGenericAddressParser, + ARRAY_SIZE (AcpiGenericAddressParser) }, + { "ReferencePerformanceInteger", 4, = "0x%lx", NULL }, + { "LowestFrequencyBuffer", sizeof (EFI_ACPI_6_4_GENERIC_= ADDRESS_STRUCTURE), + NULL, NULL, AcpiGenericAddressParser, + ARRAY_SIZE (AcpiGenericAddressParser) }, + { "LowestFrequencyInteger", 4, = "0x%lx", NULL }, + { "NominalFrequencyBuffer", sizeof (EFI_ACPI_6_4_GENERIC_= ADDRESS_STRUCTURE), + NULL, NULL, AcpiGenericAddressParser, + ARRAY_SIZE (AcpiGenericAddressParser) }, + { "NominalFrequencyInteger", 4, = "0x%lx", NULL }, +}; + /** A parser for Arm namespace objects. */ STATIC CONST CM_OBJ_PARSER_ARRAY ArmNamespaceObjectParser[] =3D { @@ -501,6 +579,8 @@ STATIC CONST CM_OBJ_PARSER_ARRAY ArmNamespaceObjectPar= ser[] =3D { ARRAY_SIZE (CmArmPciAddressMapInfoParser) }, { "EArmObjPciInterruptMapInfo", CmPciInterruptMapInfoParser, ARRAY_SIZE (CmPciInterruptMapInfoParser) }, + { "EArmObjCpcInfo", CmArmCpcInfoParser, + ARRAY_SIZE (CmArmCpcInfoParser) }, { "EArmObjMax", NULL, = 0 }, }; =20 --=20 2.25.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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